[Lldb-commits] [lldb] aa73ee0 - [lldb/test] Use inline assembly for instruction counting tests

[Pavel Labath via lldb-commits]

Author: Pavel Labath
Date: 2020-03-06T11:05:07+01:00
New Revision: aa73ee052fffb0d06c6b7d8caf0271652c07a80d

URL: https://github.com/llvm/llvm-project/commit/aa73ee052fffb0d06c6b7d8caf0271652c07a80d
DIFF: https://github.com/llvm/llvm-project/commit/aa73ee052fffb0d06c6b7d8caf0271652c07a80d.diff

LOG: [lldb/test] Use inline assembly for instruction counting tests

We have a test which checks that instruction-step really steps one
instruction, but the way it checks this makes it very susceptible to
codegen changes. This rewrites the test inferior to use inline assembly,
which guarantees a known sequence of instructions that the test can
check. This does mean we have to write separate assembly for each
architecture, but that is no better than having architecture-specific
assertions, which the test was already starting to accumulate.

Added: 
    

Modified: 
    lldb/test/API/tools/lldb-server/main.cpp

Removed: 
    


################################################################################
diff  --git a/lldb/test/API/tools/lldb-server/main.cpp b/lldb/test/API/tools/lldb-server/main.cpp
index 992288355f15..399b5e9033b4 100644
--- a/lldb/test/API/tools/lldb-server/main.cpp
+++ b/lldb/test/API/tools/lldb-server/main.cpp
@@ -150,11 +150,39 @@ static void signal_handler(int signo) {
 }
 
 static void swap_chars() {
+#if defined(__x86_64__) || defined(__i386__)
+  asm volatile("movb %1, (%2)\n\t"
+               "movb %0, (%3)\n\t"
+               "movb %0, (%2)\n\t"
+               "movb %1, (%3)\n\t"
+               :
+               : "i"('0'), "i"('1'), "r"(&g_c1), "r"(&g_c2)
+               : "memory");
+#elif defined(__aarch64__)
+  asm volatile("strb %w1, [%2]\n\t"
+               "strb %w0, [%3]\n\t"
+               "strb %w0, [%2]\n\t"
+               "strb %w1, [%3]\n\t"
+               :
+               : "r"('0'), "r"('1'), "r"(&g_c1), "r"(&g_c2)
+               : "memory");
+#elif defined(__arm__)
+  asm volatile("strb %1, [%2]\n\t"
+               "strb %0, [%3]\n\t"
+               "strb %0, [%2]\n\t"
+               "strb %1, [%3]\n\t"
+               :
+               : "r"('0'), "r"('1'), "r"(&g_c1), "r"(&g_c2)
+               : "memory");
+#else
+#warning This may generate unpredictible assembly and cause the single-stepping test to fail.
+#warning Please add appropriate assembly for your target.
   g_c1 = '1';
   g_c2 = '0';
 
   g_c1 = '0';
   g_c2 = '1';
+#endif
 }
 
 static void hello() {