[Lldb-commits] [PATCH] D75607: [lldb] Use llvm::MC for register numbers in AArch64 ABIs

[Pavel Labath via Phabricator via lldb-commits]

labath created this revision.
labath added reviewers: JDevlieghere, jasonmolenda.
Herald added subscribers: kristof.beyls, aprantl.
Herald added a project: LLDB.
labath marked an inline comment as done.
labath added inline comments.


================
Comment at: lldb/source/Plugins/ABI/AArch64/ABIAArch64.cpp:29-32
+  if (name == "pc")
+    return {LLDB_INVALID_REGNUM, arm64_dwarf::pc};
+  if (name == "cpsr")
+    return {LLDB_INVALID_REGNUM, arm64_dwarf::cpsr};
----------------
This is here to ensure identical behavior to the previous code, but I am not sure it is really needed/correct. [[https://developer.arm.com/docs/ihi0057/c/dwarf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 | Arm-dwarf spec ]] does not assign a register number to the pc (number 32, used by lldb, is reserved) or cpsr (number 33 is assigned to ELR_mode).

Llvm does not use either of these numbers, so at least no llvm-based toolchain should be generating them.


This is equivalent to previous patches (e.g. 07355c1c0 <https://reviews.llvm.org/rG07355c1c08be54e6fda494168724e76e7e7da8cd>) for the x86 ABIs.

One name fixup is needed -- lldb refers to the floating/vector registers by
their vector name (vN). Llvm does not use this name, so we map it to qN,
representing the register as a single 128 bit value (this choice is fairly
arbitrary -- any other name would also work fine as they all have the same
DWARF number).


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D75607

Files:
  lldb/source/Plugins/ABI/AArch64/ABIAArch64.cpp
  lldb/source/Plugins/ABI/AArch64/ABIAArch64.h
  lldb/source/Plugins/ABI/AArch64/ABIMacOSX_arm64.cpp
  lldb/source/Plugins/ABI/AArch64/ABIMacOSX_arm64.h
  lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp
  lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.h

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