[Lldb-commits] [PATCH] D71498: Fix ARM32 inferior calls

[Muhammad Omair Javaid via Phabricator via lldb-commits]

omjavaid added a comment.

This issue is being caused by wrong address being written to memory somewhere while single stepping though i have reached the exact problem but the logs seem to suggest it.

LLDB Log without  D63540 <https://reviews.llvm.org/D63540> https://paste.ubuntu.com/p/zdXFrfN4MJ/

LLDB Log without  D63540 <https://reviews.llvm.org/D63540>+D71498 <https://reviews.llvm.org/D71498>+D71514 <https://reviews.llvm.org/D71514> https://paste.ubuntu.com/p/RCcSdpYkRd/

Problem appears immediately after applying D63540 <https://reviews.llvm.org/D63540> and has no effect even with remaining two patches.

**Look for Correct behavior log without any patches:

-

0xe4a8d0: tid = 0x8e07: stop info = run-to-address (stop_id = 7)
Turning off notification of new threads while single stepping a thread.

ThreadList::ShouldStop: 1 threads, 1 unsuspended threads
Thread::ShouldStop(0xe4a8d0) for tid = 0x8e07 0x8e07, pc = 0x00000000000102f0
^^^^^^^^ Thread::ShouldStop Begin ^^^^^^^^
Plan stack initial state:

  thread #1: tid = 0x8e07:
    Active plan stack:
      Element 0: Base thread plan.
      Element 1: Thread plan to call 0xf77d8ee8
      Element 2: Run to address: 0x00000000000102f0 using breakpoint: -2 - 

th1/fr0 with pc value of 0x102f0, symbol name is '_start'
th1/fr0 frame uses EmulateInstructionARM for full UnwindPlan because this is the non-call site unwind plan and this is a zeroth frame
th1/fr0 0x00000000000102f0: CFA=sp +0 =>

**vs the wrong behavior here:**

0x1cd38e8: tid = 0x90d4: stop info = <NULL> (stop_id = 7)
**0x1cd38e8: tid = 0x90d4: stop info = signal SIGSEGV: invalid address (fault address: 0xfe52) (stop_id = 7)
**Turning off notification of new threads while single stepping a thread.

ThreadList::ShouldStop: 1 threads, 1 unsuspended threads
Thread::ShouldStop(0x1cd38e8) for tid = 0x90d4 0x90d4, pc = 0x000000000000fe52
^^^^^^^^ Thread::ShouldStop Begin ^^^^^^^^
Plan stack initial state:

  thread #1: tid = 0x90d4:
    Active plan stack:
      Element 0: Base thread plan.
      Element 1: Thread plan to call 0xf77d8ee8
      Element 2: Run to address: 0x00000000000102f0 using breakpoint: -2 - 

th1/fr0 using architectural default unwind method
th1/fr0 with pc value of 0xfe52, no symbol/function name is known.
0x01CA20E0 Communication::Write (src = 0x5C600CE0, src_len = %llu) connection = 26
0x1c7c968 ConnectionFileDescriptor::Write (src = 0x5c600ce0, src_len = 26)
0x1c7c968 ConnectionFileDescriptor::Write(fd = 5, src = 0x5c600ce0, src_len = 26) => 26 (error = (null))
this = 0x01CA20E0, dst = 0xA37BD440, dst_len = 8192, timeout = 5000000 us, connection = 0x01C7C968
this = 0x01C7C968, timeout = 5000000 us
0x1c7c968 ConnectionFileDescriptor::Read()  fd = 5, dst = 0xa37bd440, dst_len = 8192) => 24, error = (null)
th1/fr0 0x000000000000fe52: CFA=sp +0 => pc=lr


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71498/new/

https://reviews.llvm.org/D71498