[Lldb-commits] [PATCH] D66934: [ARM64] Simplify RegisterInfos_arm64.h with macro based RegisterInfo array

[Jason Molenda via Phabricator via lldb-commits]

jasonmolenda added a comment.

LGTM.  In debugserver we have the definition for the V registers invaliding the D and S registers it contains.  If the user modifies v10, we want any cached s10 and d10 values to be marked as invalid / refresh them.  The same thing with the X and W registers.  But the definitions you're rewriting already had this as incorrect, you've just replicated it more compactly, so I wouldn't call that a reason to hold off.  Let's give Pavel a chance to look at this too.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D66934/new/

https://reviews.llvm.org/D66934