[Lldb-commits] [PATCH] D62812: [llvm] [CodeView] Move Triple::ArchType → CPUType mapping from LLDB

[Michał Górny via Phabricator via lldb-commits]

mgorny created this revision.
mgorny added reviewers: labath, mtrent, compnerd.
Herald added a project: LLVM.

Since neither the CodeView::CPUType nor Triple::ArchType constants are
specific to LLDB, it makes no sense to maintain their mapping there.
Instead, introduce a small inline function to provide the mapping
in CodeView, and provide a convenience overload of getRegisterNames().


https://reviews.llvm.org/D62812

Files:
  lldb/source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
  llvm/include/llvm/DebugInfo/CodeView/CodeView.h
  llvm/include/llvm/DebugInfo/CodeView/EnumTables.h


Index: llvm/include/llvm/DebugInfo/CodeView/EnumTables.h
===================================================================
--- llvm/include/llvm/DebugInfo/CodeView/EnumTables.h
+++ llvm/include/llvm/DebugInfo/CodeView/EnumTables.h
@@ -10,6 +10,7 @@
 #define LLVM_DEBUGINFO_CODEVIEW_ENUMTABLES_H
 
 #include "llvm/ADT/ArrayRef.h"
+#include "llvm/ADT/Triple.h"
 #include "llvm/BinaryFormat/COFF.h"
 #include "llvm/DebugInfo/CodeView/CodeView.h"
 #include "llvm/Support/ScopedPrinter.h"
@@ -38,6 +39,11 @@
 ArrayRef<EnumEntry<COFF::SectionCharacteristics>>
 getImageSectionCharacteristicNames();
 
+inline ArrayRef<EnumEntry<uint16_t>>
+getRegisterNames(Triple::ArchType ArchType) {
+  return getRegisterNames(getCPUTypeForArchType(ArchType));
+}
+
 } // end namespace codeview
 } // end namespace llvm
 
Index: llvm/include/llvm/DebugInfo/CodeView/CodeView.h
===================================================================
--- llvm/include/llvm/DebugInfo/CodeView/CodeView.h
+++ llvm/include/llvm/DebugInfo/CodeView/CodeView.h
@@ -16,6 +16,7 @@
 #include <cinttypes>
 #include <type_traits>
 
+#include "llvm/ADT/Triple.h"
 #include "llvm/Support/Endian.h"
 
 namespace llvm {
@@ -138,6 +139,16 @@
   D3D11_Shader = 0x100,
 };
 
+/// Convert llvm::Triple::ArchType value into llvm::codeview::CPUType.
+inline CPUType getCPUTypeForArchType(const Triple::ArchType &ArchType) {
+  switch (ArchType) {
+  case Triple::ArchType::aarch64:
+    return CPUType::ARM64;
+  default:
+    return CPUType::X64;
+  }
+}
+
 /// These values correspond to the CV_CFL_LANG enumeration, and are documented
 /// here: https://msdn.microsoft.com/en-us/library/bw3aekw6.aspx
 enum SourceLanguage : uint8_t {
Index: lldb/source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
===================================================================
--- lldb/source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
+++ lldb/source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
@@ -25,19 +25,8 @@
 
 static uint32_t ResolveLLDBRegisterNum(llvm::StringRef reg_name, llvm::Triple::ArchType arch_type) {
   // lookup register name to get lldb register number
-  llvm::codeview::CPUType cpu_type;
-  switch (arch_type) {
-    case llvm::Triple::ArchType::aarch64:
-      cpu_type = llvm::codeview::CPUType::ARM64;
-      break;
-
-    default:
-      cpu_type = llvm::codeview::CPUType::X64;
-      break;
-  }
-
   llvm::ArrayRef<llvm::EnumEntry<uint16_t>> register_names =
-      llvm::codeview::getRegisterNames(cpu_type);
+      llvm::codeview::getRegisterNames(arch_type);
   auto it = llvm::find_if(
       register_names,
       [&reg_name](const llvm::EnumEntry<uint16_t> &register_entry) {


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