[Lldb-commits] [PATCH] D62235: [ARM64][AArch64] Update disassembler attributes to ARMv8.5 ISA with SVE extensions
Muhammad Omair Javaid via Phabricator via lldb-commits
lldb-commits at lists.llvm.org
Wed May 22 17:46:40 PDT 2019
This revision was automatically updated to reflect the committed changes.
Closed by commit rLLDB361451: [ARM64][AArch64] Update disassembler attributes to ARMv8.5 ISA with SVEā¦ (authored by omjavaid, committed by ).
Repository:
rLLDB LLDB
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D62235/new/
https://reviews.llvm.org/D62235
Files:
source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp
Index: source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp
===================================================================
--- source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp
+++ source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp
@@ -1188,10 +1188,10 @@
features_str += "+dspr2,";
}
- // If any AArch64 variant, enable the ARMv8.2 ISA extensions so we can
- // disassemble newer instructions.
+ // If any AArch64 variant, enable the ARMv8.5 ISA with SVE extensions so we
+ // can disassemble newer instructions.
if (triple.getArch() == llvm::Triple::aarch64)
- features_str += "+v8.2a";
+ features_str += "+v8.5a,+sve2";
if (triple.getArch() == llvm::Triple::aarch64
&& triple.getVendor() == llvm::Triple::Apple) {
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