[Lldb-commits] [PATCH] D60654: Fix UNPREDICTABLE check in EmulateInstructionARM::EmulateADDRegShift

[Raphael Isemann via Phabricator via lldb-commits]

teemperor created this revision.
teemperor added a reviewer: LLDB.
Herald added subscribers: lldb-commits, kristof.beyls, javed.absar.
Herald added a project: LLDB.

As reported in LLVM bug 41487, the check in this function is wrong and should be
the same as the described check in the comment (which is correctly copied from the
ARM ISA reference).


Repository:
  rLLDB LLDB

https://reviews.llvm.org/D60654

Files:
  lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp


Index: lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
===================================================================
--- lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
+++ lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
@@ -10150,7 +10150,7 @@
       shift_t = DecodeRegShift(Bits32(opcode, 6, 5));
 
       // if d == 15 || n == 15 || m == 15 || s == 15 then UNPREDICTABLE;
-      if ((d == 15) || (m == 15) || (m == 15) || (s == 15))
+      if ((d == 15) || (n == 15) || (m == 15) || (s == 15))
         return false;
       break;
 


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