[Lldb-commits] [PATCH] D22231: Implement trampoline step-through for Windows-x86.

[Stephane Sezer via Phabricator via lldb-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL314045: Implement trampoline step-through for Windows-x86. (authored by sas).

Repository:
  rL LLVM

https://reviews.llvm.org/D22231

Files:
  lldb/trunk/source/Plugins/DynamicLoader/Windows-DYLD/DynamicLoaderWindowsDYLD.cpp


Index: lldb/trunk/source/Plugins/DynamicLoader/Windows-DYLD/DynamicLoaderWindowsDYLD.cpp
===================================================================
--- lldb/trunk/source/Plugins/DynamicLoader/Windows-DYLD/DynamicLoaderWindowsDYLD.cpp
+++ lldb/trunk/source/Plugins/DynamicLoader/Windows-DYLD/DynamicLoaderWindowsDYLD.cpp
@@ -11,8 +11,11 @@
 #include "DynamicLoaderWindowsDYLD.h"
 
 #include "lldb/Core/PluginManager.h"
+#include "lldb/Target/ExecutionContext.h"
 #include "lldb/Target/Process.h"
+#include "lldb/Target/RegisterContext.h"
 #include "lldb/Target/Target.h"
+#include "lldb/Target/ThreadPlanStepInstruction.h"
 
 #include "llvm/ADT/Triple.h"
 
@@ -72,5 +75,44 @@
 ThreadPlanSP
 DynamicLoaderWindowsDYLD::GetStepThroughTrampolinePlan(Thread &thread,
                                                        bool stop) {
-  return ThreadPlanSP();
+  auto arch = m_process->GetTarget().GetArchitecture();
+  if (arch.GetMachine() != llvm::Triple::x86) {
+    return ThreadPlanSP();
+  }
+
+  uint64_t pc = thread.GetRegisterContext()->GetPC();
+  // Max size of an instruction in x86 is 15 bytes.
+  AddressRange range(pc, 2 * 15);
+
+  ExecutionContext exe_ctx(m_process->GetTarget());
+  DisassemblerSP disassembler_sp = Disassembler::DisassembleRange(
+      arch, nullptr, nullptr, exe_ctx, range, true);
+  if (!disassembler_sp) {
+    return ThreadPlanSP();
+  }
+
+  InstructionList *insn_list = &disassembler_sp->GetInstructionList();
+  if (insn_list == nullptr) {
+    return ThreadPlanSP();
+  }
+
+  // First instruction in a x86 Windows trampoline is going to be an indirect
+  // jump through the IAT and the next one will be a nop (usually there for
+  // alignment purposes). e.g.:
+  //     0x70ff4cfc <+956>: jmpl   *0x7100c2a8
+  //     0x70ff4d02 <+962>: nop
+
+  auto first_insn = insn_list->GetInstructionAtIndex(0);
+  auto second_insn = insn_list->GetInstructionAtIndex(1);
+
+  if (first_insn == nullptr || second_insn == nullptr ||
+      strcmp(first_insn->GetMnemonic(&exe_ctx), "jmpl") != 0 ||
+      strcmp(second_insn->GetMnemonic(&exe_ctx), "nop") != 0) {
+    return ThreadPlanSP();
+  }
+
+  assert(first_insn->DoesBranch() && !second_insn->DoesBranch());
+
+  return ThreadPlanSP(new ThreadPlanStepInstruction(
+      thread, false, false, eVoteNoOpinion, eVoteNoOpinion));
 }


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