[Lldb-commits] [PATCH] D11930: [MIPS]Handle floating point and aggregate return types in SysV-mips [32 bit] ABI

[Bhushan Attarde via lldb-commits]

bhushan created this revision.
bhushan added a reviewer: clayborg.
bhushan added subscribers: lldb-commits, jaydeep, sagar, nitesh.jain, mohit.bhakkad.
bhushan set the repository for this revision to rL LLVM.

This patch adds support of floating point and aggregate return types in GetReturnValueObjectImpl() for mips32

Repository:
  rL LLVM

http://reviews.llvm.org/D11930

Files:
  source/Plugins/ABI/SysV-mips/ABISysV_mips.cpp

Index: source/Plugins/ABI/SysV-mips/ABISysV_mips.cpp
===================================================================
--- source/Plugins/ABI/SysV-mips/ABISysV_mips.cpp
+++ source/Plugins/ABI/SysV-mips/ABISysV_mips.cpp
@@ -424,14 +424,15 @@
         return return_valobj_sp;
     
     bool is_signed;
+    bool is_complex;
+    uint32_t count;
 
     // In MIPS register "r2" (v0) holds the integer function return values
     const RegisterInfo *r2_reg_info = reg_ctx->GetRegisterInfoByName("r2", 0);
+    size_t bit_width = return_clang_type.GetBitSize(&thread);
     
     if (return_clang_type.IsIntegerType (is_signed))
     {
-        size_t bit_width = return_clang_type.GetBitSize(&thread);
-        
         switch (bit_width)
         {
             default:
@@ -473,6 +474,52 @@
         uint32_t ptr = thread.GetRegisterContext()->ReadRegisterAsUnsigned(r2_reg_info, 0) & UINT32_MAX;
         value.GetScalar() = ptr;
     }
+    else if (return_clang_type.IsAggregateType ())
+    {
+        // Structure/Vector is always passed in memory and pointer to that memory is passed in r2. 
+        uint64_t mem_address = reg_ctx->ReadRegisterAsUnsigned(reg_ctx->GetRegisterInfoByName("r2", 0), 0);
+        // We have got the address. Create a memory object out of it
+        return_valobj_sp = ValueObjectMemory::Create (&thread,
+                                                      "",
+                                                      Address (mem_address, NULL),
+                                                      return_clang_type);
+        return return_valobj_sp;
+    }
+    else if (return_clang_type.IsFloatingPointType (count, is_complex))
+    {
+        const RegisterInfo *f0_info = reg_ctx->GetRegisterInfoByName("f0", 0);
+        const RegisterInfo *f1_info = reg_ctx->GetRegisterInfoByName("f1", 0);
+
+        if (count == 1 && !is_complex)
+        {
+            switch (bit_width)
+            {
+                default:
+                    return return_valobj_sp;
+                case 64:
+                {
+                    static_assert(sizeof(double) == sizeof(uint64_t), "");
+                    uint64_t raw_value;
+                    raw_value = reg_ctx->ReadRegisterAsUnsigned(f0_info, 0) & UINT32_MAX;
+                    raw_value |= ((uint64_t)(reg_ctx->ReadRegisterAsUnsigned(f1_info, 0) & UINT32_MAX)) << 32;
+                    value.GetScalar() = *reinterpret_cast<double*>(&raw_value);
+                    break;
+                }
+                case 32:
+                {
+                    static_assert(sizeof(float) == sizeof(uint32_t), "");
+                    uint32_t raw_value = reg_ctx->ReadRegisterAsUnsigned(f0_info, 0) & UINT32_MAX;
+                    value.GetScalar() = *reinterpret_cast<float*>(&raw_value);
+                    break;
+                }
+            }
+        }
+        else
+        {
+            // not handled yet
+            return return_valobj_sp;
+        }
+    }
     else
     {
         // not handled yet


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