[Lldb-commits] [PATCH] D11672: [MIPS] Handle false positives for MIPS hardware watchpoints

[Jaydeep Patil]

jaydeep created this revision.
jaydeep added a reviewer: clayborg.
jaydeep added subscribers: lldb-commits, bhushan, sagar, mohit.bhakkad, nitesh.jain.
jaydeep set the repository for this revision to rL LLVM.

Last 3bits of the watchpoint address are masked by the kernel. For example, 'n' is at 0x120010d00 and 'm' is 0x120010d04. When a watchpoint is set at 'm', then watch exception is generated even when 'n' is read/written. To handle this case, instruction at PC is emulated to find the base address of the load/store instruction. This address is then appended to the description of the stop-info packet. Client then reads this information to check whether the user has set a watchpoint on this address.

Repository:
  rL LLVM

http://reviews.llvm.org/D11672

Files:
  include/lldb/Host/common/NativeRegisterContext.h
  include/lldb/Target/StopInfo.h
  source/Host/common/NativeRegisterContext.cpp
  source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp
  source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.h
  source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp
  source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.h
  source/Plugins/Process/Linux/NativeThreadLinux.cpp
  source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
  source/Target/StopInfo.cpp

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