[Lldb-commits] [PATCH] Exception registers aren't supported outside of Darwin

[Vince Harron]

Hi clayborg,

Updated test for that

http://reviews.llvm.org/D8812

Files:
  test/python_api/lldbutil/iter/TestRegistersIterator.py

Index: test/python_api/lldbutil/iter/TestRegistersIterator.py
===================================================================
--- test/python_api/lldbutil/iter/TestRegistersIterator.py
+++ test/python_api/lldbutil/iter/TestRegistersIterator.py
@@ -19,7 +19,6 @@
         self.line1 = line_number('main.cpp', '// Set break point at this line.')
 
     @expectedFailureFreeBSD # llvm.org/pr14600 - Exception state registers not supported on FreeBSD
-    @expectedFailureLinux # llvm.org/pr14600 - Exception state registers not supported on Linux
     @python_api_test
     def test_iter_registers(self):
         """Test iterator works correctly for lldbutil.iter_registers()."""
@@ -68,21 +67,29 @@
                             print "%s => %s" % (reg.GetName(), reg.GetValue())
 
                     REGs = lldbutil.get_ESRs(frame)
-                    num = len(REGs)
-                    if self.TraceOn():
-                        print "\nNumber of exception state registers: %d" % num
-                    for reg in REGs:
-                        self.assertTrue(reg)
+                    if "darwin" in sys.platform:
+                        num = len(REGs)
                         if self.TraceOn():
-                            print "%s => %s" % (reg.GetName(), reg.GetValue())
+                            print "\nNumber of exception state registers: %d" % num
+                        for reg in REGs:
+                            self.assertTrue(reg)
+                            if self.TraceOn():
+                                print "%s => %s" % (reg.GetName(), reg.GetValue())
+                    else:
+                        self.assertIsNone(REGs)
 
                     # And these should also work.
                     for kind in ["General Purpose Registers",
-                                 "Floating Point Registers",
-                                 "Exception State Registers"]:
+                                 "Floating Point Registers"]:
                         REGs = lldbutil.get_registers(frame, kind)
                         self.assertTrue(REGs)
 
+                    REGs = lldbutil.get_registers(frame, "Exception State Registers")
+                    if "darwin" in sys.platform:
+                        self.assertIsNotNone(REGs)
+                    else:
+                        self.assertIsNone(REGs)
+
                     # We've finished dumping the registers for frame #0.
                     break

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