[Lldb-commits] [PATCH] LLDB ARM Register context support

[Hafiz Abid Qadeer]

case llvm::Triple::arm is added in different order in switches. Not a biggie but good to have same order everywhere. A few other changes seem unrelated to this patch.


================
Comment at: Host/posix/FileSystem.cpp:188
@@ -186,3 +187,3 @@
     #define CIFS_MAGIC_NUMBER 0xFF534D42
-    switch (info.f_type)
+    switch (info_ftype)
     {
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Does not seem related.

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Comment at: Host/posix/PipePosix.cpp:271
@@ -270,3 +270,3 @@
 
-            std::this_thread::sleep_for(milliseconds(OPEN_WRITER_SLEEP_TIMEOUT_MSECS));
+            //std::this_thread::sleep_for(milliseconds(OPEN_WRITER_SLEEP_TIMEOUT_MSECS));
         }
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Does not seem related to this patch. Was this intentional?

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Comment at: Plugins/Process/elf-core/ProcessElfCore.cpp:431
@@ -429,3 +430,3 @@
                  arch.GetMachine() == llvm::Triple::ppc64 ||
                  arch.GetMachine() == llvm::Triple::x86_64);
     int pr_version = data.GetU32(&offset);
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I think emaste will be best person to review this change.

http://reviews.llvm.org/D8719

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