[Lldb-commits] [PATCH] [MIPS] - Register Context for MIPS64

[Jaydeep Patil]

REPOSITORY
  rL LLVM

================
Comment at: source/Plugins/Process/Utility/RegisterContextLinux_mips64.cpp:59-67
@@ +58,11 @@
+{
+    DEFINE_GPR (gp_reg[0],  r0,   "zero",   gcc_dwarf_zero_mips64,  gcc_dwarf_zero_mips64,  LLDB_INVALID_REGNUM,    gdb_zero_mips64 ),
+    DEFINE_GPR (gp_reg[1],  r1,     "at",   gcc_dwarf_r1_mips64,    gcc_dwarf_r1_mips64,    LLDB_INVALID_REGNUM,    gdb_r1_mips64   ),
+    DEFINE_GPR (gp_reg[2],  r2,     NULL,   gcc_dwarf_r2_mips64,    gcc_dwarf_r2_mips64,    LLDB_INVALID_REGNUM,    gdb_r2_mips64   ),
+    DEFINE_GPR (gp_reg[3],  r3,     NULL,   gcc_dwarf_r3_mips64,    gcc_dwarf_r3_mips64,    LLDB_INVALID_REGNUM,    gdb_r3_mips64   ),
+    DEFINE_GPR (gp_reg[4],  r4,     NULL,   gcc_dwarf_r4_mips64,    gcc_dwarf_r4_mips64,    LLDB_INVALID_REGNUM,    gdb_r4_mips64   ),
+    DEFINE_GPR (gp_reg[5],  r5,     NULL,   gcc_dwarf_r5_mips64,    gcc_dwarf_r5_mips64,    LLDB_INVALID_REGNUM,    gdb_r5_mips64   ),
+    DEFINE_GPR (gp_reg[6],  r6,     NULL,   gcc_dwarf_r6_mips64,    gcc_dwarf_r6_mips64,    LLDB_INVALID_REGNUM,    gdb_r6_mips64   ),
+    DEFINE_GPR (gp_reg[7],  r7,     NULL,   gcc_dwarf_r7_mips64,    gcc_dwarf_r7_mips64,    LLDB_INVALID_REGNUM,    gdb_r7_mips64   ),
+    DEFINE_GPR (gp_reg[8],  r8,     NULL,   gcc_dwarf_r8_mips64,    gcc_dwarf_r8_mips64,    LLDB_INVALID_REGNUM,    gdb_r8_mips64   ),
+    DEFINE_GPR (gp_reg[9],  r9,     NULL,   gcc_dwarf_r9_mips64,    gcc_dwarf_r9_mips64,    LLDB_INVALID_REGNUM,    gdb_r9_mips64   ),
----------------
clayborg wrote:
> You will want to set the generic registers flavors for LLDB_REGNUM_GENERIC_ARG1 up to LLDB_REGNUM_GENERIC_ARG8 for the argument registers on MIPS. Not sure what they are but I would guess R1 - R4?
There are up to 8 integer (r4 to r11) and floating-point argument registers (fp12 to fp19) depending on ABI and availability of FPU. First four integer (r4 to r7) argument registers are ABI independent. We will provide generic register numbers for these registers.

http://reviews.llvm.org/D8166

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