[Lldb-commits] [lldb] r184737 - Fix some more mismatched integer types causing compiler warnings.
Andy Gibbs
andyg1001 at hotmail.co.uk
Mon Jun 24 07:04:57 PDT 2013
Author: andyg
Date: Mon Jun 24 09:04:57 2013
New Revision: 184737
URL: http://llvm.org/viewvc/llvm-project?rev=184737&view=rev
Log:
Fix some more mismatched integer types causing compiler warnings.
Modified:
lldb/trunk/source/Interpreter/Options.cpp
lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
lldb/trunk/source/Plugins/Instruction/ARM/EmulationStateARM.cpp
Modified: lldb/trunk/source/Interpreter/Options.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Interpreter/Options.cpp?rev=184737&r1=184736&r2=184737&view=diff
==============================================================================
--- lldb/trunk/source/Interpreter/Options.cpp (original)
+++ lldb/trunk/source/Interpreter/Options.cpp Mon Jun 24 09:04:57 2013
@@ -498,7 +498,7 @@ Options::GenerateOptionUsage
if (num_options == 0)
return;
- int num_option_sets = GetRequiredOptions().size();
+ uint32_t num_option_sets = GetRequiredOptions().size();
uint32_t i;
Modified: lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp?rev=184737&r1=184736&r2=184737&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp (original)
+++ lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp Mon Jun 24 09:04:57 2013
@@ -4092,8 +4092,8 @@ EmulateInstructionARM::EmulateSTM (const
GetRegisterInfo (eRegisterKindDWARF, dwarf_r0 + n, base_reg);
// for i = 0 to 14
- int lowest_set_bit = 14;
- for (int i = 0; i < 14; ++i)
+ uint32_t lowest_set_bit = 14;
+ for (uint32_t i = 0; i < 14; ++i)
{
// if registers<i> == '1' then
if (BitIsSet (registers, i))
@@ -4217,8 +4217,8 @@ EmulateInstructionARM::EmulateSTMDA (con
GetRegisterInfo (eRegisterKindDWARF, dwarf_r0 + n, base_reg);
// for i = 0 to 14
- int lowest_bit_set = 14;
- for (int i = 0; i < 14; ++i)
+ uint32_t lowest_bit_set = 14;
+ for (uint32_t i = 0; i < 14; ++i)
{
// if registers<i> == '1' then
if (BitIsSet (registers, i))
@@ -4369,7 +4369,7 @@ EmulateInstructionARM::EmulateSTMDB (con
// for i = 0 to 14
uint32_t lowest_set_bit = 14;
- for (int i = 0; i < 14; ++i)
+ for (uint32_t i = 0; i < 14; ++i)
{
// if registers<i> == '1' then
if (BitIsSet (registers, i))
@@ -4494,7 +4494,7 @@ EmulateInstructionARM::EmulateSTMIB (con
uint32_t lowest_set_bit = 14;
// for i = 0 to 14
- for (int i = 0; i < 14; ++i)
+ for (uint32_t i = 0; i < 14; ++i)
{
// if registers<i> == '1' then
if (BitIsSet (registers, i))
@@ -10940,7 +10940,7 @@ EmulateInstructionARM::EmulateVSTM (cons
context.type = eContextRegisterStore;
// for r = 0 to regs-1
- for (int r = 0; r < regs; ++r)
+ for (uint32_t r = 0; r < regs; ++r)
{
if (single_regs)
@@ -11403,11 +11403,11 @@ EmulateInstructionARM::EmulateVLD1Multip
}
// for r = 0 to regs-1
- for (int r = 0; r < regs; ++r)
+ for (uint32_t r = 0; r < regs; ++r)
{
// for e = 0 to elements-1
uint64_t assembled_data = 0;
- for (int e = 0; e < elements; ++e)
+ for (uint32_t e = 0; e < elements; ++e)
{
// Elem[D[d+r],e,esize] = MemU[address,ebytes];
context.type = eContextRegisterLoad;
@@ -11742,7 +11742,7 @@ EmulateInstructionARM::EmulateVST1Multip
RegisterInfo data_reg;
context.type = eContextRegisterStore;
// for r = 0 to regs-1
- for (int r = 0; r < regs; ++r)
+ for (uint32_t r = 0; r < regs; ++r)
{
GetRegisterInfo (eRegisterKindDWARF, dwarf_d0 + d + r, data_reg);
uint64_t register_data = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_d0 + d + r, 0, &success);
@@ -11750,7 +11750,7 @@ EmulateInstructionARM::EmulateVST1Multip
return false;
// for e = 0 to elements-1
- for (int e = 0; e < elements; ++e)
+ for (uint32_t e = 0; e < elements; ++e)
{
// MemU[address,ebytes] = Elem[D[d+r],e,esize];
uint64_t word = Bits64 (register_data, ((e + 1) * esize) - 1, e * esize);
@@ -12046,11 +12046,11 @@ EmulateInstructionARM::EmulateVLD1Single
uint64_t replicated_element = 0;
uint32_t esize = ebytes * 8;
- for (int e = 0; e < elements; ++e)
+ for (uint32_t e = 0; e < elements; ++e)
replicated_element = (replicated_element << esize) | Bits64 (word, esize - 1, 0);
// for r = 0 to regs-1
- for (int r = 0; r < regs; ++r)
+ for (uint32_t r = 0; r < regs; ++r)
{
// D[d+r] = replicated_element;
if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_d0 + d + r, replicated_element))
Modified: lldb/trunk/source/Plugins/Instruction/ARM/EmulationStateARM.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Instruction/ARM/EmulationStateARM.cpp?rev=184737&r1=184736&r2=184737&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Instruction/ARM/EmulationStateARM.cpp (original)
+++ lldb/trunk/source/Plugins/Instruction/ARM/EmulationStateARM.cpp Mon Jun 24 09:04:57 2013
@@ -349,7 +349,7 @@ EmulationStateARM::LoadStateFromDictiona
uint32_t num_elts = mem_array->GetSize();
uint32_t address = (uint32_t) start_address;
- for (int i = 0; i < num_elts; ++i)
+ for (uint32_t i = 0; i < num_elts; ++i)
{
value_sp = mem_array->GetValueAtIndex (i);
if (value_sp.get() == NULL)
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