[Lldb-commits] [lldb] r180143 - Added 64-bit POSIX support to write floating-point vector registers.
Ashok Thirumurthi
ashok.thirumurthi at intel.com
Tue Apr 23 13:50:34 PDT 2013
Author: athirumu
Date: Tue Apr 23 15:50:34 2013
New Revision: 180143
URL: http://llvm.org/viewvc/llvm-project?rev=180143&view=rev
Log:
Added 64-bit POSIX support to write floating-point vector registers.
- Includes tests that write, read and verify vector register content.
Reviewed by: Daniel Malea
Modified:
lldb/trunk/source/Plugins/Process/POSIX/RegisterContext_x86_64.cpp
lldb/trunk/test/functionalities/register/TestRegisters.py
Modified: lldb/trunk/source/Plugins/Process/POSIX/RegisterContext_x86_64.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/POSIX/RegisterContext_x86_64.cpp?rev=180143&r1=180142&r2=180143&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/POSIX/RegisterContext_x86_64.cpp (original)
+++ lldb/trunk/source/Plugins/Process/POSIX/RegisterContext_x86_64.cpp Tue Apr 23 15:50:34 2013
@@ -698,7 +698,15 @@ RegisterContext_x86_64::WriteRegister(co
switch (reg)
{
default:
- return false;
+ if (reg_info->encoding != eEncodingVector)
+ return false;
+
+ if (reg >= fpu_stmm0 && reg <= fpu_stmm7)
+ ::memcpy (user.i387.stmm[reg - fpu_stmm0].bytes, value.GetBytes(), value.GetByteSize());
+
+ if (reg >= fpu_xmm0 && reg <= fpu_xmm15)
+ ::memcpy (user.i387.xmm[reg - fpu_xmm0].bytes, value.GetBytes(), value.GetByteSize());
+ break;
case fpu_dp:
user.i387.dp = value.GetAsUInt64();
break;
Modified: lldb/trunk/test/functionalities/register/TestRegisters.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/functionalities/register/TestRegisters.py?rev=180143&r1=180142&r2=180143&view=diff
==============================================================================
--- lldb/trunk/test/functionalities/register/TestRegisters.py (original)
+++ lldb/trunk/test/functionalities/register/TestRegisters.py Tue Apr 23 15:50:34 2013
@@ -91,6 +91,14 @@ class RegisterCommandsTestCase(TestBase)
self.expect("register read " + register,
substrs = [register + ' = 0x'])
+ def vector_write_and_read(self, frame, register, new_value):
+ value = frame.FindValue(register, lldb.eValueTypeRegister)
+ self.assertTrue(value.IsValid(), "finding a value for register " + register)
+
+ self.runCmd("register write " + register + " \'" + new_value + "\'")
+ self.expect("register read " + register,
+ substrs = [register + ' = ', new_value])
+
def fp_register_write(self):
exe = os.path.join(os.getcwd(), "a.out")
@@ -121,7 +129,16 @@ class RegisterCommandsTestCase(TestBase)
self.write_and_restore(currentFrame, "mxcsr")
self.write_and_restore(currentFrame, "mxcsrmask")
- @expectedFailureLinux # bugzilla 14661 - Expressions involving XMM registers fail on Linux
+ new_value = "{0x01 0x02 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x00}"
+ self.vector_write_and_read(currentFrame, "stmm0", new_value)
+ new_value = "{0x01 0x02 0x03 0x00 0x00 0x00 0x00 0x00 0x09 0x0a}"
+ self.vector_write_and_read(currentFrame, "stmm7", new_value)
+
+ new_value = "{0x01 0x02 0x03 0x00 0x00 0x00 0x00 0x00 0x09 0x0a 0x2f 0x2f 0x2f 0x2f 0x2f 0x2f}"
+ self.vector_write_and_read(currentFrame, "xmm0", new_value)
+ new_value = "{0x01 0x02 0x03 0x00 0x00 0x00 0x00 0x00 0x09 0x0a 0x2f 0x2f 0x2f 0x2f 0x0e 0x0f}"
+ self.vector_write_and_read(currentFrame, "xmm15", new_value)
+
def register_expressions(self):
"""Test expression evaluation with commands related to registers."""
self.common_setup()
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