[Lldb-commits] [lldb] r132501 - in /lldb/trunk/source/Plugins: Instruction/ARM/EmulateInstructionARM.cpp Process/Utility/ARMDefines.h Process/Utility/ARMUtils.h

Greg Clayton gclayton at apple.com
Thu Jun 2 15:23:36 PDT 2011


Author: gclayton
Date: Thu Jun  2 17:23:35 2011
New Revision: 132501

URL: http://llvm.org/viewvc/llvm-project?rev=132501&view=rev
Log:
Remove asserts that will crash LLDB. These should be changed to return
true/false in an extra boolean parameter and not cause the the binary that
us using the LLDB framework to crash.


Modified:
    lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
    lldb/trunk/source/Plugins/Process/Utility/ARMDefines.h
    lldb/trunk/source/Plugins/Process/Utility/ARMUtils.h

Modified: lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp?rev=132501&r1=132500&r2=132501&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp (original)
+++ lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp Thu Jun  2 17:23:35 2011
@@ -81,7 +81,7 @@
 // Update ITState if necessary.
 void ITSession::ITAdvance()
 {
-    assert(ITCounter);
+    //assert(ITCounter);
     --ITCounter;
     if (ITCounter == 0)
         ITState = 0;
@@ -3113,11 +3113,11 @@
 bool
 EmulateInstructionARM::EmulateShiftImm (const uint32_t opcode, const ARMEncoding encoding, ARM_ShifterType shift_type)
 {
-    assert(shift_type == SRType_ASR 
-           || shift_type == SRType_LSL 
-           || shift_type == SRType_LSR 
-           || shift_type == SRType_ROR
-           || shift_type == SRType_RRX);
+//    assert(shift_type == SRType_ASR 
+//           || shift_type == SRType_LSL 
+//           || shift_type == SRType_LSR 
+//           || shift_type == SRType_ROR
+//           || shift_type == SRType_RRX);
 
     bool success = false;
 
@@ -3142,7 +3142,7 @@
         switch (use_encoding) {
         case eEncodingT1:
             // Due to the above special case handling!
-            assert(shift_type != SRType_ROR);
+            //assert(shift_type != SRType_ROR);
 
             Rd = Bits32(opcode, 2, 0);
             Rm = Bits32(opcode, 5, 3);
@@ -3151,7 +3151,7 @@
             break;
         case eEncodingT2:
             // A8.6.141 RRX
-            assert(shift_type != SRType_RRX);
+            //assert(shift_type != SRType_RRX);
 
             Rd = Bits32(opcode, 11, 8);
             Rm = Bits32(opcode, 3, 0);
@@ -3198,10 +3198,10 @@
 bool
 EmulateInstructionARM::EmulateShiftReg (const uint32_t opcode, const ARMEncoding encoding, ARM_ShifterType shift_type)
 {
-    assert(shift_type == SRType_ASR
-           || shift_type == SRType_LSL
-           || shift_type == SRType_LSR
-           || shift_type == SRType_ROR);
+    // assert(shift_type == SRType_ASR
+    //        || shift_type == SRType_LSL
+    //        || shift_type == SRType_LSR
+    //        || shift_type == SRType_ROR);
 
     bool success = false;
 
@@ -12877,7 +12877,7 @@
             }
             else
             {
-                assert (byte_size == 4);
+                //assert (byte_size == 4);
                 if (Bits32(opcode, 31, 27) == 0x1e &&
                     Bits32(opcode, 15, 14) == 0x02 &&
                     Bits32(opcode, 12, 12) == 0x00 &&
@@ -13153,7 +13153,7 @@
         }
         else
         {
-            assert(0 && "Invalid register number");
+            //assert(0 && "Invalid register number");
             *success = false;
             return UINT32_MAX;
         }

Modified: lldb/trunk/source/Plugins/Process/Utility/ARMDefines.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/ARMDefines.h?rev=132501&r1=132500&r2=132501&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/ARMDefines.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/ARMDefines.h Thu Jun  2 17:23:35 2011
@@ -21,7 +21,8 @@
     SRType_LSR,
     SRType_ASR,
     SRType_ROR,
-    SRType_RRX
+    SRType_RRX,
+    SRType_Invalid
 } ARM_ShifterType;
 
 // ARM conditions          // Meaning (integer)         Meaning (floating-point)      Condition flags

Modified: lldb/trunk/source/Plugins/Process/Utility/ARMUtils.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/ARMUtils.h?rev=132501&r1=132500&r2=132501&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/ARMUtils.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/ARMUtils.h Thu Jun  2 17:23:35 2011
@@ -27,7 +27,8 @@
 {
     switch (type) {
     default:
-        assert(0 && "Invalid shift type");
+        //assert(0 && "Invalid shift type");
+        return UINT32_MAX;
     case 0:
         shift_t = SRType_LSL;
         return imm5;
@@ -75,7 +76,8 @@
 {
     switch (type) {
     default:
-        assert(0 && "Invalid shift type");
+        //assert(0 && "Invalid shift type");
+        return SRType_Invalid;
     case 0:
         return SRType_LSL;
     case 1:
@@ -89,14 +91,14 @@
 
 static inline uint32_t LSL_C(const uint32_t value, const uint32_t amount, uint32_t &carry_out)
 {
-    assert(amount > 0);
+    //assert(amount > 0);
     carry_out = amount <= 32 ? Bit32(value, 32 - amount) : 0;
     return value << amount;
 }
 
 static inline uint32_t LSL(const uint32_t value, const uint32_t amount)
 {
-    assert(amount >= 0);
+    //assert(amount >= 0);
     if (amount == 0)
         return value;
     uint32_t dont_care;
@@ -105,14 +107,14 @@
 
 static inline uint32_t LSR_C(const uint32_t value, const uint32_t amount, uint32_t &carry_out)
 {
-    assert(amount > 0);
+    //assert(amount > 0);
     carry_out = amount <= 32 ? Bit32(value, amount - 1) : 0;
     return value >> amount;
 }
 
 static inline uint32_t LSR(const uint32_t value, const uint32_t amount)
 {
-    assert(amount >= 0);
+    //assert(amount >= 0);
     if (amount == 0)
         return value;
     uint32_t dont_care;
@@ -121,7 +123,7 @@
 
 static inline uint32_t ASR_C(const uint32_t value, const uint32_t amount, uint32_t &carry_out)
 {
-    assert(amount > 0 && amount <= 32);
+    //assert(amount > 0 && amount <= 32);
     bool negative = BitIsSet(value, 31);
     if (amount <= 32)
     {
@@ -138,7 +140,7 @@
 
 static inline uint32_t ASR(const uint32_t value, const uint32_t amount)
 {
-    assert(amount >= 0);
+    //assert(amount >= 0);
     if (amount == 0)
         return value;
     uint32_t dont_care;
@@ -147,7 +149,7 @@
 
 static inline uint32_t ROR_C(const uint32_t value, const uint32_t amount, uint32_t &carry_out)
 {
-    assert(amount > 0);
+    //assert(amount > 0);
     uint32_t amt = amount % 32;
     uint32_t result = Rotr32(value, amt);
     carry_out = Bit32(value, 31);
@@ -156,7 +158,7 @@
 
 static inline uint32_t ROR(const uint32_t value, const uint32_t amount)
 {
-    assert(amount >= 0);
+    //assert(amount >= 0);
     if (amount == 0)
         return value;
     uint32_t dont_care;
@@ -178,7 +180,7 @@
 static inline uint32_t Shift_C(const uint32_t value, ARM_ShifterType type, const uint32_t amount,
                                const uint32_t carry_in, uint32_t &carry_out)
 {
-    assert(type != SRType_RRX || amount == 1);
+    //assert(type != SRType_RRX || amount == 1);
     if (amount == 0)
     {
         carry_out = carry_in;





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