[Lldb-commits] [lldb] r131418 - in /lldb/trunk: scripts/Python/modify-python-lldb.py test/python_api/lldbutil/iter/TestRegistersIterator.py
Johnny Chen
johnny.chen at apple.com
Mon May 16 13:31:18 PDT 2011
Author: johnny
Date: Mon May 16 15:31:18 2011
New Revision: 131418
URL: http://llvm.org/viewvc/llvm-project?rev=131418&view=rev
Log:
Add implementation of built-in function len() for those lldb containers with
unambiguous iteration support. So that we could, for example:
...
REGs = lldbutil.get_GPRs(frame)
print "Number of general purpose registers: %d" % len(REGs)
for reg in REGs:
print "%s => %s" %(reg.GetName(), reg.GetValue())
...
Modified:
lldb/trunk/scripts/Python/modify-python-lldb.py
lldb/trunk/test/python_api/lldbutil/iter/TestRegistersIterator.py
Modified: lldb/trunk/scripts/Python/modify-python-lldb.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/scripts/Python/modify-python-lldb.py?rev=131418&r1=131417&r2=131418&view=diff
==============================================================================
--- lldb/trunk/scripts/Python/modify-python-lldb.py (original)
+++ lldb/trunk/scripts/Python/modify-python-lldb.py Mon May 16 15:31:18 2011
@@ -41,6 +41,11 @@
module_iter = " def module_iter(self): return lldb_iter(self, '%s', '%s')"
breakpoint_iter = " def breakpoint_iter(self): return lldb_iter(self, '%s', '%s')"
#
+# Called to implement the built-in function len().
+# Eligible objects are those containers with unambiguous iteration support.
+#
+len_def = " def __len__(self): return self.%s()"
+#
# This supports the rich comparison methods of __eq__ and __ne__.
eq_def = " def __eq__(self, other): return isinstance(other, %s) and %s"
ne_def = " def __ne__(self, other): return not self.__eq__(other)"
@@ -104,7 +109,7 @@
# The pattern for recognizing the beginning of the __init__ method definition.
init_pattern = re.compile("^ def __init__\(self, \*args\):")
-# These define the states of our state machine.
+# These define the states of our finite state machine.
NORMAL = 0
DEFINING_ITERATOR = 1
DEFINING_EQUALITY = 2
@@ -140,6 +145,7 @@
else:
if (state & DEFINING_ITERATOR):
print >> new_content, iter_def % d[cls]
+ print >> new_content, len_def % d[cls][0]
if (state & DEFINING_EQUALITY):
print >> new_content, eq_def % (cls, list_to_frag(e[cls]))
print >> new_content, ne_def
Modified: lldb/trunk/test/python_api/lldbutil/iter/TestRegistersIterator.py
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/test/python_api/lldbutil/iter/TestRegistersIterator.py?rev=131418&r1=131417&r2=131418&view=diff
==============================================================================
--- lldb/trunk/test/python_api/lldbutil/iter/TestRegistersIterator.py (original)
+++ lldb/trunk/test/python_api/lldbutil/iter/TestRegistersIterator.py Mon May 16 15:31:18 2011
@@ -43,25 +43,45 @@
for thread in self.process:
if thread.GetStopReason() == lldb.eStopReasonBreakpoint:
for frame in thread:
- # Dump the registers of this frame using iter_registers().
+ # Dump the registers of this frame using lldbutil.get_GPRs() and friends.
if self.TraceOn():
print frame
+ REGs = lldbutil.get_GPRs(frame)
+ num = len(REGs)
+ if self.TraceOn():
+ print "\nNumber of general purpose registers: %d" % num
+ for reg in REGs:
+ self.assertTrue(reg.IsValid())
+ if self.TraceOn():
+ print "%s => %s" % (reg.GetName(), reg.GetValue(frame))
+
+ REGs = lldbutil.get_FPRs(frame)
+ num = len(REGs)
+ if self.TraceOn():
+ print "\nNumber of floating point registers: %d" % num
+ for reg in REGs:
+ self.assertTrue(reg.IsValid())
+ if self.TraceOn():
+ print "%s => %s" % (reg.GetName(), reg.GetValue(frame))
+
+ REGs = lldbutil.get_ESRs(frame)
+ num = len(REGs)
+ if self.TraceOn():
+ print "\nNumber of exception state registers: %d" % num
+ for reg in REGs:
+ self.assertTrue(reg.IsValid())
+ if self.TraceOn():
+ print "%s => %s" % (reg.GetName(), reg.GetValue(frame))
+
+ # And these should also work.
for kind in ["General Purpose Registers",
"Floating Point Registers",
"Exception State Registers"]:
REGs = lldbutil.get_registers(frame, kind)
- if self.TraceOn():
- print "%s:" % kind
- for reg in REGs:
- self.assertTrue(reg.IsValid())
- if self.TraceOn():
- print "%s => %s" % (reg.GetName(), reg.GetValue(frame))
+ self.assertTrue(REGs.IsValid())
- # And these should also work.
- self.assertTrue(lldbutil.get_GPRs(frame))
- self.assertTrue(lldbutil.get_FPRs(frame))
- self.assertTrue(lldbutil.get_ESRs(frame))
+ # We've finished dumping the registers for frame #0.
break
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