[libcxx-commits] [openmp] [flang] [llvm] [libcxxabi] [libcxx] [mlir] [compiler-rt] [libc] [clang] [clang-tools-extra] [AArch64] Combine store (trunc X to <3 x i8>) to sequence of ST1.b. (PR #78637)
Florian Hahn via libcxx-commits
libcxx-commits at lists.llvm.org
Wed Jan 24 06:54:49 PST 2024
================
@@ -21471,6 +21471,57 @@ bool isHalvingTruncateOfLegalScalableType(EVT SrcVT, EVT DstVT) {
(SrcVT == MVT::nxv2i64 && DstVT == MVT::nxv2i32);
}
+// Combine store (trunc X to <3 x i8>) to sequence of ST1.b.
+static SDValue combineI8TruncStore(StoreSDNode *ST, SelectionDAG &DAG,
+ const AArch64Subtarget *Subtarget) {
+ SDValue Value = ST->getValue();
+ EVT ValueVT = Value.getValueType();
+
+ if (ST->isVolatile() || !Subtarget->isLittleEndian() ||
+ ST->getOriginalAlign() >= 4 || Value.getOpcode() != ISD::TRUNCATE ||
----------------
fhahn wrote:
Removed the check and added now tests with different alignments; the alignment impacts load codegen only.
https://github.com/llvm/llvm-project/pull/78637
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