[libcxx-commits] [libcxx] [libcxx] Adjust inline assembly constraints for the AMDGPU target (PR #101747)

[Joseph Huber via libcxx-commits]

================
@@ -291,17 +291,27 @@ struct is_same<T, T> { enum {value = 1}; };
 // when optimizations are enabled.
 template <class Tp>
 inline Tp const& DoNotOptimize(Tp const& value) {
-    asm volatile("" : : "r,m"(value) : "memory");
-    return value;
+  // The `m` constraint is invalid in the AMDGPU backend.
----------------
jhuber6 wrote:

> 'm' A memory operand is allowed, with any kind of address that the machine supports in general. Note that the letter used for the general memory constraint can be re-defined by a back end using the TARGET_MEM_CONSTRAINT macro.

According to the GNU docs, but I just found it didn't work in practice.

https://github.com/llvm/llvm-project/pull/101747