[libcxx-commits] [PATCH] D145225: [libunwind][RISC-V] Rewrite testcase with C as possible.

[Kito Cheng via Phabricator via libcxx-commits]

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Fix #60472

The testcase is writen in all inline asm but it seems not well
maintained for the CFI directive, of cause we can fix that, but this
patch also contain another issue is it use s0 and s1 without
store/restore.

This patch proposed another way to testing that, use inline asm to
generate dummy def and use, so compiler will generate store/restore for
the vector register, and then generate the CFI directives.

Also check __riscv_vector as the testcase guard, because the testcase
will read vlenb which is only available when V or zve* extensions is
present.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D145225

Files:
  libunwind/test/unwind_scalable_vectors.pass.cpp


Index: libunwind/test/unwind_scalable_vectors.pass.cpp
===================================================================
--- libunwind/test/unwind_scalable_vectors.pass.cpp
+++ libunwind/test/unwind_scalable_vectors.pass.cpp
@@ -13,29 +13,7 @@
 #include <assert.h>
 #include <libunwind.h>
 
-// Check correct unwinding of frame with VLENB-sized objects (vector registers):
-// 1. Save return address (ra) in temporary register.
-// 2. Load VLENB (vector length in bytes) and substract it from current stack
-//    pointer (sp) - equivalent to one vector register on stack frame.
-// 3. Set DWARF cannonical frame address (CFA) to "sp + vlenb" expresssion so it
-//    can be correctly unwinded.
-// 4. Call stepper() function and check that 2 unwind steps are successful -
-//    from stepper() into foo() and from foo() into main().
-// 5. Restore stack pointer and return address.
-__attribute__((naked)) static void foo() {
-  __asm__(".cfi_startproc\n"
-          "mv s0, ra\n"
-          "csrr  s1, vlenb\n"
-          "sub sp, sp, s1\n"
-          "# .cfi_def_cfa_expression sp + vlenb\n"
-          ".cfi_escape 0x0f, 0x07, 0x72, 0x00, 0x92, 0xa2, 0x38, 0x00, 0x22\n"
-          "call stepper\n"
-          "add sp, sp, s1\n"
-          "mv ra, s0\n"
-          "ret\n"
-          ".cfi_endproc\n");
-}
-
+#ifdef __riscv_vector
 extern "C" void stepper() {
   unw_cursor_t cursor;
   unw_context_t uc;
@@ -47,4 +25,16 @@
   assert(unw_step(&cursor) > 0);
 }
 
+// Check correct unwinding of frame with VLENB-sized objects (vector registers).
+void foo() {
+  __rvv_int32m1_t v;
+  asm volatile("#" : "=vr"(v)); // Dummy inline asm to def v.
+  stepper();                    // def-use of v has cross the function, so that
+                                // will triger spill/reload to/from the stack.
+  asm volatile("#" ::"vr"(v));  // Dummy inline asm to use v.
+}
+
 int main() { foo(); }
+#else
+int main() { return 0; }
+#endif


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