[libcxx-commits] [PATCH] D91906: Multiple preprocessor fixes for libunwind on PowerPC*.
Brandon Bergren via Phabricator via libcxx-commits
libcxx-commits at lists.llvm.org
Fri Nov 20 20:08:53 PST 2020
Bdragon28 created this revision.
Bdragon28 added reviewers: MaskRay, jhibbits.
Bdragon28 added a project: PowerPC.
Herald added subscribers: libcxx-commits, llvm-commits, steven.zhang, shchenz, nemanjai.
Herald added projects: LLVM, libunwind.
Herald added a reviewer: libunwind.
Bdragon28 requested review of this revision.
- Remove misnamed PPC64_HAS_VMX in preference of directly checking defined(__VSX__).
libunwind was using "VMX" to mean "VSX". "VMX" is just another name for Altivec, while "VSX" is the vector-scalar extensions first used in POWER7. Exposing a "PPC64_HAS_VMX" define was misleading and incorrect.
- Add defined(__ALTIVEC__) guards around vector register operations to fix non-altivec CPUS such as the e5500.
When compiling for certain Book-E processors such as the e5500, we want to skip vector save/restore, as the Altivec registers are illegal on non-Altivec implementations.
- Add !defined(__NO_FPRS__) guards around traditional floating-point save/restore.
When compiling for powerpcspe, we cannot access floating point registers, as there aren't any. (The SPE on e500v2 is a 64-bit extension of the GPRs, and it doesn't have the normal floating-point registers at all.)
This fixes building for powerpcspe, although no actual handling for SPE save/restore is written yet.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D91906
Files:
libunwind/src/Registers.hpp
libunwind/src/UnwindRegistersRestore.S
libunwind/src/UnwindRegistersSave.S
libunwind/src/assembly.h
libunwind/src/config.h
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