[libcxx-commits] [PATCH] D80690: [RISCV] Support libunwind for riscv32

kamlesh kumar via Phabricator via libcxx-commits libcxx-commits at lists.llvm.org
Thu May 28 01:02:44 PDT 2020


kamleshbhalui marked an inline comment as done.
kamleshbhalui added inline comments.


================
Comment at: libunwind/src/UnwindRegistersRestore.S:1085-1116
+  fload    f0, (RISCV_FOFFSET + RISCV_FSIZE * 0)(a0)
+  fload    f1, (RISCV_FOFFSET + RISCV_FSIZE * 1)(a0)
+  fload    f2, (RISCV_FOFFSET + RISCV_FSIZE * 2)(a0)
+  fload    f3, (RISCV_FOFFSET + RISCV_FSIZE * 3)(a0)
+  fload    f4, (RISCV_FOFFSET + RISCV_FSIZE * 4)(a0)
+  fload    f5, (RISCV_FOFFSET + RISCV_FSIZE * 5)(a0)
+  fload    f6, (RISCV_FOFFSET + RISCV_FSIZE * 6)(a0)
----------------
luismarques wrote:
> If we are going to use a preprocessed instruction name (which I'm not sure we should) then at least the name should be ALL CAPS to make it obvious that it's a preprocessor definition, not a regular instruction.
This is good idea.
thanks. will incorporate this.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D80690/new/

https://reviews.llvm.org/D80690





More information about the libcxx-commits mailing list