[libcxx-commits] [PATCH] D78931: [libunwind][RISCV] Track PC separately from RA

[Sam Elliott via Phabricator via libcxx-commits]

lenary added a comment.

In D78931#2005664 <https://reviews.llvm.org/D78931#2005664>, @Amanieu wrote:

> The RISC-V unwinding spec is pretty bare: https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md#dwarf
>
> I had a look at libgcc, it tracks the PC separately from the other dwarf registers. The value modified by _Unwind_SetIP is separate from any of the values controlled by _Unwind_SetGR.
>
> The way I am currently getting backtraces from a signal handler is to use unw_set_reg to initialize all the register from my sigcontext, and then using unw_set_reg(UNW_REG_IP) to set the PC. This only works if the PC is tracked separately from the return address register. This works fine on other targets (ARM, ARM64) where this is already the case.


Looking at this, it seems RISC-V is currently an exceptional case for tracking its pc in a GPR slot, and this change would bring RISC-V much closer to how other targets are defined (like ARM and AArch64, as you point out). I am still a little wary of doing so, as I'm not sure what libraries we need to maintain compatibility with.

Do you have a link to how libgcc implements this for risc-v? I couldn't find code when searching the repositories (either mainline gcc or riscv-gcc on github), but maybe I'm missing something.


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https://reviews.llvm.org/D78931