[Libclc-dev] [PATCH 1/2] atomic: Add generic bitcode implementation of atomic_max

[Matt Arsenault]

On Sep 8, 2014, at 12:31 PM, Aaron Watry <awatry at gmail.com> wrote:

> Not used yet...
> 
> Signed-off-by: Aaron Watry <awatry at gmail.com>
> ---
> generic/include/clc/atomic/atomic_max.h |  3 +++
> generic/include/clc/clc.h               |  1 +
> generic/lib/atomic/atomic_impl.ll       | 12 ++++++++++++
> 3 files changed, 16 insertions(+)
> create mode 100644 generic/include/clc/atomic/atomic_max.h
> 
> diff --git a/generic/include/clc/atomic/atomic_max.h b/generic/include/clc/atomic/atomic_max.h
> new file mode 100644
> index 0000000..30dc180
> --- /dev/null
> +++ b/generic/include/clc/atomic/atomic_max.h
> @@ -0,0 +1,3 @@
> +#define __CLC_FUNCTION atomic_max
> +#include <clc/atomic/atomic_decl.inc>
> +#undef __CLC_FUNCTION
> diff --git a/generic/include/clc/clc.h b/generic/include/clc/clc.h
> index b8c1cb9..b492c54 100644
> --- a/generic/include/clc/clc.h
> +++ b/generic/include/clc/clc.h
> @@ -143,6 +143,7 @@
> #include <clc/atomic/atomic_add.h>
> #include <clc/atomic/atomic_dec.h>
> #include <clc/atomic/atomic_inc.h>
> +#include <clc/atomic/atomic_max.h>
> #include <clc/atomic/atomic_sub.h>
> 
> /* cl_khr_global_int32_base_atomics Extension Functions */
> diff --git a/generic/lib/atomic/atomic_impl.ll b/generic/lib/atomic/atomic_impl.ll
> index 9df5b9f..4e228e8 100644
> --- a/generic/lib/atomic/atomic_impl.ll
> +++ b/generic/lib/atomic/atomic_impl.ll
> @@ -10,6 +10,18 @@ entry:
>   ret i32 %0
> }
> 
> +define i32 @__clc_atomic_max_addr1(i32 addrspace(1)* nocapture %ptr, i32 %value) nounwind alwaysinline {
> +entry:
> +  %0 = atomicrmw volatile max i32 addrspace(1)* %ptr, i32 %value seq_cst
> +  ret i32 %0
> +}

Why is it necessary to mark these with volatile (though I never remember whether it’s the atom_* or atomic_* functions which is supposed to be volatile)


> +
> +define i32 @__clc_atomic_max_addr3(i32 addrspace(3)* nocapture %ptr, i32 %value) nounwind alwaysinline {
> +entry:
> +  %0 = atomicrmw volatile max i32 addrspace(3)* %ptr, i32 %value seq_cst
> +  ret i32 %0
> +}
> +
> define i32 @__clc_atomic_sub_addr1(i32 addrspace(1)* nocapture %ptr, i32 %value) nounwind alwaysinline {
> entry:
>   %0 = atomicrmw volatile sub i32 addrspace(1)* %ptr, i32 %value seq_cst
> -- 
> 1.9.1
> 
> 
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