[Libclc-dev] [PATCH 1/1] R600: Add new intrinsic to read work dimensions

[Matt Arsenault]

On 07/30/2014 04:11 PM, Jan Vesely wrote:
> CC: Tom Stellard <tom at stellard.net>
> CC: Matt Arsenault <Matthew.Arsenault at amd.com>
>
> Signed-off-by: Jan Vesely <jan.vesely at rutgers.edu>
> ---
>   include/llvm/IR/IntrinsicsR600.td    | 2 ++
>   lib/Target/R600/R600ISelLowering.cpp | 6 ++++--
>   2 files changed, 6 insertions(+), 2 deletions(-)
Needs a test for the intrinsic

> diff --git a/include/llvm/IR/IntrinsicsR600.td b/include/llvm/IR/IntrinsicsR600.td
> index ba69eaa..37a9771 100644
> --- a/include/llvm/IR/IntrinsicsR600.td
> +++ b/include/llvm/IR/IntrinsicsR600.td
> @@ -33,6 +33,8 @@ defm int_r600_read_tgid : R600ReadPreloadRegisterIntrinsic_xyz <
>                                          "__builtin_r600_read_tgid">;
>   defm int_r600_read_tidig : R600ReadPreloadRegisterIntrinsic_xyz <
>                                          "__builtin_r600_read_tidig">;
> +def int_r600_read_workdim : R600ReadPreloadRegisterIntrinsic <
> +                                       "__builtin_r600_read_workdim">;
>   
>   } // End TargetPrefix = "r600"
We're trying to move the intrinsics to use the amdgpu name instead, 
although all the others use r600 now so it might be best to change them 
all at once.

>   
> diff --git a/lib/Target/R600/R600ISelLowering.cpp b/lib/Target/R600/R600ISelLowering.cpp
> index 4c603f8..1c59684 100644
> --- a/lib/Target/R600/R600ISelLowering.cpp
> +++ b/lib/Target/R600/R600ISelLowering.cpp
> @@ -805,6 +805,8 @@ SDValue R600TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const
>         return LowerImplicitParameter(DAG, VT, DL, 7);
>       case Intrinsic::r600_read_local_size_z:
>         return LowerImplicitParameter(DAG, VT, DL, 8);
> +    case Intrinsic::r600_read_workdim:
> +      return LowerImplicitParameter(DAG, VT, DL, 9);
>   
>       case Intrinsic::r600_read_tgid_x:
>         return CreateLiveInRegister(DAG, &AMDGPU::R600_TReg32RegClass,
> @@ -1722,7 +1724,7 @@ SDValue R600TargetLowering::LowerFormalArguments(
>       // being invalid. Somehow this seems to work with i64 arguments, but breaks
>       // for <1 x i64>.
>   
> -    // The first 36 bytes of the input buffer contains information about
> +    // The first 40 bytes of the input buffer contains information about
>       // thread group and global sizes.
I think we should probably round this up to some larger number since 
it's likely more will need to be added in the future

>   
>       // FIXME: This should really check the extload type, but the handling of
> @@ -1730,7 +1732,7 @@ SDValue R600TargetLowering::LowerFormalArguments(
>       //ISD::LoadExtType Ext = Ins[i].Flags.isSExt() ? ISD::SEXTLOAD : ISD::ZEXTLOAD;
>       ISD::LoadExtType Ext = ISD::SEXTLOAD;
>       SDValue Arg = DAG.getExtLoad(Ext, DL, VT, Chain,
> -                                 DAG.getConstant(36 + VA.getLocMemOffset(), MVT::i32),
> +                                 DAG.getConstant(40 + VA.getLocMemOffset(), MVT::i32),
>                                    MachinePointerInfo(UndefValue::get(PtrTy)),
>                                    MemVT, false, false, 4);
>