[Libclc-dev] [PATCH 3/3] vload/vstore: Remove unused hand-written bitcode implementation

[Aaron Watry]

This was useful when some data types could handle vector loads and
stores in R600 and some couldn't, but that hasn't been the case for
a while and this is now just unnecessary to keep around.

Signed-off-by: Aaron Watry <awatry at gmail.com>
---
 generic/lib/SOURCES               |   2 -
 generic/lib/shared/vload_impl.ll  | 130 --------------------------------------
 generic/lib/shared/vstore_impl.ll |  40 ------------
 3 files changed, 172 deletions(-)
 delete mode 100644 generic/lib/shared/vload_impl.ll
 delete mode 100644 generic/lib/shared/vstore_impl.ll

diff --git a/generic/lib/SOURCES b/generic/lib/SOURCES
index 7efe08c..0f60708 100644
--- a/generic/lib/SOURCES
+++ b/generic/lib/SOURCES
@@ -55,8 +55,6 @@ shared/clamp.cl
 shared/max.cl
 shared/min.cl
 shared/vload.cl
-shared/vload_impl.ll
 shared/vstore.cl
-shared/vstore_impl.ll
 workitem/get_global_id.cl
 workitem/get_global_size.cl
diff --git a/generic/lib/shared/vload_impl.ll b/generic/lib/shared/vload_impl.ll
deleted file mode 100644
index 33ba996..0000000
--- a/generic/lib/shared/vload_impl.ll
+++ /dev/null
@@ -1,130 +0,0 @@
-; This provides optimized implementations of vload2/3/4/8/16 for 32-bit int/uint
-; The address spaces get mapped to data types in target-specific usages
-
-define <2 x i32> @__clc_vload2_i32__addr1(i32 addrspace(1)* nocapture %addr) nounwind readonly alwaysinline {
-  %1 = bitcast i32 addrspace(1)* %addr to <2 x i32> addrspace(1)*
-  %2 = load <2 x i32> addrspace(1)* %1, align 4, !tbaa !3
-  ret <2 x i32> %2
-}
-
-define <3 x i32> @__clc_vload3_i32__addr1(i32 addrspace(1)* nocapture %addr) nounwind readonly alwaysinline {
-  %1 = bitcast i32 addrspace(1)* %addr to <3 x i32> addrspace(1)*
-  %2 = load <3 x i32> addrspace(1)* %1, align 4, !tbaa !3
-  ret <3 x i32> %2
-}
-
-define <4 x i32> @__clc_vload4_i32__addr1(i32 addrspace(1)* nocapture %addr) nounwind readonly alwaysinline {
-  %1 = bitcast i32 addrspace(1)* %addr to <4 x i32> addrspace(1)*
-  %2 = load <4 x i32> addrspace(1)* %1, align 4, !tbaa !3
-  ret <4 x i32> %2
-}
-
-define <8 x i32> @__clc_vload8_i32__addr1(i32 addrspace(1)* nocapture %addr) nounwind readonly alwaysinline {
-  %1 = bitcast i32 addrspace(1)* %addr to <8 x i32> addrspace(1)*
-  %2 = load <8 x i32> addrspace(1)* %1, align 4, !tbaa !3
-  ret <8 x i32> %2
-}
-
-define <16 x i32> @__clc_vload16_i32__addr1(i32 addrspace(1)* nocapture %addr) nounwind readonly alwaysinline {
-  %1 = bitcast i32 addrspace(1)* %addr to <16 x i32> addrspace(1)*
-  %2 = load <16 x i32> addrspace(1)* %1, align 4, !tbaa !3
-  ret <16 x i32> %2
-}
-
-define <2 x i32> @__clc_vload2_i32__addr2(i32 addrspace(2)* nocapture %addr) nounwind readonly alwaysinline {
-  %1 = bitcast i32 addrspace(2)* %addr to <2 x i32> addrspace(2)*
-  %2 = load <2 x i32> addrspace(2)* %1, align 4, !tbaa !3
-  ret <2 x i32> %2
-}
-
-define <3 x i32> @__clc_vload3_i32__addr2(i32 addrspace(2)* nocapture %addr) nounwind readonly alwaysinline {
-  %1 = bitcast i32 addrspace(2)* %addr to <3 x i32> addrspace(2)*
-  %2 = load <3 x i32> addrspace(2)* %1, align 4, !tbaa !3
-  ret <3 x i32> %2
-}
-
-define <4 x i32> @__clc_vload4_i32__addr2(i32 addrspace(2)* nocapture %addr) nounwind readonly alwaysinline {
-  %1 = bitcast i32 addrspace(2)* %addr to <4 x i32> addrspace(2)*
-  %2 = load <4 x i32> addrspace(2)* %1, align 4, !tbaa !3
-  ret <4 x i32> %2
-}
-
-define <8 x i32> @__clc_vload8_i32__addr2(i32 addrspace(2)* nocapture %addr) nounwind readonly alwaysinline {
-  %1 = bitcast i32 addrspace(2)* %addr to <8 x i32> addrspace(2)*
-  %2 = load <8 x i32> addrspace(2)* %1, align 4, !tbaa !3
-  ret <8 x i32> %2
-}
-
-define <16 x i32> @__clc_vload16_i32__addr2(i32 addrspace(2)* nocapture %addr) nounwind readonly alwaysinline {
-  %1 = bitcast i32 addrspace(2)* %addr to <16 x i32> addrspace(2)*
-  %2 = load <16 x i32> addrspace(2)* %1, align 4, !tbaa !3
-  ret <16 x i32> %2
-}
-
-define <2 x i32> @__clc_vload2_i32__addr3(i32 addrspace(3)* nocapture %addr) nounwind readonly alwaysinline {
-  %1 = bitcast i32 addrspace(3)* %addr to <2 x i32> addrspace(3)*
-  %2 = load <2 x i32> addrspace(3)* %1, align 4, !tbaa !3
-  ret <2 x i32> %2
-}
-
-define <3 x i32> @__clc_vload3_i32__addr3(i32 addrspace(3)* nocapture %addr) nounwind readonly alwaysinline {
-  %1 = bitcast i32 addrspace(3)* %addr to <3 x i32> addrspace(3)*
-  %2 = load <3 x i32> addrspace(3)* %1, align 4, !tbaa !3
-  ret <3 x i32> %2
-}
-
-define <4 x i32> @__clc_vload4_i32__addr3(i32 addrspace(3)* nocapture %addr) nounwind readonly alwaysinline {
-  %1 = bitcast i32 addrspace(3)* %addr to <4 x i32> addrspace(3)*
-  %2 = load <4 x i32> addrspace(3)* %1, align 4, !tbaa !3
-  ret <4 x i32> %2
-}
-
-define <8 x i32> @__clc_vload8_i32__addr3(i32 addrspace(3)* nocapture %addr) nounwind readonly alwaysinline {
-  %1 = bitcast i32 addrspace(3)* %addr to <8 x i32> addrspace(3)*
-  %2 = load <8 x i32> addrspace(3)* %1, align 4, !tbaa !3
-  ret <8 x i32> %2
-}
-
-define <16 x i32> @__clc_vload16_i32__addr3(i32 addrspace(3)* nocapture %addr) nounwind readonly alwaysinline {
-  %1 = bitcast i32 addrspace(3)* %addr to <16 x i32> addrspace(3)*
-  %2 = load <16 x i32> addrspace(3)* %1, align 4, !tbaa !3
-  ret <16 x i32> %2
-}
-
-define <2 x i32> @__clc_vload2_i32__addr4(i32 addrspace(4)* nocapture %addr) nounwind readonly alwaysinline {
-  %1 = bitcast i32 addrspace(4)* %addr to <2 x i32> addrspace(4)*
-  %2 = load <2 x i32> addrspace(4)* %1, align 4, !tbaa !3
-  ret <2 x i32> %2
-}
-
-define <3 x i32> @__clc_vload3_i32__addr4(i32 addrspace(4)* nocapture %addr) nounwind readonly alwaysinline {
-  %1 = bitcast i32 addrspace(4)* %addr to <3 x i32> addrspace(4)*
-  %2 = load <3 x i32> addrspace(4)* %1, align 4, !tbaa !3
-  ret <3 x i32> %2
-}
-
-define <4 x i32> @__clc_vload4_i32__addr4(i32 addrspace(4)* nocapture %addr) nounwind readonly alwaysinline {
-  %1 = bitcast i32 addrspace(4)* %addr to <4 x i32> addrspace(4)*
-  %2 = load <4 x i32> addrspace(4)* %1, align 4, !tbaa !3
-  ret <4 x i32> %2
-}
-
-define <8 x i32> @__clc_vload8_i32__addr4(i32 addrspace(4)* nocapture %addr) nounwind readonly alwaysinline {
-  %1 = bitcast i32 addrspace(4)* %addr to <8 x i32> addrspace(4)*
-  %2 = load <8 x i32> addrspace(4)* %1, align 4, !tbaa !3
-  ret <8 x i32> %2
-}
-
-define <16 x i32> @__clc_vload16_i32__addr4(i32 addrspace(4)* nocapture %addr) nounwind readonly alwaysinline {
-  %1 = bitcast i32 addrspace(4)* %addr to <16 x i32> addrspace(4)*
-  %2 = load <16 x i32> addrspace(4)* %1, align 4, !tbaa !3
-  ret <16 x i32> %2
-}
-
-!1 = metadata !{metadata !"char", metadata !5}
-!2 = metadata !{metadata !"short", metadata !5}
-!3 = metadata !{metadata !"int", metadata !5}
-!4 = metadata !{metadata !"long", metadata !5}
-!5 = metadata !{metadata !"omnipotent char", metadata !6}
-!6 = metadata !{metadata !"Simple C/C++ TBAA"}
-
diff --git a/generic/lib/shared/vstore_impl.ll b/generic/lib/shared/vstore_impl.ll
deleted file mode 100644
index 9e2a37b..0000000
--- a/generic/lib/shared/vstore_impl.ll
+++ /dev/null
@@ -1,40 +0,0 @@
-; This provides optimized implementations of vstore2/3/4/8/16 for 32-bit int/uint
-; The address spaces get mapped to data types in target-specific usages
-
-define void @__clc_vstore2_i32__addr1(<2 x i32> %vec, i32 addrspace(1)* nocapture %addr) nounwind alwaysinline {
-  %1 = bitcast i32 addrspace(1)* %addr to <2 x i32> addrspace(1)*
-  store <2 x i32> %vec, <2 x i32> addrspace(1)* %1, align 4, !tbaa !3
-  ret void
-}
-
-define void @__clc_vstore3_i32__addr1(<3 x i32> %vec, i32 addrspace(1)* nocapture %addr) nounwind alwaysinline {
-  %1 = bitcast i32 addrspace(1)* %addr to <3 x i32> addrspace(1)*
-  store <3 x i32> %vec, <3 x i32> addrspace(1)* %1, align 4, !tbaa !3
-  ret void
-}
-
-define void @__clc_vstore4_i32__addr1(<4 x i32> %vec, i32 addrspace(1)* nocapture %addr) nounwind alwaysinline {
-  %1 = bitcast i32 addrspace(1)* %addr to <4 x i32> addrspace(1)*
-  store <4 x i32> %vec, <4 x i32> addrspace(1)* %1, align 4, !tbaa !3
-  ret void
-}
-
-define void @__clc_vstore8_i32__addr1(<8 x i32> %vec, i32 addrspace(1)* nocapture %addr) nounwind alwaysinline {
-  %1 = bitcast i32 addrspace(1)* %addr to <8 x i32> addrspace(1)*
-  store <8 x i32> %vec, <8 x i32> addrspace(1)* %1, align 4, !tbaa !3
-  ret void
-}
-
-define void @__clc_vstore16_i32__addr1(<16 x i32> %vec, i32 addrspace(1)* nocapture %addr) nounwind alwaysinline {
-  %1 = bitcast i32 addrspace(1)* %addr to <16 x i32> addrspace(1)*
-  store <16 x i32> %vec, <16 x i32> addrspace(1)* %1, align 4, !tbaa !3
-  ret void
-}
-
-!1 = metadata !{metadata !"char", metadata !5}
-!2 = metadata !{metadata !"short", metadata !5}
-!3 = metadata !{metadata !"int", metadata !5}
-!4 = metadata !{metadata !"long", metadata !5}
-!5 = metadata !{metadata !"omnipotent char", metadata !6}
-!6 = metadata !{metadata !"Simple C/C++ TBAA"}
-
-- 
1.9.1