[libc-commits] [libc] [llvm] [libc] Add bare-metal Hexagon port (PR #217528)
Brian Cain via libc-commits
libc-commits at lists.llvm.org
Mon Sep 28 07:53:05 PDT 2026
================
@@ -0,0 +1,99 @@
+//===----------------------------------------------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+///
+/// \file
+/// This file contains the startup code for bare-metal Hexagon targets.
+//===----------------------------------------------------------------------===//
+
+#include "hdr/stdint_proxy.h"
+#include "src/__support/macros/config.h"
+#include "src/stdlib/atexit.h"
+#include "src/stdlib/exit.h"
+#include "src/string/memcpy.h"
+#include "src/string/memset.h"
+#include "startup/baremetal/fini.h"
+#include "startup/baremetal/init.h"
+
+extern "C" {
+int main(int argc, char **argv);
+void _start();
+
+// Semihosting library initialisation if applicable. Required for printf, etc.
+[[gnu::weak]] void _platform_init() {}
+
+// These symbols are provided by the linker. The exact names are not defined by
+// a standard.
+extern uintptr_t __stack;
+extern uintptr_t __data_source[];
+extern uintptr_t __data_start[];
+extern uintptr_t __data_size[];
+extern uintptr_t __bss_start[];
+extern uintptr_t __bss_size[];
+} // extern "C"
+
+namespace LIBC_NAMESPACE_DECL {
+
+[[noreturn]] void do_start() {
+ // TODO: This startup code is the MVP for running under the Hexagon
+ // simulator with semihosting. It does not configure the MMU or caches.
+
+ // Clear the Supervisor Status Register so that a subsequent trap0
+ // semihosting call is serviced by the monitor.
+ asm volatile("ssr = %0" : : "r"(0));
----------------
androm3da wrote:
Seems like you should clear whichever bit(s) you want to clear here rather than clearing all of them.
If we're in the reset vector context here then maybe we should `rte` first before expecting to be able to use the `trap0` instruction?
https://github.com/llvm/llvm-project/pull/217528
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