[libc-commits] [libc] c275fdc - [libc][gpu][docs] Fix typos in GPU libc's documentation (#138565)

[via libc-commits]

Author: Howard Chu
Date: 2025-05-05T14:06:45-05:00
New Revision: c275fdc0bca34b2e53e00435fc72b0ca4b736348

URL: https://github.com/llvm/llvm-project/commit/c275fdc0bca34b2e53e00435fc72b0ca4b736348
DIFF: https://github.com/llvm/llvm-project/commit/c275fdc0bca34b2e53e00435fc72b0ca4b736348.diff

LOG: [libc][gpu][docs] Fix typos in GPU libc's documentation (#138565)

Fix typos in GPU libc's documentation about the rpc implementation.

Added: 
    

Modified: 
    libc/docs/gpu/rpc.rst

Removed: 
    


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diff  --git a/libc/docs/gpu/rpc.rst b/libc/docs/gpu/rpc.rst
index 1d6aaea2adcfe..4ac3786cfa085 100644
--- a/libc/docs/gpu/rpc.rst
+++ b/libc/docs/gpu/rpc.rst
@@ -20,8 +20,8 @@ operating system while executing on a GPU.
 We implemented remote procedure calls using unified virtual memory to create a
 shared communicate channel between the two processes. This memory is often
 pinned memory that can be accessed asynchronously and atomically by multiple
-processes simultaneously. This supports means that we can simply provide mutual
-exclusion on a shared better to swap work back and forth between the host system
+processes simultaneously. This support means that we can simply provide mutual
+exclusion on a shared buffer to swap work back and forth between the host system
 and the GPU. We can then use this to create a simple client-server protocol
 using this shared memory.
 
@@ -39,7 +39,7 @@ In order to make this transmission channel thread-safe, we abstract ownership of
 the given mailbox pair and buffer around a port, effectively acting as a lock
 and an index into the allocated buffer slice. The server and device have
 independent locks around the given port. In this scheme, the buffer can be used
-to communicate intent and data generically with the server. We them simply
+to communicate intent and data generically with the server. We then simply
 provide multiple copies of this protocol and expose them as multiple ports.
 
 If this were simply a standard CPU system, this would be sufficient. However,