[libc-commits] [libc] [libc][arm32] define argc type and stack alignment (PR #96367)

[Nick Desaulniers via libc-commits]

https://github.com/nickdesaulniers created https://github.com/llvm/llvm-project/pull/96367

https://github.com/ARM-software/abi-aa/blob/main/aapcs32/aapcs32.rst#6212stack-constraints-at-a-public-interface
mentions that ARM32 is double word aligned.

I could not find a citation for the size of argc on the stack, but from reading
Bionic's loader and the Linux kernel's ELF loader, it seems this is the same
for all targets (8B despite argc being an int).

Also, adds a citation for the x86_64 psABI.

>From b63041f3d8fc7fa59ddecbcb5df80187ddf3a535 Mon Sep 17 00:00:00 2001
From: Nick Desaulniers <ndesaulniers at google.com>
Date: Fri, 21 Jun 2024 15:59:17 -0700
Subject: [PATCH] [libc][arm32] define argc type and stack alignment

https://github.com/ARM-software/abi-aa/blob/main/aapcs32/aapcs32.rst#6212stack-constraints-at-a-public-interface
mentions that ARM32 is double word aligned.

I could not find a citation for the size of argc on the stack, but from reading
Bionic's loader and the Linux kernel's ELF loader, it seems this is the same
for all targets (8B despite argc being an int).

Also, adds a citation for the x86_64 psABI.
---
 libc/config/linux/app.h             | 7 +++----
 libc/src/__support/threads/thread.h | 3 +++
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/libc/config/linux/app.h b/libc/config/linux/app.h
index 766cd49e88f6f..4e2e3f92026f7 100644
--- a/libc/config/linux/app.h
+++ b/libc/config/linux/app.h
@@ -36,12 +36,11 @@ struct TLSImage {
 };
 
 #if defined(LIBC_TARGET_ARCH_IS_X86_64) ||                                     \
-    defined(LIBC_TARGET_ARCH_IS_AARCH64) ||                                    \
+    defined(LIBC_TARGET_ARCH_IS_ANY_ARM) ||                                    \
     defined(LIBC_TARGET_ARCH_IS_ANY_RISCV)
 // At the language level, argc is an int. But we use uint64_t as the x86_64
-// ABI specifies it as an 8 byte value. Likewise, in the ARM64 ABI, arguments
-// are usually passed in registers.  x0 is a doubleword register, so this is
-// 64 bit for aarch64 as well.
+// ABI specifies it as an 8 byte value (Figure 3.9 Initial Process Stack in
+// section 3.4.1 Initial Stack and Register State of the AMD64 ABI).
 typedef uintptr_t ArgcType;
 
 // At the language level, argv is a char** value. However, we use uint64_t as
diff --git a/libc/src/__support/threads/thread.h b/libc/src/__support/threads/thread.h
index acfe33879f878..f89c687eeaa19 100644
--- a/libc/src/__support/threads/thread.h
+++ b/libc/src/__support/threads/thread.h
@@ -43,6 +43,9 @@ union ThreadReturnValue {
      defined(LIBC_TARGET_ARCH_IS_X86_64) ||                                    \
      defined(LIBC_TARGET_ARCH_IS_ANY_RISCV))
 constexpr unsigned int STACK_ALIGNMENT = 16;
+#elif defined(LIBC_TARGET_ARCH_IS_ARM)
+// See Section 6.2.1.2 Stack constraints at a public interface of AAPCS32.
+constexpr unsigned int STACK_ALIGNMENT = 8;
 #endif
 // TODO: Provide stack alignment requirements for other architectures.