[libc-commits] [libc] 8f7ae64 - [libc][cpp] add `atomic_signal_fence` (#82138)

[via libc-commits]

Author: Schrodinger ZHU Yifan
Date: 2024-02-20T10:59:50-05:00
New Revision: 8f7ae64ea108de54d9aad963c55e1aef7dc62b86

URL: https://github.com/llvm/llvm-project/commit/8f7ae64ea108de54d9aad963c55e1aef7dc62b86
DIFF: https://github.com/llvm/llvm-project/commit/8f7ae64ea108de54d9aad963c55e1aef7dc62b86.diff

LOG: [libc][cpp] add `atomic_signal_fence` (#82138)

Add `atomic_signal_fence`. This will be useful in
https://gustedt.gitlabpages.inria.fr/c23-library/#memset_explicit.

Added: 
    

Modified: 
    libc/src/__support/CPP/atomic.h

Removed: 
    


################################################################################
diff  --git a/libc/src/__support/CPP/atomic.h b/libc/src/__support/CPP/atomic.h
index 1c4478dfeab6de..c10d06c04bccad 100644
--- a/libc/src/__support/CPP/atomic.h
+++ b/libc/src/__support/CPP/atomic.h
@@ -150,14 +150,27 @@ template <typename T> struct Atomic {
 };
 
 // Issue a thread fence with the given memory ordering.
-LIBC_INLINE void atomic_thread_fence(MemoryOrder mem_ord) {
+LIBC_INLINE void atomic_thread_fence([[maybe_unused]] MemoryOrder mem_ord) {
 // The NVPTX backend currently does not support atomic thread fences so we use a
 // full system fence instead.
 #ifdef LIBC_TARGET_ARCH_IS_NVPTX
-  (void)mem_ord;
   __nvvm_membar_sys();
 #else
-  __atomic_thread_fence(int(mem_ord));
+  __atomic_thread_fence(static_cast<int>(mem_ord));
+#endif
+}
+
+// Establishes memory synchronization ordering of non-atomic and relaxed atomic
+// accesses, as instructed by order, between a thread and a signal handler
+// executed on the same thread. This is equivalent to atomic_thread_fence,
+// except no instructions for memory ordering are issued. Only reordering of
+// the instructions by the compiler is suppressed as order instructs.
+LIBC_INLINE void atomic_signal_fence([[maybe_unused]] MemoryOrder mem_ord) {
+#if __has_builtin(__atomic_signal_fence)
+  __atomic_signal_fence(static_cast<int>(mem_ord));
+#else
+  // if the builtin is not ready, use asm as a full compiler barrier.
+  asm volatile("" ::: "memory");
 #endif
 }