[libc-commits] [compiler-rt] [clang] [libc] [clang-tools-extra] [flang] [llvm] [libcxx] [AMDGPU] - Add constant folding to s_wqm intrinsic (PR #72382)
Jessica Del via libc-commits
libc-commits at lists.llvm.org
Mon Nov 20 23:59:50 PST 2023
https://github.com/OutOfCache updated https://github.com/llvm/llvm-project/pull/72382
>From 1864216324ccc83dd0e77287f00c62e51b07822c Mon Sep 17 00:00:00 2001
From: Jessica Del <Jessica.Del at amd.com>
Date: Wed, 15 Nov 2023 12:58:24 +0100
Subject: [PATCH 1/5] [AMDGPU] - Add constant folding to s_wqm intrinsic
Fold any constant input to the s_wqm intrinsic.
---
llvm/lib/Analysis/ConstantFolding.cpp | 16 ++++++++++++++++
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.ll | 13 +++++--------
2 files changed, 21 insertions(+), 8 deletions(-)
diff --git a/llvm/lib/Analysis/ConstantFolding.cpp b/llvm/lib/Analysis/ConstantFolding.cpp
index 966a65ac26b8017..f3f0d079747e13e 100644
--- a/llvm/lib/Analysis/ConstantFolding.cpp
+++ b/llvm/lib/Analysis/ConstantFolding.cpp
@@ -1533,6 +1533,7 @@ bool llvm::canConstantFoldCallTo(const CallBase *Call, const Function *F) {
case Intrinsic::amdgcn_perm:
case Intrinsic::amdgcn_wave_reduce_umin:
case Intrinsic::amdgcn_wave_reduce_umax:
+ case Intrinsic::amdgcn_s_wqm:
case Intrinsic::arm_mve_vctp8:
case Intrinsic::arm_mve_vctp16:
case Intrinsic::arm_mve_vctp32:
@@ -2422,6 +2423,21 @@ static Constant *ConstantFoldScalarCall1(StringRef Name,
return ConstantFP::get(Ty->getContext(), Val);
}
+
+ case Intrinsic::amdgcn_s_wqm: {
+ uint64_t Val = Op->getZExtValue();
+ uint64_t WQM = 0;
+ uint64_t Quad = 0xF;
+ for (unsigned i = 0; i < Op->getBitWidth() / 4;
+ ++i, Val >>= 4, Quad <<= 4) {
+ if (!(Val & 0xF))
+ continue;
+
+ WQM |= Quad;
+ }
+ return ConstantInt::get(Ty, WQM);
+ }
+
default:
return nullptr;
}
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.ll
index 6676dac19ba797f..e44043ffacc07d1 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.ll
@@ -9,10 +9,9 @@ define i32 @test_s_wqm_constant_i32() {
; GFX11-LABEL: test_s_wqm_constant_i32:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_wqm_b32 s0, 0x85fe3a92
-; GFX11-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-NEXT: v_mov_b32_e32 v0, 0xff00ff0f
; GFX11-NEXT: s_setpc_b64 s[30:31]
- %br = call i32 @llvm.amdgcn.s.wqm.i32(i32 u0x85FE3A92)
+ %br = call i32 @llvm.amdgcn.s.wqm.i32(i32 u0x85003A02)
ret i32 %br
}
@@ -48,12 +47,10 @@ define i64 @test_s_wqm_constant_i64() {
; GFX11-LABEL: test_s_wqm_constant_i64:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: s_mov_b32 s0, 0x85fe3a92
-; GFX11-NEXT: s_mov_b32 s1, 0x3a9285fe
-; GFX11-NEXT: s_wqm_b64 s[0:1], s[0:1]
-; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-NEXT: v_mov_b32_e32 v0, 0xff00ffff
+; GFX11-NEXT: v_mov_b32_e32 v1, 0xffff0fff
; GFX11-NEXT: s_setpc_b64 s[30:31]
- %br = call i64 @llvm.amdgcn.s.wqm.i64(i64 u0x3A9285FE85FE3A92)
+ %br = call i64 @llvm.amdgcn.s.wqm.i64(i64 u0x12480FDBAC00753E)
ret i64 %br
}
>From 86da1c3a9370e671d263ee1a0243ed4e466d9f75 Mon Sep 17 00:00:00 2001
From: Jessica Del <Jessica.Del at amd.com>
Date: Wed, 15 Nov 2023 15:50:06 +0100
Subject: [PATCH 2/5] fixup! [AMDGPU] - Add constant folding to s_wqm intrinsic
---
llvm/lib/Analysis/ConstantFolding.cpp | 15 +++++----------
1 file changed, 5 insertions(+), 10 deletions(-)
diff --git a/llvm/lib/Analysis/ConstantFolding.cpp b/llvm/lib/Analysis/ConstantFolding.cpp
index f3f0d079747e13e..28cbd4112573ede 100644
--- a/llvm/lib/Analysis/ConstantFolding.cpp
+++ b/llvm/lib/Analysis/ConstantFolding.cpp
@@ -2426,16 +2426,11 @@ static Constant *ConstantFoldScalarCall1(StringRef Name,
case Intrinsic::amdgcn_s_wqm: {
uint64_t Val = Op->getZExtValue();
- uint64_t WQM = 0;
- uint64_t Quad = 0xF;
- for (unsigned i = 0; i < Op->getBitWidth() / 4;
- ++i, Val >>= 4, Quad <<= 4) {
- if (!(Val & 0xF))
- continue;
-
- WQM |= Quad;
- }
- return ConstantInt::get(Ty, WQM);
+ Val |=
+ (Val & 0x5555555555555555) << 1 | ((Val >> 1) & 0x5555555555555555);
+ Val |=
+ (Val & 0x3333333333333333) << 2 | ((Val >> 2) & 0x3333333333333333);
+ return ConstantInt::get(Ty, Val);
}
default:
>From 08ee504df1ec7a76169b79d68150ae074422bf7d Mon Sep 17 00:00:00 2001
From: Jessica Del <Jessica.Del at amd.com>
Date: Wed, 15 Nov 2023 18:17:03 +0100
Subject: [PATCH 3/5] fixup! [AMDGPU] - Add constant folding to s_wqm intrinsic
---
llvm/lib/Analysis/ConstantFolding.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/llvm/lib/Analysis/ConstantFolding.cpp b/llvm/lib/Analysis/ConstantFolding.cpp
index 28cbd4112573ede..d8c96b542ebbb61 100644
--- a/llvm/lib/Analysis/ConstantFolding.cpp
+++ b/llvm/lib/Analysis/ConstantFolding.cpp
@@ -2427,9 +2427,9 @@ static Constant *ConstantFoldScalarCall1(StringRef Name,
case Intrinsic::amdgcn_s_wqm: {
uint64_t Val = Op->getZExtValue();
Val |=
- (Val & 0x5555555555555555) << 1 | ((Val >> 1) & 0x5555555555555555);
+ (Val & 0x5555555555555555ULL) << 1 | ((Val >> 1) & 0x5555555555555555ULL);
Val |=
- (Val & 0x3333333333333333) << 2 | ((Val >> 2) & 0x3333333333333333);
+ (Val & 0x3333333333333333ULL) << 2 | ((Val >> 2) & 0x3333333333333333ULL);
return ConstantInt::get(Ty, Val);
}
>From a37a8a960b34f2e959b714488ec6156a40e20111 Mon Sep 17 00:00:00 2001
From: Jessica Del <Jessica.Del at amd.com>
Date: Wed, 15 Nov 2023 18:26:22 +0100
Subject: [PATCH 4/5] fixup! [AMDGPU] - Add constant folding to s_wqm intrinsic
---
llvm/lib/Analysis/ConstantFolding.cpp | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/Analysis/ConstantFolding.cpp b/llvm/lib/Analysis/ConstantFolding.cpp
index d8c96b542ebbb61..778d0c46781732d 100644
--- a/llvm/lib/Analysis/ConstantFolding.cpp
+++ b/llvm/lib/Analysis/ConstantFolding.cpp
@@ -2426,10 +2426,10 @@ static Constant *ConstantFoldScalarCall1(StringRef Name,
case Intrinsic::amdgcn_s_wqm: {
uint64_t Val = Op->getZExtValue();
- Val |=
- (Val & 0x5555555555555555ULL) << 1 | ((Val >> 1) & 0x5555555555555555ULL);
- Val |=
- (Val & 0x3333333333333333ULL) << 2 | ((Val >> 2) & 0x3333333333333333ULL);
+ Val |= (Val & 0x5555555555555555ULL) << 1 |
+ ((Val >> 1) & 0x5555555555555555ULL);
+ Val |= (Val & 0x3333333333333333ULL) << 2 |
+ ((Val >> 2) & 0x3333333333333333ULL);
return ConstantInt::get(Ty, Val);
}
>From 40ee11d6c2f7df8d71a8c63e34643897ccf5da2c Mon Sep 17 00:00:00 2001
From: Jessica Del <Jessica.Del at amd.com>
Date: Fri, 17 Nov 2023 13:24:04 +0100
Subject: [PATCH 5/5] fixup! [AMDGPU] - Add constant folding to s_wqm intrinsic
---
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.ll | 85 +++++++++++++++++++++
1 file changed, 85 insertions(+)
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.ll
index e44043ffacc07d1..34faa347c2f91a5 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.ll
@@ -15,6 +15,49 @@ define i32 @test_s_wqm_constant_i32() {
ret i32 %br
}
+define i32 @test_s_wqm_constant_zero_i32() {
+; GFX11-LABEL: test_s_wqm_constant_zero_i32:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_mov_b32_e32 v0, 0
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+ %br = call i32 @llvm.amdgcn.s.wqm.i32(i32 0)
+ ret i32 %br
+}
+
+define i32 @test_s_wqm_constant_neg_one_i32() {
+; GFX11-LABEL: test_s_wqm_constant_neg_one_i32:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_mov_b32_e32 v0, -1
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+ %br = call i32 @llvm.amdgcn.s.wqm.i32(i32 -1)
+ ret i32 %br
+}
+
+define i32 @test_s_wqm_constant_undef_i32() {
+; GFX11-LABEL: test_s_wqm_constant_undef_i32:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: s_wqm_b32 s0, s0
+; GFX11-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+ %br = call i32 @llvm.amdgcn.s.wqm.i32(i32 undef)
+ ret i32 %br
+}
+
+define i32 @test_s_wqm_constant_poison_i32() {
+; GFX11-LABEL: test_s_wqm_constant_poison_i32:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: s_wqm_b32 s0, s0
+; GFX11-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+ %br = call i32 @llvm.amdgcn.s.wqm.i32(i32 poison)
+ ret i32 %br
+}
+
+
define amdgpu_cs void @test_s_wqm_sgpr_i32(i32 inreg %mask, ptr addrspace(1) %out) {
; GFX11-LABEL: test_s_wqm_sgpr_i32:
; GFX11: ; %bb.0: ; %entry
@@ -54,6 +97,48 @@ define i64 @test_s_wqm_constant_i64() {
ret i64 %br
}
+define i64 @test_s_wqm_constant_zero_i64() {
+; GFX11-LABEL: test_s_wqm_constant_zero_i64:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+ %br = call i64 @llvm.amdgcn.s.wqm.i64(i64 0)
+ ret i64 %br
+}
+
+define i64 @test_s_wqm_constant_neg_one_i64() {
+; GFX11-LABEL: test_s_wqm_constant_neg_one_i64:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_dual_mov_b32 v0, -1 :: v_dual_mov_b32 v1, -1
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+ %br = call i64 @llvm.amdgcn.s.wqm.i64(i64 -1)
+ ret i64 %br
+}
+
+define i64 @test_s_wqm_constant_undef_i64() {
+; GFX11-LABEL: test_s_wqm_constant_undef_i64:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: s_wqm_b64 s[0:1], s[0:1]
+; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+ %br = call i64 @llvm.amdgcn.s.wqm.i64(i64 undef)
+ ret i64 %br
+}
+
+define i64 @test_s_wqm_constant_poison_i64() {
+; GFX11-LABEL: test_s_wqm_constant_poison_i64:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: s_wqm_b64 s[0:1], s[0:1]
+; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+ %br = call i64 @llvm.amdgcn.s.wqm.i64(i64 poison)
+ ret i64 %br
+}
+
define amdgpu_cs void @test_s_wqm_sgpr_i64(i64 inreg %mask, ptr addrspace(1) %out) {
; GFX11-LABEL: test_s_wqm_sgpr_i64:
; GFX11: ; %bb.0: ; %entry
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