[libc-commits] [PATCH] D146725: [libc] Implement memory fences on NVPTX

[Joseph Huber via Phabricator via libc-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG9c8bdbcbc502: [libc] Implement memory fences on NVPTX (authored by jhuber6).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D146725/new/

https://reviews.llvm.org/D146725

Files:
  libc/src/__support/CPP/atomic.h


Index: libc/src/__support/CPP/atomic.h
===================================================================
--- libc/src/__support/CPP/atomic.h
+++ libc/src/__support/CPP/atomic.h
@@ -10,6 +10,7 @@
 #define LLVM_LIBC_SRC_SUPPORT_CPP_ATOMIC_H
 
 #include "src/__support/macros/attributes.h"
+#include "src/__support/macros/properties/architectures.h"
 
 #include "type_traits.h"
 
@@ -96,7 +97,14 @@
 
 // Issue a thread fence with the given memory ordering.
 LIBC_INLINE void atomic_thread_fence(MemoryOrder mem_ord) {
+// The NVPTX backend currently does not support atomic thread fences so we use a
+// full system fence instead.
+#ifdef LIBC_TARGET_ARCH_IS_NVPTX
+  (void)mem_ord;
+  __nvvm_membar_sys();
+#else
   __atomic_thread_fence(int(mem_ord));
+#endif
 }
 
 } // namespace cpp


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