[libc-commits] [libc] a9cb298 - [libc] Add intrinsic for thread fence to the atomic support

[Joseph Huber via libc-commits]

Author: Joseph Huber
Date: 2023-03-09T06:36:54-06:00
New Revision: a9cb298b394034856f88aebe66523c4a61c0df2e

URL: https://github.com/llvm/llvm-project/commit/a9cb298b394034856f88aebe66523c4a61c0df2e
DIFF: https://github.com/llvm/llvm-project/commit/a9cb298b394034856f88aebe66523c4a61c0df2e.diff

LOG: [libc] Add intrinsic for thread fence to the atomic support

This function mimics the std::atomic_thread_fence function from
<atomic>. This has no uses in source currently, but this will be used by
the proposed RPC client for the GPU mode support. There is varying
support for direct memory ordering for the GPU atomics on shared memory
resources. So the implementation will use relaxed atomics and explicit
memory fences.

Some additional work may need to be done to map this to `NVPTX` system
level fences.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D145608

Added: 
    

Modified: 
    libc/src/__support/CPP/atomic.h

Removed: 
    


################################################################################
diff  --git a/libc/src/__support/CPP/atomic.h b/libc/src/__support/CPP/atomic.h
index 5ef7f5e09eac2..f27a26b03d65a 100644
--- a/libc/src/__support/CPP/atomic.h
+++ b/libc/src/__support/CPP/atomic.h
@@ -92,6 +92,11 @@ template <typename T> struct Atomic {
   void set(T rhs) { val = rhs; }
 };
 
+// Issue a thread fence with the given memory ordering.
+LIBC_INLINE void atomic_thread_fence(MemoryOrder mem_ord) {
+  __atomic_thread_fence(int(mem_ord));
+}
+
 } // namespace cpp
 } // namespace __llvm_libc