[libc-commits] [PATCH] D145608: [libc] Add intrinsic for thread fence to the atomic support

[Joseph Huber via Phabricator via libc-commits]

jhuber6 created this revision.
jhuber6 added reviewers: sivachandra, lntue, michaelrj.
Herald added subscribers: libc-commits, ecnelises, tschuett.
Herald added projects: libc-project, All.
jhuber6 requested review of this revision.

This function mimics the std::atomic_thread_fence function from
<atomic>. This has no uses in source currently, but this will be used by
the proposed RPC client for the GPU mode support. There is varying
support for direct memory ordering for the GPU atomics on shared memory
resources. So the implementation will use relaxed atomics and explicit
memory fences.

Some additional work may need to be done to map this to `NVPTX` system
level fences.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D145608

Files:
  libc/src/__support/CPP/atomic.h


Index: libc/src/__support/CPP/atomic.h
===================================================================
--- libc/src/__support/CPP/atomic.h
+++ libc/src/__support/CPP/atomic.h
@@ -92,6 +92,11 @@
   void set(T rhs) { val = rhs; }
 };
 
+// Issue a thread fence with the given memory ordering.
+inline void atomic_thread_fence(MemoryOrder mem_ord) {
+  __atomic_thread_fence(int(mem_ord));
+}
+
 } // namespace cpp
 } // namespace __llvm_libc
 


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D145608.503495.patch
Type: text/x-patch
Size: 446 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/libc-commits/attachments/20230308/58449951/attachment.bin>