[libc-commits] [libc] 66a6c10 - [libc] Add a cacheline size of arm target.

Siva Chandra Reddy via libc-commits libc-commits at lists.llvm.org
Fri Jun 24 21:46:12 PDT 2022


Author: Siva Chandra Reddy
Date: 2022-06-25T04:42:40Z
New Revision: 66a6c1073a204de5729e0ec82508697aeb08bcf1

URL: https://github.com/llvm/llvm-project/commit/66a6c1073a204de5729e0ec82508697aeb08bcf1
DIFF: https://github.com/llvm/llvm-project/commit/66a6c1073a204de5729e0ec82508697aeb08bcf1.diff

LOG: [libc] Add a cacheline size of arm target.

It is set arbitrarily at 32 now. It can be adjusted as required in
future.

Added: 
    

Modified: 
    libc/src/string/memory_utils/utils.h

Removed: 
    


################################################################################
diff  --git a/libc/src/string/memory_utils/utils.h b/libc/src/string/memory_utils/utils.h
index f23a3240fde72..7197a7e605e2a 100644
--- a/libc/src/string/memory_utils/utils.h
+++ b/libc/src/string/memory_utils/utils.h
@@ -17,6 +17,8 @@
 // time.
 #if defined(LLVM_LIBC_ARCH_AARCH64) || defined(LLVM_LIBC_ARCH_X86)
 #define LLVM_LIBC_CACHELINE_SIZE 64
+#elif defined(LLVM_LIBC_ARCH_ARM)
+#define LLVM_LIBC_CACHELINE_SIZE 32
 #else
 #error "Unsupported platform for memory functions."
 #endif


        


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