[libc-commits] [PATCH] D127571: Initiating a RISC-V port of llvm-libc

[Ivan Serdyuk via Phabricator via libc-commits]

oceanfish81 updated this revision to Diff 436535.
oceanfish81 added a comment.

I was using "make":

> [ 95%] Built target libcMPFRWrapper
> [100%] Linking CXX executable libc_str_to_float_comparison_test
> Test the strtof and strtod implementations against precomputed results.
> Starting file /home/advancedwebdeveloper/llvm-project/libc/test/src/__support/str_to_float_comparison_data.txt
> Results:
> Total significant failed conversions: 0
> Total conversions off by +/- 1 bit: 0
> 	0	float low
> 	0	float high
> 	0	double low
> 	0	double high
> Total lines: 6
> [100%] Built target libc_str_to_float_comparison_test

and able to execute an "install" target:

> [ 95%] Built target llvmlibc
> [ 95%] Built target libc_system_str_to_float_comparison_test
> [100%] Built target libc_str_to_float_comparison_test
> Install the project...
>
> - Install configuration: "MinSizeRel"
> - Installing: /home/advancedwebdeveloper/libc_install/lib/libllvmlibc.a




Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D127571/new/

https://reviews.llvm.org/D127571

Files:
  libc/config/linux/riscv/entrypoints.txt
  libc/src/__support/architectures.h
  libc/src/string/memory_utils/utils.h


Index: libc/src/string/memory_utils/utils.h
===================================================================
--- libc/src/string/memory_utils/utils.h
+++ libc/src/string/memory_utils/utils.h
@@ -15,7 +15,8 @@
 // cache line sizes depend on implementations, not architectures.  There
 // are even implementations with cache line sizes configurable at boot
 // time.
-#if defined(LLVM_LIBC_ARCH_AARCH64) || defined(LLVM_LIBC_ARCH_X86) || defined(LLVM_LIBC_ARCH_RISCV)
+#if defined(LLVM_LIBC_ARCH_AARCH64) || defined(LLVM_LIBC_ARCH_X86) ||          \
+    defined(LLVM_LIBC_ARCH_RISCV)
 #define LLVM_LIBC_CACHELINE_SIZE 64
 #else
 #error "Unsupported platform for memory functions."
Index: libc/src/__support/architectures.h
===================================================================
--- libc/src/__support/architectures.h
+++ libc/src/__support/architectures.h
@@ -49,5 +49,4 @@
 #define LLVM_LIBC_ARCH_RISCV
 #endif
 
-
 #endif // LLVM_LIBC_SUPPORT_ARCHITECTURES_H
Index: libc/config/linux/riscv/entrypoints.txt
===================================================================
--- libc/config/linux/riscv/entrypoints.txt
+++ libc/config/linux/riscv/entrypoints.txt
@@ -107,7 +107,7 @@
 
 set(TARGET_LIBM_ENTRYPOINTS
     # fenv.h entrypoints
-    ibc.src.fenv.feclearexcept
+    libc.src.fenv.feclearexcept
     #libc.src.fenv.fedisableexcept
     #libc.src.fenv.feenableexcept
     libc.src.fenv.fegetenv


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