[flang-commits] [flang] [mlir] [MLIR][NVVM] Split nvvm.barrier into nvvm.barrier and nvvm.barrier.reduction (PR #199404)

[Guray Ozen via flang-commits]

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@@ -2926,32 +2927,27 @@ LogicalResult NVVM::SetMaxRegisterOp::verify() {
   return success();
 }
 
-LogicalResult NVVM::BarrierOp::verify() {
-  if (getNumberOfThreads() && !getBarrierId())
-    return emitOpError(
-        "barrier id is missing, it should be set between 0 to 15");
-
-  if (getBarrierId() && (getReductionOp() || getReductionPredicate()))
-    return emitOpError("reduction are only available when id is 0");
-
-  if ((getReductionOp() && !getReductionPredicate()) ||
-      (!getReductionOp() && getReductionPredicate()))
-    return emitOpError("reduction predicate and reduction operation must be "
-                       "specified together");
-
+/// Check the PTX 0..15 range for barrier ids that are present as integer
+/// constants.
+template <typename BarrierLikeOp>
+static LogicalResult verifyBarrierIdRange(BarrierLikeOp op) {
+  Value id = op.getBarrierId();
+  if (!id)
+    return success();
+  APInt cst;
+  if (!matchPattern(id, m_ConstantInt(&cst)))
+    return success();
+  uint64_t value = cst.getZExtValue();
+  if (value > 15)
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grypp wrote:

Let's implement this

https://github.com/llvm/llvm-project/pull/199404