[flang-commits] [flang] [mlir] [flang][openmp] Add support for ordered regions in SIMD directives (PR #181012)

[via flang-commits]

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@@ -3151,9 +3146,27 @@ convertOmpWsloop(Operation &opInst, llvm::IRBuilderBase &builder,
                                                 loopInfo->getLastIter());
     if (failed(handleError(afterBarrierIP, *loopOp)))
       return failure();
-    for (size_t index = 0; index < wsloopOp.getLinearVars().size(); index++)
+
+    // Check if this worksharing loop contains ordered regions (with SIMD)
+    bool hasOrderedRegions = false;
+    wsloopOp.getRegion().walk([&](omp::OrderedRegionOp orderedOp) {
+      hasOrderedRegions = true;
+      return WalkResult::interrupt();
+    });
+
+    for (size_t index = 0; index < wsloopOp.getLinearVars().size(); index++) {
       linearClauseProcessor.rewriteInPlace(builder, "omp.loop_nest.region",
                                            index);
+      // Only do extra rewrites if we have both SIMD and ordered regions
+      if (isSimd && hasOrderedRegions) {
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NimishMishra wrote:

Would it make more sense to house this check and subsequent rewrites in `convertOmpSimd` instead? From the test case,

```
omp.wsloop ordered(0) {
   omp.simd linear({{.*}}) private({{.*}}) {
   omp.loop_nest (%{{.*}}) : i32 = (%{{.*}}) to (%{{.*}}) inclusive step (%{{.*}}) {
      omp.ordered.region par_level_simd {
    omp.terminator
   }
  omp.yield
 }
 } {linear_var_types = [i32], omp.composite}
} {omp.composite}
```

So `convertOmpSimd` would be inherently called. 

https://github.com/llvm/llvm-project/pull/181012