[flang-commits] [clang] [flang] [llvm] [mlir] [polly] [IR] Use persistent metadata IDs for printing (PR #216838)
Yaxun Liu via flang-commits
flang-commits at lists.llvm.org
Fri Aug 28 20:45:20 PDT 2026
https://github.com/yxsamliu updated https://github.com/llvm/llvm-project/pull/216838
>From 1117a1cb7df771ccbd2b30548f9a305cc6c0a892 Mon Sep 17 00:00:00 2001
From: "Yaxun (Sam) Liu" <yaxun.liu at amd.com>
Date: Fri, 28 Aug 2026 15:41:14 -0400
Subject: [PATCH 1/3] [LLVM] Make metadata-number checks robust
These checks care about the metadata attached to an instruction or reported in a diagnostic, not the incidental numeric slot assigned while printing. Match metadata slot numbers with FileCheck patterns so numbering changes do not require unrelated test updates.
---
.../Analysis/BasicAA/noalias-scope-decl.ll | 8 ++---
.../Analysis/CostModel/X86/free-intrinsics.ll | 4 +--
.../CostModel/free-intrinsics-datalayout.ll | 4 +--
.../CostModel/free-intrinsics-no_info.ll | 4 +--
llvm/test/Analysis/DependenceAnalysis/AA.ll | 18 +++++-----
.../loops-with-indirect-reads-and-writes.ll | 14 ++++----
.../LoopAccessAnalysis/noalias-scope-decl.ll | 8 ++---
.../underlying-object-loop-varying-phi.ll | 4 +--
.../Analysis/MemorySSA/invariant-groups.ll | 6 ++--
.../MemorySSA/invariant-load-intrinsic.ll | 8 ++---
.../Analysis/ScalarEvolution/cycled_phis.ll | 8 ++---
.../Analysis/ScalarEvolution/unknown_phis.ll | 8 ++---
.../Analysis/ScopedNoAliasAA/basic-domains.ll | 24 ++++++-------
llvm/test/Analysis/ScopedNoAliasAA/basic.ll | 8 ++---
llvm/test/Analysis/ScopedNoAliasAA/basic2.ll | 24 ++++++-------
.../TypeBasedAliasAnalysis/placement-tbaa.ll | 2 +-
.../TypeBasedAliasAnalysis/tbaa-path.ll | 24 ++++++-------
.../ValueTracking/memory-dereferenceable.ll | 4 +--
.../GlobalISel/irtranslator-dilocation.ll | 8 ++---
.../SPIRV/passes/translate-aggregate-uaddo.ll | 4 +--
llvm/test/DebugInfo/Generic/debug-label-mi.ll | 4 +--
.../test/DebugInfo/Generic/debug-label-opt.ll | 4 +--
llvm/test/DebugInfo/Generic/invalid.ll | 4 +--
.../X86/machinecse-wrongdebug-hoist.ll | 4 +--
.../unrecorded-live-at-sp.ll | 2 +-
llvm/test/Transforms/IRCE/only-lower-check.ll | 2 +-
llvm/test/Transforms/IRCE/only-upper-check.ll | 2 +-
.../VPlan/vplan-printing-metadata.ll | 36 +++++++++----------
.../LoopVectorize/VPlan/vplan-printing.ll | 8 ++---
.../MemProfContextDisambiguation/inlined2.ll | 2 +-
.../Passes/Other/print_region_pass.ll | 14 ++++----
.../RemoveDI/di-subroutine-localvar.ll | 4 +--
llvm/test/Verifier/absolute_symbol.ll | 12 +++----
llvm/test/Verifier/associated-metadata.ll | 14 ++++----
llvm/test/Verifier/commandline-meta1.ll | 2 +-
.../test/Verifier/dbg-orphaned-compileunit.ll | 2 +-
llvm/test/Verifier/di-subroutine-localvar.ll | 4 +--
llvm/test/Verifier/function-metadata-bad.ll | 8 ++---
llvm/test/Verifier/ident-meta1.ll | 2 +-
.../llvm.loop.estimated_trip_count.ll | 6 ++--
.../mdcompositetype-templateparams-tuple.ll | 6 ++--
.../mdcompositetype-templateparams.ll | 8 ++---
llvm/test/Verifier/module-flags-cgprofile.ll | 4 +--
llvm/test/Verifier/noalias-addrspace.ll | 8 ++---
llvm/test/Verifier/noalias_scope_decl.ll | 6 ++--
llvm/test/Verifier/ref.ll | 8 ++---
llvm/test/Verifier/reloc-none.ll | 2 +-
llvm/test/tools/llubi/metadata.ll | 20 +++++------
llvm/test/tools/llubi/metadata_noundef_ub.ll | 2 +-
llvm/test/tools/llubi/noalias_scope.ll | 2 +-
50 files changed, 197 insertions(+), 197 deletions(-)
diff --git a/llvm/test/Analysis/BasicAA/noalias-scope-decl.ll b/llvm/test/Analysis/BasicAA/noalias-scope-decl.ll
index 6c9f5363e2371..99b0c6e38cf37 100644
--- a/llvm/test/Analysis/BasicAA/noalias-scope-decl.ll
+++ b/llvm/test/Analysis/BasicAA/noalias-scope-decl.ll
@@ -14,12 +14,12 @@ define void @test1(ptr %P, ptr %Q) nounwind ssp {
; CHECK-LABEL: Function: test1:
; CHECK: MayAlias: i8* %P, i8* %Q
-; CHECK: NoModRef: Ptr: i8* %P <-> tail call void @llvm.experimental.noalias.scope.decl(metadata !0)
-; CHECK: NoModRef: Ptr: i8* %Q <-> tail call void @llvm.experimental.noalias.scope.decl(metadata !0)
+; CHECK: NoModRef: Ptr: i8* %P <-> tail call void @llvm.experimental.noalias.scope.decl(metadata ![[SCOPE:[0-9]+]])
+; CHECK: NoModRef: Ptr: i8* %Q <-> tail call void @llvm.experimental.noalias.scope.decl(metadata ![[SCOPE]])
; CHECK: Both ModRef: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0.p0.i64(ptr %P, ptr %Q, i64 12, i1 false)
; CHECK: Both ModRef: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0.p0.i64(ptr %P, ptr %Q, i64 12, i1 false)
-; CHECK: NoModRef: tail call void @llvm.experimental.noalias.scope.decl(metadata !0) <-> tail call void @llvm.memcpy.p0.p0.i64(ptr %P, ptr %Q, i64 12, i1 false)
-; CHECK: NoModRef: tail call void @llvm.memcpy.p0.p0.i64(ptr %P, ptr %Q, i64 12, i1 false) <-> tail call void @llvm.experimental.noalias.scope.decl(metadata !0)
+; CHECK: NoModRef: tail call void @llvm.experimental.noalias.scope.decl(metadata ![[SCOPE]]) <-> tail call void @llvm.memcpy.p0.p0.i64(ptr %P, ptr %Q, i64 12, i1 false)
+; CHECK: NoModRef: tail call void @llvm.memcpy.p0.p0.i64(ptr %P, ptr %Q, i64 12, i1 false) <-> tail call void @llvm.experimental.noalias.scope.decl(metadata ![[SCOPE]])
}
diff --git a/llvm/test/Analysis/CostModel/X86/free-intrinsics.ll b/llvm/test/Analysis/CostModel/X86/free-intrinsics.ll
index 773ef494a51b6..49f1bd83e96dd 100644
--- a/llvm/test/Analysis/CostModel/X86/free-intrinsics.ll
+++ b/llvm/test/Analysis/CostModel/X86/free-intrinsics.ll
@@ -7,7 +7,7 @@ define i32 @trivially_free() {
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %alloca = alloca i8, align 1
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %a0 = call i32 @llvm.annotation.i32.p0(i32 undef, ptr undef, ptr undef, i32 undef)
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.assume(i1 undef)
-; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.experimental.noalias.scope.decl(metadata !3)
+; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.experimental.noalias.scope.decl(metadata !{{[0-9]+}})
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.sideeffect()
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %a1 = call ptr @llvm.invariant.start.p0(i64 1, ptr undef)
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.invariant.end.p0(ptr undef, i64 1, ptr undef)
@@ -25,7 +25,7 @@ define i32 @trivially_free() {
; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %alloca = alloca i8, align 1
; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %a0 = call i32 @llvm.annotation.i32.p0(i32 undef, ptr undef, ptr undef, i32 undef)
; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.assume(i1 undef)
-; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.experimental.noalias.scope.decl(metadata !3)
+; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.experimental.noalias.scope.decl(metadata !{{[0-9]+}})
; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.sideeffect()
; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %a1 = call ptr @llvm.invariant.start.p0(i64 1, ptr undef)
; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.invariant.end.p0(ptr undef, i64 1, ptr undef)
diff --git a/llvm/test/Analysis/CostModel/free-intrinsics-datalayout.ll b/llvm/test/Analysis/CostModel/free-intrinsics-datalayout.ll
index f2117123ab8eb..4eeac08318cda 100644
--- a/llvm/test/Analysis/CostModel/free-intrinsics-datalayout.ll
+++ b/llvm/test/Analysis/CostModel/free-intrinsics-datalayout.ll
@@ -9,7 +9,7 @@ define i32 @trivially_free() {
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %alloca = alloca i8, align 4
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %a0 = call i32 @llvm.annotation.i32.p0(i32 undef, ptr undef, ptr undef, i32 undef)
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.assume(i1 undef)
-; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.experimental.noalias.scope.decl(metadata !3)
+; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.experimental.noalias.scope.decl(metadata !{{[0-9]+}})
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.sideeffect()
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %a1 = call ptr @llvm.invariant.start.p0(i64 1, ptr undef)
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.invariant.end.p0(ptr undef, i64 1, ptr undef)
@@ -29,7 +29,7 @@ define i32 @trivially_free() {
; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %alloca = alloca i8, align 4
; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %a0 = call i32 @llvm.annotation.i32.p0(i32 undef, ptr undef, ptr undef, i32 undef)
; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.assume(i1 undef)
-; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.experimental.noalias.scope.decl(metadata !3)
+; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.experimental.noalias.scope.decl(metadata !{{[0-9]+}})
; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.sideeffect()
; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %a1 = call ptr @llvm.invariant.start.p0(i64 1, ptr undef)
; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.invariant.end.p0(ptr undef, i64 1, ptr undef)
diff --git a/llvm/test/Analysis/CostModel/free-intrinsics-no_info.ll b/llvm/test/Analysis/CostModel/free-intrinsics-no_info.ll
index e454f110e0ee3..eab298a9bedf5 100644
--- a/llvm/test/Analysis/CostModel/free-intrinsics-no_info.ll
+++ b/llvm/test/Analysis/CostModel/free-intrinsics-no_info.ll
@@ -7,7 +7,7 @@ define i32 @trivially_free() {
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %alloca = alloca i8, align 1
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %a0 = call i32 @llvm.annotation.i32.p0(i32 undef, ptr undef, ptr undef, i32 undef)
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.assume(i1 undef)
-; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.experimental.noalias.scope.decl(metadata !3)
+; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.experimental.noalias.scope.decl(metadata !{{[0-9]+}})
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.sideeffect()
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %a1 = call ptr @llvm.invariant.start.p0(i64 1, ptr undef)
; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.invariant.end.p0(ptr undef, i64 1, ptr undef)
@@ -27,7 +27,7 @@ define i32 @trivially_free() {
; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %alloca = alloca i8, align 1
; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %a0 = call i32 @llvm.annotation.i32.p0(i32 undef, ptr undef, ptr undef, i32 undef)
; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.assume(i1 undef)
-; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.experimental.noalias.scope.decl(metadata !3)
+; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.experimental.noalias.scope.decl(metadata !{{[0-9]+}})
; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.sideeffect()
; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %a1 = call ptr @llvm.invariant.start.p0(i64 1, ptr undef)
; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: call void @llvm.invariant.end.p0(ptr undef, i64 1, ptr undef)
diff --git a/llvm/test/Analysis/DependenceAnalysis/AA.ll b/llvm/test/Analysis/DependenceAnalysis/AA.ll
index 173744a07ef96..a336e4fd49bb4 100644
--- a/llvm/test/Analysis/DependenceAnalysis/AA.ll
+++ b/llvm/test/Analysis/DependenceAnalysis/AA.ll
@@ -99,11 +99,11 @@ define void @test_global_size() {
define void @test_tbaa_same(ptr %A, ptr %B) {
; CHECK-LABEL: 'test_tbaa_same'
-; CHECK-NEXT: Src: store i32 1, ptr %A, align 4, !tbaa !0 --> Dst: store i32 1, ptr %A, align 4, !tbaa !0
+; CHECK-NEXT: Src: store i32 1, ptr %A, align 4, !tbaa !{{[0-9]+}} --> Dst: store i32 1, ptr %A, align 4, !tbaa !{{[0-9]+}}
; CHECK-NEXT: da analyze - none!
-; CHECK-NEXT: Src: store i32 1, ptr %A, align 4, !tbaa !0 --> Dst: store i32 2, ptr %B, align 4, !tbaa !0
+; CHECK-NEXT: Src: store i32 1, ptr %A, align 4, !tbaa !{{[0-9]+}} --> Dst: store i32 2, ptr %B, align 4, !tbaa !{{[0-9]+}}
; CHECK-NEXT: da analyze - confused!
-; CHECK-NEXT: Src: store i32 2, ptr %B, align 4, !tbaa !0 --> Dst: store i32 2, ptr %B, align 4, !tbaa !0
+; CHECK-NEXT: Src: store i32 2, ptr %B, align 4, !tbaa !{{[0-9]+}} --> Dst: store i32 2, ptr %B, align 4, !tbaa !{{[0-9]+}}
; CHECK-NEXT: da analyze - none!
;
store i32 1, ptr %A, !tbaa !5
@@ -113,11 +113,11 @@ define void @test_tbaa_same(ptr %A, ptr %B) {
define void @test_tbaa_diff(ptr %A, ptr %B) {
; CHECK-LABEL: 'test_tbaa_diff'
-; CHECK-NEXT: Src: store i32 1, ptr %A, align 4, !tbaa !0 --> Dst: store i32 1, ptr %A, align 4, !tbaa !0
+; CHECK-NEXT: Src: store i32 1, ptr %A, align 4, !tbaa !{{[0-9]+}} --> Dst: store i32 1, ptr %A, align 4, !tbaa !{{[0-9]+}}
; CHECK-NEXT: da analyze - none!
-; CHECK-NEXT: Src: store i32 1, ptr %A, align 4, !tbaa !0 --> Dst: store i16 2, ptr %B, align 2, !tbaa !4
+; CHECK-NEXT: Src: store i32 1, ptr %A, align 4, !tbaa !{{[0-9]+}} --> Dst: store i16 2, ptr %B, align 2, !tbaa !{{[0-9]+}}
; CHECK-NEXT: da analyze - none!
-; CHECK-NEXT: Src: store i16 2, ptr %B, align 2, !tbaa !4 --> Dst: store i16 2, ptr %B, align 2, !tbaa !4
+; CHECK-NEXT: Src: store i16 2, ptr %B, align 2, !tbaa !{{[0-9]+}} --> Dst: store i16 2, ptr %B, align 2, !tbaa !{{[0-9]+}}
; CHECK-NEXT: da analyze - none!
;
store i32 1, ptr %A, !tbaa !5
@@ -127,11 +127,11 @@ define void @test_tbaa_diff(ptr %A, ptr %B) {
define void @tbaa_loop(i32 %I, i32 %J, ptr nocapture %A, ptr nocapture readonly %B) {
; CHECK-LABEL: 'tbaa_loop'
-; CHECK-NEXT: Src: %0 = load i16, ptr %arrayidx.us, align 4, !tbaa !0 --> Dst: %0 = load i16, ptr %arrayidx.us, align 4, !tbaa !0
+; CHECK-NEXT: Src: %0 = load i16, ptr %arrayidx.us, align 4, !tbaa !{{[0-9]+}} --> Dst: %0 = load i16, ptr %arrayidx.us, align 4, !tbaa !{{[0-9]+}}
; CHECK-NEXT: da analyze - input [* *]!
-; CHECK-NEXT: Src: %0 = load i16, ptr %arrayidx.us, align 4, !tbaa !0 --> Dst: store i32 %add.us.lcssa, ptr %arrayidx6.us, align 4, !tbaa !4
+; CHECK-NEXT: Src: %0 = load i16, ptr %arrayidx.us, align 4, !tbaa !{{[0-9]+}} --> Dst: store i32 %add.us.lcssa, ptr %arrayidx6.us, align 4, !tbaa !{{[0-9]+}}
; CHECK-NEXT: da analyze - none!
-; CHECK-NEXT: Src: store i32 %add.us.lcssa, ptr %arrayidx6.us, align 4, !tbaa !4 --> Dst: store i32 %add.us.lcssa, ptr %arrayidx6.us, align 4, !tbaa !4
+; CHECK-NEXT: Src: store i32 %add.us.lcssa, ptr %arrayidx6.us, align 4, !tbaa !{{[0-9]+}} --> Dst: store i32 %add.us.lcssa, ptr %arrayidx6.us, align 4, !tbaa !{{[0-9]+}}
; CHECK-NEXT: da analyze - output [*]!
;
entry:
diff --git a/llvm/test/Analysis/LoopAccessAnalysis/loops-with-indirect-reads-and-writes.ll b/llvm/test/Analysis/LoopAccessAnalysis/loops-with-indirect-reads-and-writes.ll
index 3518d92c3511f..69c645e3a2863 100644
--- a/llvm/test/Analysis/LoopAccessAnalysis/loops-with-indirect-reads-and-writes.ll
+++ b/llvm/test/Analysis/LoopAccessAnalysis/loops-with-indirect-reads-and-writes.ll
@@ -25,12 +25,12 @@ define void @test_indirect_read_write_loop_also_modifies_pointer_array(ptr nound
; CHECK-NEXT: Unsafe indirect dependence.
; CHECK-NEXT: Dependences:
; CHECK-NEXT: IndirectUnsafe:
-; CHECK-NEXT: %l.2 = load i64, ptr %l.1, align 8, !tbaa !4 ->
-; CHECK-NEXT: store i64 %inc, ptr %l.1, align 8, !tbaa !4
+; CHECK-NEXT: %l.2 = load i64, ptr %l.1, align 8, !tbaa !{{[0-9]+}} ->
+; CHECK-NEXT: store i64 %inc, ptr %l.1, align 8, !tbaa !{{[0-9]+}}
; CHECK-EMPTY:
; CHECK-NEXT: Unknown:
-; CHECK-NEXT: %l.1 = load ptr, ptr %gep.iv.1, align 8, !tbaa !0 ->
-; CHECK-NEXT: store ptr %l.1, ptr %gep.iv.2, align 8, !tbaa !0
+; CHECK-NEXT: %l.1 = load ptr, ptr %gep.iv.1, align 8, !tbaa !{{[0-9]+}} ->
+; CHECK-NEXT: store ptr %l.1, ptr %gep.iv.2, align 8, !tbaa !{{[0-9]+}}
; CHECK-EMPTY:
; CHECK-NEXT: Run-time memory checks:
; CHECK-NEXT: Grouped accesses:
@@ -230,12 +230,12 @@ define void @test_indirect_read_write_loop_does_not_modify_pointer_array(ptr nou
; CHECK-NEXT: Unsafe indirect dependence.
; CHECK-NEXT: Dependences:
; CHECK-NEXT: IndirectUnsafe:
-; CHECK-NEXT: %l.2 = load i64, ptr %l.1, align 8, !tbaa !4 ->
-; CHECK-NEXT: store i64 %inc, ptr %l.1, align 8, !tbaa !4
+; CHECK-NEXT: %l.2 = load i64, ptr %l.1, align 8, !tbaa !{{[0-9]+}} ->
+; CHECK-NEXT: store i64 %inc, ptr %l.1, align 8, !tbaa !{{[0-9]+}}
; CHECK-EMPTY:
; CHECK-NEXT: Unknown:
; CHECK-NEXT: %l.3 = load i64, ptr %gep.arr2.iv.1, align 8 ->
-; CHECK-NEXT: store i64 %inc.2, ptr %gep.arr2.iv.2, align 8, !tbaa !0
+; CHECK-NEXT: store i64 %inc.2, ptr %gep.arr2.iv.2, align 8, !tbaa !{{[0-9]+}}
; CHECK-EMPTY:
; CHECK-NEXT: Run-time memory checks:
; CHECK-NEXT: Grouped accesses:
diff --git a/llvm/test/Analysis/LoopAccessAnalysis/noalias-scope-decl.ll b/llvm/test/Analysis/LoopAccessAnalysis/noalias-scope-decl.ll
index fb296f5089422..df0695f216aa4 100644
--- a/llvm/test/Analysis/LoopAccessAnalysis/noalias-scope-decl.ll
+++ b/llvm/test/Analysis/LoopAccessAnalysis/noalias-scope-decl.ll
@@ -11,12 +11,12 @@ define void @test_scope_in_loop(ptr %arg, i64 %num) {
; CHECK-NEXT: Backward loop carried data dependence.
; CHECK-NEXT: Dependences:
; CHECK-NEXT: Backward:
-; CHECK-NEXT: %load.prev = load i8, ptr %prev.ptr, align 1, !alias.scope !0, !noalias !3 ->
-; CHECK-NEXT: store i8 %add, ptr %cur.ptr, align 1, !alias.scope !3
+; CHECK-NEXT: %load.prev = load i8, ptr %prev.ptr, align 1, !alias.scope !{{[0-9]+}}, !noalias !{{[0-9]+}} ->
+; CHECK-NEXT: store i8 %add, ptr %cur.ptr, align 1, !alias.scope !{{[0-9]+}}
; CHECK-EMPTY:
; CHECK-NEXT: Forward:
-; CHECK-NEXT: %load.cur = load i8, ptr %cur.ptr, align 1, !alias.scope !3 ->
-; CHECK-NEXT: store i8 %add, ptr %cur.ptr, align 1, !alias.scope !3
+; CHECK-NEXT: %load.cur = load i8, ptr %cur.ptr, align 1, !alias.scope !{{[0-9]+}} ->
+; CHECK-NEXT: store i8 %add, ptr %cur.ptr, align 1, !alias.scope !{{[0-9]+}}
; CHECK-EMPTY:
; CHECK-NEXT: Run-time memory checks:
; CHECK-NEXT: Grouped accesses:
diff --git a/llvm/test/Analysis/LoopAccessAnalysis/underlying-object-loop-varying-phi.ll b/llvm/test/Analysis/LoopAccessAnalysis/underlying-object-loop-varying-phi.ll
index 0708f908211ef..2a90b3179df6d 100644
--- a/llvm/test/Analysis/LoopAccessAnalysis/underlying-object-loop-varying-phi.ll
+++ b/llvm/test/Analysis/LoopAccessAnalysis/underlying-object-loop-varying-phi.ll
@@ -11,8 +11,8 @@ define void @indirect_ptr_recurrences_read_write(ptr %A, ptr %B) {
; CHECK-NEXT: Unsafe indirect dependence.
; CHECK-NEXT: Dependences:
; CHECK-NEXT: IndirectUnsafe:
-; CHECK-NEXT: %l = load i32, ptr %ptr.recur, align 4, !tbaa !4 ->
-; CHECK-NEXT: store i32 %xor, ptr %ptr.recur, align 4, !tbaa !4
+; CHECK-NEXT: %l = load i32, ptr %ptr.recur, align 4, !tbaa !{{[0-9]+}} ->
+; CHECK-NEXT: store i32 %xor, ptr %ptr.recur, align 4, !tbaa !{{[0-9]+}}
; CHECK-EMPTY:
; CHECK-NEXT: Run-time memory checks:
; CHECK-NEXT: Grouped accesses:
diff --git a/llvm/test/Analysis/MemorySSA/invariant-groups.ll b/llvm/test/Analysis/MemorySSA/invariant-groups.ll
index 2042855af5569..8cc0a30d9c4a7 100644
--- a/llvm/test/Analysis/MemorySSA/invariant-groups.ll
+++ b/llvm/test/Analysis/MemorySSA/invariant-groups.ll
@@ -348,7 +348,7 @@ define i8 @optimizable() {
entry:
%ptr = alloca i8
; CHECK: 1 = MemoryDef(liveOnEntry)
-; CHECK-NEXT: store i8 42, ptr %ptr, align 1, !invariant.group !0
+; CHECK-NEXT: store i8 42, ptr %ptr, align 1, !invariant.group !{{[0-9]+}}
store i8 42, ptr %ptr, !invariant.group !0
; CHECK: 2 = MemoryDef(1)
; CHECK-NEXT: call ptr @llvm.launder.invariant.group
@@ -377,7 +377,7 @@ entry:
define i8 @unoptimizable2() {
%ptr = alloca i8
; CHECK: 1 = MemoryDef(liveOnEntry)
-; CHECK-NEXT: store i8 42, ptr %ptr, align 1, !invariant.group !0
+; CHECK-NEXT: store i8 42, ptr %ptr, align 1, !invariant.group !{{[0-9]+}}
store i8 42, ptr %ptr, !invariant.group !0
; CHECK: 2 = MemoryDef(1)
; CHECK-NEXT: call ptr @llvm.launder.invariant.group
@@ -397,7 +397,7 @@ define i8 @unoptimizable2() {
; CHECK-NEXT: call void @use(ptr %ptr3)
call void @use(ptr %ptr3)
; CHECK: MemoryUse(7)
-; CHECK-NEXT: %v = load i8, ptr %ptr3, align 1, !invariant.group !0
+; CHECK-NEXT: %v = load i8, ptr %ptr3, align 1, !invariant.group !{{[0-9]+}}
%v = load i8, ptr %ptr3, !invariant.group !0
ret i8 %v
}
diff --git a/llvm/test/Analysis/MemorySSA/invariant-load-intrinsic.ll b/llvm/test/Analysis/MemorySSA/invariant-load-intrinsic.ll
index 0151912bfc205..0ab1eaa54ff34 100644
--- a/llvm/test/Analysis/MemorySSA/invariant-load-intrinsic.ll
+++ b/llvm/test/Analysis/MemorySSA/invariant-load-intrinsic.ll
@@ -7,7 +7,7 @@ define <4 x i32> @masked_load_invariant(ptr %p, <4 x i1> %mask, <4 x i32> %passt
; CHECK: 1 = MemoryDef(liveOnEntry)
; CHECK-NEXT: call void @clobber(ptr %p)
; CHECK: MemoryUse(liveOnEntry)
-; CHECK-NEXT: %v = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 %p, <4 x i1> %mask, <4 x i32> %passthru), !invariant.load !0
+; CHECK-NEXT: %v = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 %p, <4 x i1> %mask, <4 x i32> %passthru), !invariant.load !{{[0-9]+}}
call void @clobber(ptr %p)
%v = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 %p, <4 x i1> %mask, <4 x i32> %passthru), !invariant.load !0
ret <4 x i32> %v
@@ -29,7 +29,7 @@ define <4 x i32> @masked_gather_invariant(ptr %p, <4 x ptr> %ptrs, <4 x i1> %mas
; CHECK: 1 = MemoryDef(liveOnEntry)
; CHECK-NEXT: call void @clobber(ptr %p)
; CHECK: MemoryUse(liveOnEntry)
-; CHECK-NEXT: %v = call <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr> align 4 %ptrs, <4 x i1> %mask, <4 x i32> %passthru), !invariant.load !0
+; CHECK-NEXT: %v = call <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr> align 4 %ptrs, <4 x i1> %mask, <4 x i32> %passthru), !invariant.load !{{[0-9]+}}
call void @clobber(ptr %p)
%v = call <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr> align 4 %ptrs, <4 x i1> %mask, <4 x i32> %passthru), !invariant.load !0
ret <4 x i32> %v
@@ -40,7 +40,7 @@ define <4 x i32> @masked_expandload_invariant(ptr %p, <4 x i1> %mask, <4 x i32>
; CHECK: 1 = MemoryDef(liveOnEntry)
; CHECK-NEXT: call void @clobber(ptr %p)
; CHECK: MemoryUse(liveOnEntry)
-; CHECK-NEXT: %v = call <4 x i32> @llvm.masked.expandload.v4i32.p0(ptr %p, <4 x i1> %mask, <4 x i32> %passthru), !invariant.load !0
+; CHECK-NEXT: %v = call <4 x i32> @llvm.masked.expandload.v4i32.p0(ptr %p, <4 x i1> %mask, <4 x i32> %passthru), !invariant.load !{{[0-9]+}}
call void @clobber(ptr %p)
%v = call <4 x i32> @llvm.masked.expandload.v4i32.p0(ptr %p, <4 x i1> %mask, <4 x i32> %passthru), !invariant.load !0
ret <4 x i32> %v
@@ -51,7 +51,7 @@ define <4 x i32> @vp_gather_invariant(ptr %p, <4 x ptr> %ptrs, <4 x i1> %mask, i
; CHECK: 1 = MemoryDef(liveOnEntry)
; CHECK-NEXT: call void @clobber(ptr %p)
; CHECK: MemoryUse(liveOnEntry)
-; CHECK-NEXT: %v = call <4 x i32> @llvm.vp.gather.v4i32.v4p0(<4 x ptr> %ptrs, <4 x i1> %mask, i32 %vl), !invariant.load !0
+; CHECK-NEXT: %v = call <4 x i32> @llvm.vp.gather.v4i32.v4p0(<4 x ptr> %ptrs, <4 x i1> %mask, i32 %vl), !invariant.load !{{[0-9]+}}
call void @clobber(ptr %p)
%v = call <4 x i32> @llvm.vp.gather.v4i32.v4p0(<4 x ptr> %ptrs, <4 x i1> %mask, i32 %vl), !invariant.load !0
ret <4 x i32> %v
diff --git a/llvm/test/Analysis/ScalarEvolution/cycled_phis.ll b/llvm/test/Analysis/ScalarEvolution/cycled_phis.ll
index 478bcf94daf69..7e1fe130710c0 100644
--- a/llvm/test/Analysis/ScalarEvolution/cycled_phis.ll
+++ b/llvm/test/Analysis/ScalarEvolution/cycled_phis.ll
@@ -35,13 +35,13 @@ exit:
define void @test_02(ptr %p, ptr %q) {
; CHECK-LABEL: 'test_02'
; CHECK-NEXT: Classifying expressions for: @test_02
-; CHECK-NEXT: %start = load i32, ptr %p, align 4, !range !0
+; CHECK-NEXT: %start = load i32, ptr %p, align 4, !range !{{[0-9]+}}
; CHECK-NEXT: --> %start U: [0,1000) S: [0,1000)
; CHECK-NEXT: %outer_phi = phi i32 [ %start, %entry ], [ %inner_lcssa, %outer_backedge ]
; CHECK-NEXT: --> %outer_phi U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %outer_loop: Variant, %inner_loop: Invariant }
; CHECK-NEXT: %inner_phi = phi i32 [ %outer_phi, %outer_loop ], [ %inner_load, %inner_loop ]
; CHECK-NEXT: --> %inner_phi U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %inner_loop: Variant, %outer_loop: Variant }
-; CHECK-NEXT: %inner_load = load i32, ptr %q, align 4, !range !1
+; CHECK-NEXT: %inner_load = load i32, ptr %q, align 4, !range !{{[0-9]+}}
; CHECK-NEXT: --> %inner_load U: [2000,3000) S: [2000,3000) Exits: <<Unknown>> LoopDispositions: { %inner_loop: Variant, %outer_loop: Variant }
; CHECK-NEXT: %inner_cond = call i1 @cond()
; CHECK-NEXT: --> %inner_cond U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %inner_loop: Variant, %outer_loop: Variant }
@@ -84,9 +84,9 @@ exit:
define void @test_03(ptr %p, ptr %q) {
; CHECK-LABEL: 'test_03'
; CHECK-NEXT: Classifying expressions for: @test_03
-; CHECK-NEXT: %start_1 = load i32, ptr %p, align 4, !range !0
+; CHECK-NEXT: %start_1 = load i32, ptr %p, align 4, !range !{{[0-9]+}}
; CHECK-NEXT: --> %start_1 U: [0,1000) S: [0,1000)
-; CHECK-NEXT: %start_2 = load i32, ptr %q, align 4, !range !1
+; CHECK-NEXT: %start_2 = load i32, ptr %q, align 4, !range !{{[0-9]+}}
; CHECK-NEXT: --> %start_2 U: [2000,3000) S: [2000,3000)
; CHECK-NEXT: %outer_phi = phi i32 [ %start_1, %entry ], [ %inner_lcssa, %outer_backedge ]
; CHECK-NEXT: --> %outer_phi U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %outer_loop: Variant, %inner_loop: Invariant }
diff --git a/llvm/test/Analysis/ScalarEvolution/unknown_phis.ll b/llvm/test/Analysis/ScalarEvolution/unknown_phis.ll
index c6d430f96b7de..99d23570f2d88 100644
--- a/llvm/test/Analysis/ScalarEvolution/unknown_phis.ll
+++ b/llvm/test/Analysis/ScalarEvolution/unknown_phis.ll
@@ -4,9 +4,9 @@
define void @merge_values_with_ranges(ptr %a_len_ptr, ptr %b_len_ptr, i1 %unknown_cond) {
; CHECK-LABEL: 'merge_values_with_ranges'
; CHECK-NEXT: Classifying expressions for: @merge_values_with_ranges
-; CHECK-NEXT: %len_a = load i32, ptr %a_len_ptr, align 4, !range !0
+; CHECK-NEXT: %len_a = load i32, ptr %a_len_ptr, align 4, !range !{{[0-9]+}}
; CHECK-NEXT: --> %len_a U: [0,2147483647) S: [0,2147483647)
-; CHECK-NEXT: %len_b = load i32, ptr %b_len_ptr, align 4, !range !0
+; CHECK-NEXT: %len_b = load i32, ptr %b_len_ptr, align 4, !range !{{[0-9]+}}
; CHECK-NEXT: --> %len_b U: [0,2147483647) S: [0,2147483647)
; CHECK-NEXT: %len = phi i32 [ %len_a, %if.true ], [ %len_b, %if.false ]
; CHECK-NEXT: --> %len U: [0,2147483647) S: [0,2147483647)
@@ -34,9 +34,9 @@ define void @merge_values_with_ranges_looped(ptr %a_len_ptr, ptr %b_len_ptr) {
; go into infinite loop analyzing these Phis.
; CHECK-LABEL: 'merge_values_with_ranges_looped'
; CHECK-NEXT: Classifying expressions for: @merge_values_with_ranges_looped
-; CHECK-NEXT: %len_a = load i32, ptr %a_len_ptr, align 4, !range !0
+; CHECK-NEXT: %len_a = load i32, ptr %a_len_ptr, align 4, !range !{{[0-9]+}}
; CHECK-NEXT: --> %len_a U: [0,2147483647) S: [0,2147483647)
-; CHECK-NEXT: %len_b = load i32, ptr %b_len_ptr, align 4, !range !0
+; CHECK-NEXT: %len_b = load i32, ptr %b_len_ptr, align 4, !range !{{[0-9]+}}
; CHECK-NEXT: --> %len_b U: [0,2147483647) S: [0,2147483647)
; CHECK-NEXT: %p1 = phi i32 [ %len_a, %entry ], [ %p2, %loop ]
; CHECK-NEXT: --> %p1 U: [0,-2147483648) S: [0,-2147483648) Exits: <<Unknown>> LoopDispositions: { %loop: Variant }
diff --git a/llvm/test/Analysis/ScopedNoAliasAA/basic-domains.ll b/llvm/test/Analysis/ScopedNoAliasAA/basic-domains.ll
index 96fceee2bcfc6..9f417a6e373c1 100644
--- a/llvm/test/Analysis/ScopedNoAliasAA/basic-domains.ll
+++ b/llvm/test/Analysis/ScopedNoAliasAA/basic-domains.ll
@@ -40,16 +40,16 @@ attributes #0 = { nounwind uwtable }
; A list of scopes from both domains.
!0 = !{!1, !3, !4}
-; CHECK: NoAlias: %0 = load float, ptr %c, align 4, !alias.scope !0 <-> store float %0, ptr %arrayidx.i, align 4, !noalias !6
-; CHECK: NoAlias: %0 = load float, ptr %c, align 4, !alias.scope !0 <-> store float %1, ptr %arrayidx.i2, align 4, !noalias !6
-; CHECK: MayAlias: %0 = load float, ptr %c, align 4, !alias.scope !0 <-> store float %2, ptr %arrayidx.i3, align 4, !noalias !7
-; CHECK: NoAlias: %1 = load float, ptr %c, align 4, !alias.scope !7 <-> store float %0, ptr %arrayidx.i, align 4, !noalias !6
-; CHECK: NoAlias: %1 = load float, ptr %c, align 4, !alias.scope !7 <-> store float %1, ptr %arrayidx.i2, align 4, !noalias !6
-; CHECK: NoAlias: %1 = load float, ptr %c, align 4, !alias.scope !7 <-> store float %2, ptr %arrayidx.i3, align 4, !noalias !7
-; CHECK: NoAlias: %2 = load float, ptr %c, align 4, !alias.scope !6 <-> store float %0, ptr %arrayidx.i, align 4, !noalias !6
-; CHECK: NoAlias: %2 = load float, ptr %c, align 4, !alias.scope !6 <-> store float %1, ptr %arrayidx.i2, align 4, !noalias !6
-; CHECK: MayAlias: %2 = load float, ptr %c, align 4, !alias.scope !6 <-> store float %2, ptr %arrayidx.i3, align 4, !noalias !7
-; CHECK: NoAlias: store float %1, ptr %arrayidx.i2, align 4, !noalias !6 <-> store float %0, ptr %arrayidx.i, align 4, !noalias !6
-; CHECK: NoAlias: store float %2, ptr %arrayidx.i3, align 4, !noalias !7 <-> store float %0, ptr %arrayidx.i, align 4, !noalias !6
-; CHECK: NoAlias: store float %2, ptr %arrayidx.i3, align 4, !noalias !7 <-> store float %1, ptr %arrayidx.i2, align 4, !noalias !6
+; CHECK: NoAlias: %0 = load float, ptr %c, align 4, !alias.scope !{{[0-9]+}} <-> store float %0, ptr %arrayidx.i, align 4, !noalias !{{[0-9]+}}
+; CHECK: NoAlias: %0 = load float, ptr %c, align 4, !alias.scope !{{[0-9]+}} <-> store float %1, ptr %arrayidx.i2, align 4, !noalias !{{[0-9]+}}
+; CHECK: MayAlias: %0 = load float, ptr %c, align 4, !alias.scope !{{[0-9]+}} <-> store float %2, ptr %arrayidx.i3, align 4, !noalias !{{[0-9]+}}
+; CHECK: NoAlias: %1 = load float, ptr %c, align 4, !alias.scope !{{[0-9]+}} <-> store float %0, ptr %arrayidx.i, align 4, !noalias !{{[0-9]+}}
+; CHECK: NoAlias: %1 = load float, ptr %c, align 4, !alias.scope !{{[0-9]+}} <-> store float %1, ptr %arrayidx.i2, align 4, !noalias !{{[0-9]+}}
+; CHECK: NoAlias: %1 = load float, ptr %c, align 4, !alias.scope !{{[0-9]+}} <-> store float %2, ptr %arrayidx.i3, align 4, !noalias !{{[0-9]+}}
+; CHECK: NoAlias: %2 = load float, ptr %c, align 4, !alias.scope !{{[0-9]+}} <-> store float %0, ptr %arrayidx.i, align 4, !noalias !{{[0-9]+}}
+; CHECK: NoAlias: %2 = load float, ptr %c, align 4, !alias.scope !{{[0-9]+}} <-> store float %1, ptr %arrayidx.i2, align 4, !noalias !{{[0-9]+}}
+; CHECK: MayAlias: %2 = load float, ptr %c, align 4, !alias.scope !{{[0-9]+}} <-> store float %2, ptr %arrayidx.i3, align 4, !noalias !{{[0-9]+}}
+; CHECK: NoAlias: store float %1, ptr %arrayidx.i2, align 4, !noalias !{{[0-9]+}} <-> store float %0, ptr %arrayidx.i, align 4, !noalias !{{[0-9]+}}
+; CHECK: NoAlias: store float %2, ptr %arrayidx.i3, align 4, !noalias !{{[0-9]+}} <-> store float %0, ptr %arrayidx.i, align 4, !noalias !{{[0-9]+}}
+; CHECK: NoAlias: store float %2, ptr %arrayidx.i3, align 4, !noalias !{{[0-9]+}} <-> store float %1, ptr %arrayidx.i2, align 4, !noalias !{{[0-9]+}}
diff --git a/llvm/test/Analysis/ScopedNoAliasAA/basic.ll b/llvm/test/Analysis/ScopedNoAliasAA/basic.ll
index 0a16a11e007d5..e7f1a5f147035 100644
--- a/llvm/test/Analysis/ScopedNoAliasAA/basic.ll
+++ b/llvm/test/Analysis/ScopedNoAliasAA/basic.ll
@@ -13,11 +13,11 @@ entry:
store float %1, ptr %arrayidx, align 4
ret void
-; CHECK: NoAlias: %0 = load float, ptr %c, align 4, !alias.scope !0 <-> store float %0, ptr %arrayidx.i, align 4, !noalias !0
-; CHECK: MayAlias: %0 = load float, ptr %c, align 4, !alias.scope !0 <-> store float %1, ptr %arrayidx, align 4
-; CHECK: MayAlias: %1 = load float, ptr %c, align 4 <-> store float %0, ptr %arrayidx.i, align 4, !noalias !0
+; CHECK: NoAlias: %0 = load float, ptr %c, align 4, !alias.scope !{{[0-9]+}} <-> store float %0, ptr %arrayidx.i, align 4, !noalias !{{[0-9]+}}
+; CHECK: MayAlias: %0 = load float, ptr %c, align 4, !alias.scope !{{[0-9]+}} <-> store float %1, ptr %arrayidx, align 4
+; CHECK: MayAlias: %1 = load float, ptr %c, align 4 <-> store float %0, ptr %arrayidx.i, align 4, !noalias !{{[0-9]+}}
; CHECK: MayAlias: %1 = load float, ptr %c, align 4 <-> store float %1, ptr %arrayidx, align 4
-; CHECK: NoAlias: store float %1, ptr %arrayidx, align 4 <-> store float %0, ptr %arrayidx.i, align 4, !noalias !0
+; CHECK: NoAlias: store float %1, ptr %arrayidx, align 4 <-> store float %0, ptr %arrayidx.i, align 4, !noalias !{{[0-9]+}}
}
attributes #0 = { nounwind uwtable }
diff --git a/llvm/test/Analysis/ScopedNoAliasAA/basic2.ll b/llvm/test/Analysis/ScopedNoAliasAA/basic2.ll
index b17f4e1a25fb8..751d0452baa53 100644
--- a/llvm/test/Analysis/ScopedNoAliasAA/basic2.ll
+++ b/llvm/test/Analysis/ScopedNoAliasAA/basic2.ll
@@ -15,19 +15,19 @@ entry:
store float %1, ptr %arrayidx, align 4
ret void
-; CHECK: MayAlias: %0 = load float, ptr %c, align 4, !alias.scope !0 <-> store float %0, ptr %arrayidx.i, align 4, !alias.scope !4, !noalia
-; CHECK: s !5
-; CHECK: MayAlias: %0 = load float, ptr %c, align 4, !alias.scope !0 <-> store float %0, ptr %arrayidx1.i, align 4, !alias.scope !0, !noali
-; CHECK: as !4
-; CHECK: MayAlias: %0 = load float, ptr %c, align 4, !alias.scope !0 <-> store float %1, ptr %arrayidx, align 4
-; CHECK: MayAlias: %1 = load float, ptr %c, align 4 <-> store float %0, ptr %arrayidx.i, align 4, !alias.scope !4, !noalias !5
-; CHECK: MayAlias: %1 = load float, ptr %c, align 4 <-> store float %0, ptr %arrayidx1.i, align 4, !alias.scope !0, !noalias !4
+; CHECK: MayAlias: %0 = load float, ptr %c, align 4, !alias.scope !{{[0-9]+}} <-> store float %0, ptr %arrayidx.i, align 4, !alias.scope !{{[0-9]+}}, !noalia
+; CHECK: s !{{[0-9]+}}
+; CHECK: MayAlias: %0 = load float, ptr %c, align 4, !alias.scope !{{[0-9]+}} <-> store float %0, ptr %arrayidx1.i, align 4, !alias.scope !{{[0-9]+}}, !noali
+; CHECK: as !{{[0-9]+}}
+; CHECK: MayAlias: %0 = load float, ptr %c, align 4, !alias.scope !{{[0-9]+}} <-> store float %1, ptr %arrayidx, align 4
+; CHECK: MayAlias: %1 = load float, ptr %c, align 4 <-> store float %0, ptr %arrayidx.i, align 4, !alias.scope !{{[0-9]+}}, !noalias !{{[0-9]+}}
+; CHECK: MayAlias: %1 = load float, ptr %c, align 4 <-> store float %0, ptr %arrayidx1.i, align 4, !alias.scope !{{[0-9]+}}, !noalias !{{[0-9]+}}
; CHECK: MayAlias: %1 = load float, ptr %c, align 4 <-> store float %1, ptr %arrayidx, align 4
-; CHECK: NoAlias: store float %0, ptr %arrayidx1.i, align 4, !alias.scope !0, !noalias !4 <-> store float %0, ptr %arrayidx.i, align
-; CHECK: 4, !alias.scope !4, !noalias !5
-; CHECK: NoAlias: store float %1, ptr %arrayidx, align 4 <-> store float %0, ptr %arrayidx.i, align 4, !alias.scope !4, !noalias !5
-; CHECK: MayAlias: store float %1, ptr %arrayidx, align 4 <-> store float %0, ptr %arrayidx1.i, align 4, !alias.scope !0, !noalias !
-; CHECK: 4
+; CHECK: NoAlias: store float %0, ptr %arrayidx1.i, align 4, !alias.scope !{{[0-9]+}}, !noalias !{{[0-9]+}} <-> store float %0, ptr %arrayidx.i, align
+; CHECK: 4, !alias.scope !{{[0-9]+}}, !noalias !{{[0-9]+}}
+; CHECK: NoAlias: store float %1, ptr %arrayidx, align 4 <-> store float %0, ptr %arrayidx.i, align 4, !alias.scope !{{[0-9]+}}, !noalias !{{[0-9]+}}
+; CHECK: MayAlias: store float %1, ptr %arrayidx, align 4 <-> store float %0, ptr %arrayidx1.i, align 4, !alias.scope !{{[0-9]+}}, !noalias !
+; CHECK: {{[0-9]+}}
}
attributes #0 = { nounwind uwtable }
diff --git a/llvm/test/Analysis/TypeBasedAliasAnalysis/placement-tbaa.ll b/llvm/test/Analysis/TypeBasedAliasAnalysis/placement-tbaa.ll
index e9ce95b57d00b..7f28a6368e318 100644
--- a/llvm/test/Analysis/TypeBasedAliasAnalysis/placement-tbaa.ll
+++ b/llvm/test/Analysis/TypeBasedAliasAnalysis/placement-tbaa.ll
@@ -18,7 +18,7 @@
; Basic AA says MayAlias, TBAA says NoAlias
; CHECK: MayAlias: ptr* %5, i64* %9
-; CHECK: NoAlias: store i64 %conv, ptr %9, align 8, !tbaa !6 <-> store ptr null, ptr %5, align 8, !tbaa !9
+; CHECK: NoAlias: store i64 %conv, ptr %9, align 8, !tbaa !{{[0-9]+}} <-> store ptr null, ptr %5, align 8, !tbaa !{{[0-9]+}}
%struct.Foo = type { i64 }
%struct.Bar = type { ptr }
diff --git a/llvm/test/Analysis/TypeBasedAliasAnalysis/tbaa-path.ll b/llvm/test/Analysis/TypeBasedAliasAnalysis/tbaa-path.ll
index f9a2988dc7e40..2529dc6865fe9 100644
--- a/llvm/test/Analysis/TypeBasedAliasAnalysis/tbaa-path.ll
+++ b/llvm/test/Analysis/TypeBasedAliasAnalysis/tbaa-path.ll
@@ -13,7 +13,7 @@ define i32 @_Z1gPjP7StructAy(ptr %s, ptr %A, i64 %count) {
entry:
; Access to ptr and &(A->f32).
; CHECK: Function
-; CHECK: MayAlias: store i32 4, ptr %f32, align 4, !tbaa !8 <-> store i32 1, ptr %0, align 4, !tbaa !6
+; CHECK: MayAlias: store i32 4, ptr %f32, align 4, !tbaa !{{[0-9]+}} <-> store i32 1, ptr %0, align 4, !tbaa !{{[0-9]+}}
; OPT: define
; OPT: store i32 1
; OPT: store i32 4
@@ -39,7 +39,7 @@ define i32 @_Z2g2PjP7StructAy(ptr %s, ptr %A, i64 %count) {
entry:
; Access to ptr and &(A->f16).
; CHECK: Function
-; CHECK: NoAlias: store i16 4, ptr %1, align 2, !tbaa !8 <-> store i32 1, ptr %0, align 4, !tbaa !6
+; CHECK: NoAlias: store i16 4, ptr %1, align 2, !tbaa !{{[0-9]+}} <-> store i32 1, ptr %0, align 4, !tbaa !{{[0-9]+}}
; OPT: define
; OPT: store i32 1
; OPT: store i16 4
@@ -64,7 +64,7 @@ define i32 @_Z2g3P7StructAP7StructBy(ptr %A, ptr %B, i64 %count) {
entry:
; Access to &(A->f32) and &(B->a.f32).
; CHECK: Function
-; CHECK: MayAlias: store i32 4, ptr %f321, align 4, !tbaa !10 <-> store i32 1, ptr %f32, align 4, !tbaa !6
+; CHECK: MayAlias: store i32 4, ptr %f321, align 4, !tbaa !{{[0-9]+}} <-> store i32 1, ptr %f32, align 4, !tbaa !{{[0-9]+}}
; OPT: define
; OPT: store i32 1
; OPT: store i32 4
@@ -93,7 +93,7 @@ define i32 @_Z2g4P7StructAP7StructBy(ptr %A, ptr %B, i64 %count) {
entry:
; Access to &(A->f32) and &(B->a.f16).
; CHECK: Function
-; CHECK: NoAlias: store i16 4, ptr %a, align 2, !tbaa !10 <-> store i32 1, ptr %f32, align 4, !tbaa !6
+; CHECK: NoAlias: store i16 4, ptr %a, align 2, !tbaa !{{[0-9]+}} <-> store i32 1, ptr %f32, align 4, !tbaa !{{[0-9]+}}
; OPT: define
; OPT: store i32 1
; OPT: store i16 4
@@ -121,7 +121,7 @@ define i32 @_Z2g5P7StructAP7StructBy(ptr %A, ptr %B, i64 %count) {
entry:
; Access to &(A->f32) and &(B->f32).
; CHECK: Function
-; CHECK: NoAlias: store i32 4, ptr %f321, align 4, !tbaa !10 <-> store i32 1, ptr %f32, align 4, !tbaa !6
+; CHECK: NoAlias: store i32 4, ptr %f321, align 4, !tbaa !{{[0-9]+}} <-> store i32 1, ptr %f32, align 4, !tbaa !{{[0-9]+}}
; OPT: define
; OPT: store i32 1
; OPT: store i32 4
@@ -149,7 +149,7 @@ define i32 @_Z2g6P7StructAP7StructBy(ptr %A, ptr %B, i64 %count) {
entry:
; Access to &(A->f32) and &(B->a.f32_2).
; CHECK: Function
-; CHECK: NoAlias: store i32 4, ptr %f32_2, align 4, !tbaa !10 <-> store i32 1, ptr %f32, align 4, !tbaa !6
+; CHECK: NoAlias: store i32 4, ptr %f32_2, align 4, !tbaa !{{[0-9]+}} <-> store i32 1, ptr %f32, align 4, !tbaa !{{[0-9]+}}
; OPT: define
; OPT: store i32 1
; OPT: store i32 4
@@ -178,7 +178,7 @@ define i32 @_Z2g7P7StructAP7StructSy(ptr %A, ptr %S, i64 %count) {
entry:
; Access to &(A->f32) and &(S->f32).
; CHECK: Function
-; CHECK: NoAlias: store i32 4, ptr %f321, align 4, !tbaa !10 <-> store i32 1, ptr %f32, align 4, !tbaa !6
+; CHECK: NoAlias: store i32 4, ptr %f321, align 4, !tbaa !{{[0-9]+}} <-> store i32 1, ptr %f32, align 4, !tbaa !{{[0-9]+}}
; OPT: define
; OPT: store i32 1
; OPT: store i32 4
@@ -206,7 +206,7 @@ define i32 @_Z2g8P7StructAP7StructSy(ptr %A, ptr %S, i64 %count) {
entry:
; Access to &(A->f32) and &(S->f16).
; CHECK: Function
-; CHECK: NoAlias: store i16 4, ptr %1, align 2, !tbaa !10 <-> store i32 1, ptr %f32, align 4, !tbaa !6
+; CHECK: NoAlias: store i16 4, ptr %1, align 2, !tbaa !{{[0-9]+}} <-> store i32 1, ptr %f32, align 4, !tbaa !{{[0-9]+}}
; OPT: define
; OPT: store i32 1
; OPT: store i16 4
@@ -233,7 +233,7 @@ define i32 @_Z2g9P7StructSP8StructS2y(ptr %S, ptr %S2, i64 %count) {
entry:
; Access to &(S->f32) and &(S2->f32).
; CHECK: Function
-; CHECK: NoAlias: store i32 4, ptr %f321, align 4, !tbaa !10 <-> store i32 1, ptr %f32, align 4, !tbaa !6
+; CHECK: NoAlias: store i32 4, ptr %f321, align 4, !tbaa !{{[0-9]+}} <-> store i32 1, ptr %f32, align 4, !tbaa !{{[0-9]+}}
; OPT: define
; OPT: store i32 1
; OPT: store i32 4
@@ -261,7 +261,7 @@ define i32 @_Z3g10P7StructSP8StructS2y(ptr %S, ptr %S2, i64 %count) {
entry:
; Access to &(S->f32) and &(S2->f16).
; CHECK: Function
-; CHECK: NoAlias: store i16 4, ptr %1, align 2, !tbaa !10 <-> store i32 1, ptr %f32, align 4, !tbaa !6
+; CHECK: NoAlias: store i16 4, ptr %1, align 2, !tbaa !{{[0-9]+}} <-> store i32 1, ptr %f32, align 4, !tbaa !{{[0-9]+}}
; OPT: define
; OPT: store i32 1
; OPT: store i16 4
@@ -288,7 +288,7 @@ define i32 @_Z3g11P7StructCP7StructDy(ptr %C, ptr %D, i64 %count) {
entry:
; Access to &(C->b.a.f32) and &(D->b.a.f32).
; CHECK: Function
-; CHECK: NoAlias: store i32 4, ptr %f323, align 4, !tbaa !12 <-> store i32 1, ptr %f32, align 4, !tbaa !6
+; CHECK: NoAlias: store i32 4, ptr %f323, align 4, !tbaa !{{[0-9]+}} <-> store i32 1, ptr %f32, align 4, !tbaa !{{[0-9]+}}
; OPT: define
; OPT: store i32 1
; OPT: store i32 4
@@ -322,7 +322,7 @@ define i32 @_Z3g12P7StructCP7StructDy(ptr %C, ptr %D, i64 %count) {
entry:
; Access to &(b1->a.f32) and &(b2->a.f32).
; CHECK: Function
-; CHECK: MayAlias: store i32 4, ptr %f325, align 4, !tbaa !6 <-> store i32 1, ptr %f32, align 4, !tbaa !6
+; CHECK: MayAlias: store i32 4, ptr %f325, align 4, !tbaa !{{[0-9]+}} <-> store i32 1, ptr %f32, align 4, !tbaa !{{[0-9]+}}
; OPT: define
; OPT: store i32 1
; OPT: store i32 4
diff --git a/llvm/test/Analysis/ValueTracking/memory-dereferenceable.ll b/llvm/test/Analysis/ValueTracking/memory-dereferenceable.ll
index 09c8e74a5c675..9fbf27c3d7e72 100644
--- a/llvm/test/Analysis/ValueTracking/memory-dereferenceable.ll
+++ b/llvm/test/Analysis/ValueTracking/memory-dereferenceable.ll
@@ -230,8 +230,8 @@ define void @byval(ptr byval(i8) %i8_byval,
}
; CHECK-LABEL: 'f_0'
-; GLOBAL: %ptr = inttoptr i32 %val to ptr, !dereferenceable !0
-; POINT-NOT: %ptr = inttoptr i32 %val to ptr, !dereferenceable !0
+; GLOBAL: %ptr = inttoptr i32 %val to ptr, !dereferenceable !{{[0-9]+}}
+; POINT-NOT: %ptr = inttoptr i32 %val to ptr, !dereferenceable !{{[0-9]+}}
define i32 @f_0(i32 %val) {
%ptr = inttoptr i32 %val to ptr, !dereferenceable !0
call void @mayfree()
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-dilocation.ll b/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-dilocation.ll
index 7883aa2fb940d..2bd019b148a94 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-dilocation.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-dilocation.ll
@@ -7,10 +7,10 @@
; CHECK: Checking DILocation from %rv = alloca i32, align 4{{.*}} was copied to G_FRAME_INDEX
; CHECK: Checking DILocation from store i32 0, ptr %retval, align 4{{.*}} was copied to G_CONSTANT
; CHECK: Checking DILocation from store i32 0, ptr %retval, align 4{{.*}} was copied to G_STORE
-; CHECK: Checking DILocation from store i32 0, ptr %rv, align 4, !dbg !12{{.*}} was copied to G_STORE debug-location !12; t.cpp:2:5
-; CHECK: Checking DILocation from %0 = load i32, ptr %rv, align 4, !dbg !13{{.*}} was copied to G_LOAD debug-location !13; t.cpp:3:8
-; CHECK: Checking DILocation from ret i32 %0, !dbg !14{{.*}} was copied to COPY debug-location !14; t.cpp:3:1
-; CHECK: Checking DILocation from ret i32 %0, !dbg !14{{.*}} was copied to RET_ReallyLR implicit $w0, debug-location !14; t.cpp:3:1
+; CHECK: Checking DILocation from store i32 0, ptr %rv, align 4, !dbg ![[STORE_LOC:[0-9]+]]{{.*}} was copied to G_STORE debug-location ![[STORE_LOC]]; t.cpp:2:5
+; CHECK: Checking DILocation from %0 = load i32, ptr %rv, align 4, !dbg ![[LOAD_LOC:[0-9]+]]{{.*}} was copied to G_LOAD debug-location ![[LOAD_LOC]]; t.cpp:3:8
+; CHECK: Checking DILocation from ret i32 %0, !dbg ![[RET_LOC:[0-9]+]]{{.*}} was copied to COPY debug-location ![[RET_LOC]]; t.cpp:3:1
+; CHECK: Checking DILocation from ret i32 %0, !dbg ![[RET_LOC]]{{.*}} was copied to RET_ReallyLR implicit $w0, debug-location ![[RET_LOC]]; t.cpp:3:1
source_filename = "t.cpp"
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
diff --git a/llvm/test/CodeGen/SPIRV/passes/translate-aggregate-uaddo.ll b/llvm/test/CodeGen/SPIRV/passes/translate-aggregate-uaddo.ll
index c207ed5100408..1007404411d8f 100644
--- a/llvm/test/CodeGen/SPIRV/passes/translate-aggregate-uaddo.ll
+++ b/llvm/test/CodeGen/SPIRV/passes/translate-aggregate-uaddo.ll
@@ -14,9 +14,9 @@
; CHECK-IR: %math = extractvalue { i32, i1 } %[[R1]], 0
; CHECK-IR: %ov = extractvalue { i32, i1 } %[[R1]], 1
; Type/Name attributes of the value.
-; CHECK-IR: ![[#MD1]] = !{{[{]}}![[#MD2:]], !""{{[}]}}
+; CHECK-IR-DAG: ![[#MD1]] = !{{[{]}}![[#MD2:]], !""{{[}]}}
; Origin data type of the value.
-; CHECK-IR: ![[#MD2]] = !{{[{]}}{{[{]}} i32, i1 {{[}]}} poison{{[}]}}
+; CHECK-IR-DAG: ![[#MD2]] = !{{[{]}}{{[{]}} i32, i1 {{[}]}} poison{{[}]}}
; RUN: llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -print-after=irtranslator 2>&1 | FileCheck %s --check-prefix=CHECK-GMIR
; Required info succeeded to get through IRTranslator.
diff --git a/llvm/test/DebugInfo/Generic/debug-label-mi.ll b/llvm/test/DebugInfo/Generic/debug-label-mi.ll
index 85260d6728152..e1738377fe87b 100644
--- a/llvm/test/DebugInfo/Generic/debug-label-mi.ll
+++ b/llvm/test/DebugInfo/Generic/debug-label-mi.ll
@@ -7,8 +7,8 @@
; RUN: llc -debug-only=isel %s -o /dev/null 2> %t.debug
; RUN: cat %t.debug | FileCheck %s --check-prefix=CHECKMI
;
-; CHECKMI: DBG_LABEL "top", debug-location !9
-; CHECKMI: DBG_LABEL "done", debug-location !11
+; CHECKMI: DBG_LABEL "top", debug-location !{{[0-9]+}}
+; CHECKMI: DBG_LABEL "done", debug-location !{{[0-9]+}}
;
; RUN: llc %s -o - | FileCheck %s --check-prefix=CHECKASM
;
diff --git a/llvm/test/DebugInfo/Generic/debug-label-opt.ll b/llvm/test/DebugInfo/Generic/debug-label-opt.ll
index e875216164305..feacb0fc7bfff 100644
--- a/llvm/test/DebugInfo/Generic/debug-label-opt.ll
+++ b/llvm/test/DebugInfo/Generic/debug-label-opt.ll
@@ -4,8 +4,8 @@
; RUN: llc -debug-only=isel %s -o /dev/null 2> %t.debug
; RUN: cat %t.debug | FileCheck %s --check-prefix=CHECKMI
;
-; CHECKMI: DBG_LABEL "end_sum", debug-location !17
-; CHECKMI: DBG_LABEL "end", debug-location !19
+; CHECKMI: DBG_LABEL "end_sum", debug-location !{{[0-9]+}}
+; CHECKMI: DBG_LABEL "end", debug-location !{{[0-9]+}}
source_filename = "debug-label-opt.c"
define i32 @foo(ptr nocapture readonly %a, i32 %n) local_unnamed_addr !dbg !7 {
diff --git a/llvm/test/DebugInfo/Generic/invalid.ll b/llvm/test/DebugInfo/Generic/invalid.ll
index bea22ed9ec65a..7ce353d047898 100644
--- a/llvm/test/DebugInfo/Generic/invalid.ll
+++ b/llvm/test/DebugInfo/Generic/invalid.ll
@@ -3,9 +3,9 @@
; Make sure we emit this diagnostic only once (which means we don't visit the
; same DISubprogram twice.
; CHECK: subprogram definitions must have a compile unit
-; CHECK-NEXT: !3 = distinct !DISubprogram(name: "patatino", scope: null, type: !4, spFlags: DISPFlagDefinition)
+; CHECK-NEXT: !{{[0-9]+}} = distinct !DISubprogram(name: "patatino", scope: null, type: !{{[0-9]+}}, spFlags: DISPFlagDefinition)
; CHECK-NOT: subprogram definitions must have a compile unit
-; CHECK-NOT: !3 = distinct !DISubprogram(name: "patatino", scope: null, type: !4, spFlags: DISPFlagDefinition)
+; CHECK-NOT: !{{[0-9]+}} = distinct !DISubprogram(name: "patatino", scope: null, type: !{{[0-9]+}}, spFlags: DISPFlagDefinition)
; CHECK: warning: ignoring invalid debug info
define void @tinkywinky() !dbg !3 { ret void }
diff --git a/llvm/test/DebugInfo/X86/machinecse-wrongdebug-hoist.ll b/llvm/test/DebugInfo/X86/machinecse-wrongdebug-hoist.ll
index 4660315040b35..7802b2b6f1311 100644
--- a/llvm/test/DebugInfo/X86/machinecse-wrongdebug-hoist.ll
+++ b/llvm/test/DebugInfo/X86/machinecse-wrongdebug-hoist.ll
@@ -1,8 +1,8 @@
; RUN: llc %s -o - -print-after=machine-cse -mtriple=x86_64-- 2>&1 | FileCheck %s --match-full-lines
-; CHECK: %5:gr32 = SUB32ri %0:gr32(tied-def 0), 1, implicit-def $eflags, debug-location !24; a.c:3:13
+; CHECK: %5:gr32 = SUB32ri %0:gr32(tied-def 0), 1, implicit-def $eflags, debug-location !{{[0-9]+}}; a.c:3:13
; CHECK-NEXT: %10:gr32 = MOVSX32rr8 %4:gr8
-; CHECK-NEXT: JCC_1 %bb.2, 15, implicit $eflags, debug-location !25; a.c:3:18
+; CHECK-NEXT: JCC_1 %bb.2, 15, implicit $eflags, debug-location !{{[0-9]+}}; a.c:3:18
target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.15.0"
diff --git a/llvm/test/SafepointIRVerifier/unrecorded-live-at-sp.ll b/llvm/test/SafepointIRVerifier/unrecorded-live-at-sp.ll
index 42130c507fd09..91d5bce560e9f 100644
--- a/llvm/test/SafepointIRVerifier/unrecorded-live-at-sp.ll
+++ b/llvm/test/SafepointIRVerifier/unrecorded-live-at-sp.ll
@@ -1,7 +1,7 @@
; RUN: opt %s -safepoint-ir-verifier-print-only -verify-safepoint-ir -S 2>&1 | FileCheck %s
; CHECK: Illegal use of unrelocated value found!
-; CHECK-NEXT: Def: %base_phi4 = phi ptr addrspace(1) [ %addr98.relocated, %not_zero146 ], [ %base_phi2, %bci_37-aload ], !is_base_value !0
+; CHECK-NEXT: Def: %base_phi4 = phi ptr addrspace(1) [ %addr98.relocated, %not_zero146 ], [ %base_phi2, %bci_37-aload ], !is_base_value !{{[0-9]+}}
; CHECK-NEXT: Use: %safepoint_token = tail call token (i64, i32, ptr, i32, i32, ...) @llvm.experimental.gc.statepoint.p0(i64 0, i32 0, ptr elementtype(i32 ()) undef, i32 0, i32 0, i32 0, i32 0) [ "gc-live"(ptr addrspace(1) %base_phi1, ptr addrspace(1) %base_phi4, ptr addrspace(1) %relocated4, ptr addrspace(1) %relocated7) ]
diff --git a/llvm/test/Transforms/IRCE/only-lower-check.ll b/llvm/test/Transforms/IRCE/only-lower-check.ll
index f934ac02373a7..c0e7f0641aaa1 100644
--- a/llvm/test/Transforms/IRCE/only-lower-check.ll
+++ b/llvm/test/Transforms/IRCE/only-lower-check.ll
@@ -4,7 +4,7 @@
; CHECK: irce: loop has 1 inductive range checks:
; CHECK-NEXT: InductiveRangeCheck:
; CHECK-NEXT: Begin: (-1 + %n) Step: -1 End: 2147483647
-; CHECK-NEXT: CheckUse: br i1 %abc, label %in.bounds, label %out.of.bounds, !prof !1 Operand: 0
+; CHECK-NEXT: CheckUse: br i1 %abc, label %in.bounds, label %out.of.bounds, !prof !{{[0-9]+}} Operand: 0
; CHECK-NEXT: irce: in function only_lower_check: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>
define void @only_lower_check(ptr %arr, ptr %a_len_ptr, i32 %n) {
diff --git a/llvm/test/Transforms/IRCE/only-upper-check.ll b/llvm/test/Transforms/IRCE/only-upper-check.ll
index d6ed8c80f2664..e9795c69faf6a 100644
--- a/llvm/test/Transforms/IRCE/only-upper-check.ll
+++ b/llvm/test/Transforms/IRCE/only-upper-check.ll
@@ -4,7 +4,7 @@
; CHECK: irce: loop has 1 inductive range checks:
; CHECK-NEXT:InductiveRangeCheck:
; CHECK-NEXT: Begin: %offset Step: 1 End: %len
-; CHECK-NEXT: CheckUse: br i1 %abc, label %in.bounds, label %out.of.bounds, !prof !1 Operand: 0
+; CHECK-NEXT: CheckUse: br i1 %abc, label %in.bounds, label %out.of.bounds, !prof !{{[0-9]+}} Operand: 0
; CHECK-NEXT: irce: in function incrementing: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>
define void @incrementing(ptr %arr, ptr %a_len_ptr, i32 %n, i32 %offset) {
diff --git a/llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-metadata.ll b/llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-metadata.ll
index 26b0bc47fd257..ccc4e44dbcf9c 100644
--- a/llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-metadata.ll
+++ b/llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-metadata.ll
@@ -23,13 +23,13 @@ define void @test_widen_metadata(ptr noalias %A, ptr noalias %B, i32 %n) {
; CHECK-NEXT: vp<[[VP4:%[0-9]+]]> = SCALAR-STEPS vp<[[VP3]]>, ir<1>, vp<[[VP0]]>
; CHECK-NEXT: CLONE ir<%gep.A> = getelementptr inbounds ir<%A>, vp<[[VP4]]>
; CHECK-NEXT: vp<[[VP5:%[0-9]+]]> = vector-pointer inbounds i32, ir<%gep.A>, ir<1>
-; CHECK-NEXT: WIDEN ir<%lv> = load vp<[[VP5]]> (!tbaa !0)
-; CHECK-NEXT: WIDEN-CAST ir<%conv> = sitofp ir<%lv> to float (!fpmath !4)
-; CHECK-NEXT: WIDEN ir<%mul> = fmul ir<%conv>, ir<2.000000e+00> (!fpmath !4)
+; CHECK-NEXT: WIDEN ir<%lv> = load vp<[[VP5]]> (!tbaa !{{[0-9]+}})
+; CHECK-NEXT: WIDEN-CAST ir<%conv> = sitofp ir<%lv> to float (!fpmath !{{[0-9]+}})
+; CHECK-NEXT: WIDEN ir<%mul> = fmul ir<%conv>, ir<2.000000e+00> (!fpmath !{{[0-9]+}})
; CHECK-NEXT: WIDEN-CAST ir<%conv.back> = fptosi ir<%mul> to i32
; CHECK-NEXT: CLONE ir<%gep.B> = getelementptr inbounds ir<%B>, vp<[[VP4]]>
; CHECK-NEXT: vp<[[VP6:%[0-9]+]]> = vector-pointer inbounds i32, ir<%gep.B>, ir<1>
-; CHECK-NEXT: WIDEN store vp<[[VP6]]>, ir<%conv.back> (!tbaa !0)
+; CHECK-NEXT: WIDEN store vp<[[VP6]]>, ir<%conv.back> (!tbaa !{{[0-9]+}})
; CHECK-NEXT: EMIT vp<%index.next> = add nuw vp<[[VP3]]>, vp<[[VP1]]>
; CHECK-NEXT: EMIT branch-on-count vp<%index.next>, vp<[[VP2]]>
; CHECK-NEXT: No successors
@@ -51,12 +51,12 @@ define void @test_widen_metadata(ptr noalias %A, ptr noalias %B, i32 %n) {
; CHECK-NEXT: ir-bb<loop>:
; CHECK-NEXT: IR %i = phi i32 [ 0, %entry ], [ %i.next, %loop ] (extra operand: vp<%bc.resume.val> from scalar.ph)
; CHECK-NEXT: IR %gep.A = getelementptr inbounds i32, ptr %A, i32 %i
-; CHECK-NEXT: IR %lv = load i32, ptr %gep.A, align 4, !tbaa !0, !range !3
-; CHECK-NEXT: IR %conv = sitofp i32 %lv to float, !fpmath !4
-; CHECK-NEXT: IR %mul = fmul float %conv, 2.000000e+00, !fpmath !4
+; CHECK-NEXT: IR %lv = load i32, ptr %gep.A, align 4, !tbaa !{{[0-9]+}}, !range !{{[0-9]+}}
+; CHECK-NEXT: IR %conv = sitofp i32 %lv to float, !fpmath !{{[0-9]+}}
+; CHECK-NEXT: IR %mul = fmul float %conv, 2.000000e+00, !fpmath !{{[0-9]+}}
; CHECK-NEXT: IR %conv.back = fptosi float %mul to i32
; CHECK-NEXT: IR %gep.B = getelementptr inbounds i32, ptr %B, i32 %i
-; CHECK-NEXT: IR store i32 %conv.back, ptr %gep.B, align 4, !tbaa !0
+; CHECK-NEXT: IR store i32 %conv.back, ptr %gep.B, align 4, !tbaa !{{[0-9]+}}
; CHECK-NEXT: IR %i.next = add i32 %i, 1
; CHECK-NEXT: IR %cond = icmp eq i32 %i.next, %n
; CHECK-NEXT: No successors
@@ -104,11 +104,11 @@ define void @test_intrinsic_with_metadata(ptr noalias %A, ptr noalias %B, i32 %n
; CHECK-NEXT: vp<[[VP4:%[0-9]+]]> = SCALAR-STEPS vp<[[VP3]]>, ir<1>, vp<[[VP0]]>
; CHECK-NEXT: CLONE ir<%gep.A> = getelementptr inbounds ir<%A>, vp<[[VP4]]>
; CHECK-NEXT: vp<[[VP5:%[0-9]+]]> = vector-pointer inbounds float, ir<%gep.A>, ir<1>
-; CHECK-NEXT: WIDEN ir<%lv> = load vp<[[VP5]]> (!tbaa !0)
-; CHECK-NEXT: WIDEN-INTRINSIC ir<%sqrt> = call llvm.sqrt(ir<%lv>) (!fpmath !3)
+; CHECK-NEXT: WIDEN ir<%lv> = load vp<[[VP5]]> (!tbaa !{{[0-9]+}})
+; CHECK-NEXT: WIDEN-INTRINSIC ir<%sqrt> = call llvm.sqrt(ir<%lv>) (!fpmath !{{[0-9]+}})
; CHECK-NEXT: CLONE ir<%gep.B> = getelementptr inbounds ir<%B>, vp<[[VP4]]>
; CHECK-NEXT: vp<[[VP6:%[0-9]+]]> = vector-pointer inbounds float, ir<%gep.B>, ir<1>
-; CHECK-NEXT: WIDEN store vp<[[VP6]]>, ir<%sqrt> (!tbaa !0)
+; CHECK-NEXT: WIDEN store vp<[[VP6]]>, ir<%sqrt> (!tbaa !{{[0-9]+}})
; CHECK-NEXT: EMIT vp<%index.next> = add nuw vp<[[VP3]]>, vp<[[VP1]]>
; CHECK-NEXT: EMIT branch-on-count vp<%index.next>, vp<[[VP2]]>
; CHECK-NEXT: No successors
@@ -130,10 +130,10 @@ define void @test_intrinsic_with_metadata(ptr noalias %A, ptr noalias %B, i32 %n
; CHECK-NEXT: ir-bb<loop>:
; CHECK-NEXT: IR %i = phi i32 [ 0, %entry ], [ %i.next, %loop ] (extra operand: vp<%bc.resume.val> from scalar.ph)
; CHECK-NEXT: IR %gep.A = getelementptr inbounds float, ptr %A, i32 %i
-; CHECK-NEXT: IR %lv = load float, ptr %gep.A, align 4, !tbaa !0
-; CHECK-NEXT: IR %sqrt = call float @llvm.sqrt.f32(float %lv), !fpmath !3
+; CHECK-NEXT: IR %lv = load float, ptr %gep.A, align 4, !tbaa !{{[0-9]+}}
+; CHECK-NEXT: IR %sqrt = call float @llvm.sqrt.f32(float %lv), !fpmath !{{[0-9]+}}
; CHECK-NEXT: IR %gep.B = getelementptr inbounds float, ptr %B, i32 %i
-; CHECK-NEXT: IR store float %sqrt, ptr %gep.B, align 4, !tbaa !0
+; CHECK-NEXT: IR store float %sqrt, ptr %gep.B, align 4, !tbaa !{{[0-9]+}}
; CHECK-NEXT: IR %i.next = add i32 %i, 1
; CHECK-NEXT: IR %cond = icmp eq i32 %i.next, %n
; CHECK-NEXT: No successors
@@ -178,13 +178,13 @@ define void @test_widen_with_multiple_metadata(ptr noalias %A, ptr noalias %B, i
; CHECK-NEXT: vp<[[VP4:%[0-9]+]]> = SCALAR-STEPS vp<[[VP3]]>, ir<1>, vp<[[VP0]]>
; CHECK-NEXT: CLONE ir<%gep.A> = getelementptr inbounds ir<%A>, vp<[[VP4]]>
; CHECK-NEXT: vp<[[VP5:%[0-9]+]]> = vector-pointer inbounds i32, ir<%gep.A>, ir<1>
-; CHECK-NEXT: WIDEN ir<%lv> = load vp<[[VP5]]> (!tbaa !0)
+; CHECK-NEXT: WIDEN ir<%lv> = load vp<[[VP5]]> (!tbaa !{{[0-9]+}})
; CHECK-NEXT: WIDEN-CAST ir<%conv> = sitofp ir<%lv> to float
; CHECK-NEXT: WIDEN ir<%mul> = fmul ir<%conv>, ir<2.000000e+00>
; CHECK-NEXT: WIDEN-CAST ir<%conv.back> = fptosi ir<%mul> to i32
; CHECK-NEXT: CLONE ir<%gep.B> = getelementptr inbounds ir<%B>, vp<[[VP4]]>
; CHECK-NEXT: vp<[[VP6:%[0-9]+]]> = vector-pointer inbounds i32, ir<%gep.B>, ir<1>
-; CHECK-NEXT: WIDEN store vp<[[VP6]]>, ir<%conv.back> (!tbaa !0)
+; CHECK-NEXT: WIDEN store vp<[[VP6]]>, ir<%conv.back> (!tbaa !{{[0-9]+}})
; CHECK-NEXT: EMIT vp<%index.next> = add nuw vp<[[VP3]]>, vp<[[VP1]]>
; CHECK-NEXT: EMIT branch-on-count vp<%index.next>, vp<[[VP2]]>
; CHECK-NEXT: No successors
@@ -206,12 +206,12 @@ define void @test_widen_with_multiple_metadata(ptr noalias %A, ptr noalias %B, i
; CHECK-NEXT: ir-bb<loop>:
; CHECK-NEXT: IR %i = phi i32 [ 0, %entry ], [ %i.next, %loop ] (extra operand: vp<%bc.resume.val> from scalar.ph)
; CHECK-NEXT: IR %gep.A = getelementptr inbounds i32, ptr %A, i32 %i
-; CHECK-NEXT: IR %lv = load i32, ptr %gep.A, align 4, !tbaa !0, !range !3
+; CHECK-NEXT: IR %lv = load i32, ptr %gep.A, align 4, !tbaa !{{[0-9]+}}, !range !{{[0-9]+}}
; CHECK-NEXT: IR %conv = sitofp i32 %lv to float
; CHECK-NEXT: IR %mul = fmul float %conv, 2.000000e+00
; CHECK-NEXT: IR %conv.back = fptosi float %mul to i32
; CHECK-NEXT: IR %gep.B = getelementptr inbounds i32, ptr %B, i32 %i
-; CHECK-NEXT: IR store i32 %conv.back, ptr %gep.B, align 4, !tbaa !0
+; CHECK-NEXT: IR store i32 %conv.back, ptr %gep.B, align 4, !tbaa !{{[0-9]+}}
; CHECK-NEXT: IR %i.next = add i32 %i, 1
; CHECK-NEXT: IR %cond = icmp eq i32 %i.next, %n
; CHECK-NEXT: No successors
diff --git a/llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing.ll b/llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing.ll
index 405e9004919a2..bdc7b1f5d29bf 100644
--- a/llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing.ll
+++ b/llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing.ll
@@ -435,10 +435,10 @@ define void @recipe_debug_loc_location(ptr nocapture %src) !dbg !5 {
; CHECK-EMPTY:
; CHECK-NEXT: ir-bb<loop>:
; CHECK-NEXT: IR %iv = phi i64 [ 0, %entry ], [ %iv.next, %if.end ] (extra operand: vp<%bc.resume.val> from scalar.ph)
-; CHECK-NEXT: IR %isd = getelementptr inbounds i32, ptr %src, i64 %iv, !dbg !7
-; CHECK-NEXT: IR %lsd = load i32, ptr %isd, align 4, !dbg !8
-; CHECK-NEXT: IR %psd = add nuw nsw i32 %lsd, 23, !dbg !9
-; CHECK-NEXT: IR %cmp1 = icmp slt i32 %lsd, 100, !dbg !10
+; CHECK-NEXT: IR %isd = getelementptr inbounds i32, ptr %src, i64 %iv, !dbg !{{[0-9]+}}
+; CHECK-NEXT: IR %lsd = load i32, ptr %isd, align 4, !dbg !{{[0-9]+}}
+; CHECK-NEXT: IR %psd = add nuw nsw i32 %lsd, 23, !dbg !{{[0-9]+}}
+; CHECK-NEXT: IR %cmp1 = icmp slt i32 %lsd, 100, !dbg !{{[0-9]+}}
; CHECK-NEXT: No successors
; CHECK-NEXT: }
;
diff --git a/llvm/test/Transforms/MemProfContextDisambiguation/inlined2.ll b/llvm/test/Transforms/MemProfContextDisambiguation/inlined2.ll
index 2cc655e927d12..c906c5661a6e9 100644
--- a/llvm/test/Transforms/MemProfContextDisambiguation/inlined2.ll
+++ b/llvm/test/Transforms/MemProfContextDisambiguation/inlined2.ll
@@ -111,7 +111,7 @@ attributes #7 = { builtin }
; DUMP: CCG before cloning:
; DUMP: Callsite Context Graph:
; DUMP: Node [[BAR:0x[a-z0-9]+]]
-; DUMP: %call = call noalias noundef nonnull dereferenceable(10) ptr @_Znam(i64 noundef 10) #7, !heapallocsite !7 (clone 0)
+; DUMP: %call = call noalias noundef nonnull dereferenceable(10) ptr @_Znam(i64 noundef 10) #7, !heapallocsite !{{[0-9]+}} (clone 0)
; DUMP: AllocTypes: NotColdCold
; DUMP: ContextIds: 1 2
; DUMP: CalleeEdges:
diff --git a/llvm/test/Transforms/SandboxVectorizer/Passes/Other/print_region_pass.ll b/llvm/test/Transforms/SandboxVectorizer/Passes/Other/print_region_pass.ll
index 0b808d6025e46..1a9bf1c3a484c 100644
--- a/llvm/test/Transforms/SandboxVectorizer/Passes/Other/print_region_pass.ll
+++ b/llvm/test/Transforms/SandboxVectorizer/Passes/Other/print_region_pass.ll
@@ -3,15 +3,15 @@
define void @foo(i8 %v) {
; CHECK: -- Region --
-; CHECK-NEXT: %add0 = add i8 %v, 0, !sandboxvec !0 {{.*}}
+; CHECK-NEXT: %add0 = add i8 %v, 0, !sandboxvec !{{[0-9]+}} {{.*}}
; CHECK: -- Region --
-; CHECK-NEXT: %add1 = add i8 %v, 1, !sandboxvec !1 {{.*}}
-; CHECK-NEXT: %add2 = add i8 %v, 2, !sandboxvec !1 {{.*}}
-; CHECK-NEXT: %add3 = add i8 %v, 3, !sandboxvec !1, !sandboxaux !2 {{.*}}
-; CHECK-NEXT: %add4 = add i8 %v, 4, !sandboxvec !1, !sandboxaux !3 {{.*}}
+; CHECK-NEXT: %add1 = add i8 %v, 1, !sandboxvec !{{[0-9]+}} {{.*}}
+; CHECK-NEXT: %add2 = add i8 %v, 2, !sandboxvec !{{[0-9]+}} {{.*}}
+; CHECK-NEXT: %add3 = add i8 %v, 3, !sandboxvec !{{[0-9]+}}, !sandboxaux !{{[0-9]+}} {{.*}}
+; CHECK-NEXT: %add4 = add i8 %v, 4, !sandboxvec !{{[0-9]+}}, !sandboxaux !{{[0-9]+}} {{.*}}
; CHECK: Aux:
-; CHECK-NEXT: %add3 = add i8 %v, 3, !sandboxvec !1, !sandboxaux !2 {{.*}}
-; CHECK-NEXT: %add4 = add i8 %v, 4, !sandboxvec !1, !sandboxaux !3 {{.*}}
+; CHECK-NEXT: %add3 = add i8 %v, 3, !sandboxvec !{{[0-9]+}}, !sandboxaux !{{[0-9]+}} {{.*}}
+; CHECK-NEXT: %add4 = add i8 %v, 4, !sandboxvec !{{[0-9]+}}, !sandboxaux !{{[0-9]+}} {{.*}}
%add0 = add i8 %v, 0, !sandboxvec !0
%add1 = add i8 %v, 1, !sandboxvec !1
%add2 = add i8 %v, 2, !sandboxvec !1
diff --git a/llvm/test/Verifier/RemoveDI/di-subroutine-localvar.ll b/llvm/test/Verifier/RemoveDI/di-subroutine-localvar.ll
index 14e5888398996..965ee62fe8643 100644
--- a/llvm/test/Verifier/RemoveDI/di-subroutine-localvar.ll
+++ b/llvm/test/Verifier/RemoveDI/di-subroutine-localvar.ll
@@ -1,7 +1,7 @@
; RUN: opt %s -passes=verify 2>&1 | FileCheck %s
; CHECK: invalid type
-; CHECK: !20 = !DILocalVariable(name: "f", scope: !21, file: !13, line: 970, type: !14)
-; CHECK: !14 = !DISubroutineType(types: !15)
+; CHECK: !{{[0-9]+}} = !DILocalVariable(name: "f", scope: !{{[0-9]+}}, file: !{{[0-9]+}}, line: 970, type: !{{[0-9]+}})
+; CHECK: !{{[0-9]+}} = !DISubroutineType(types: !{{[0-9]+}})
%timespec.0.1.2.3.0.1.2 = type { i64, i64 }
diff --git a/llvm/test/Verifier/absolute_symbol.ll b/llvm/test/Verifier/absolute_symbol.ll
index df3da8e547cb3..13b99759c388e 100644
--- a/llvm/test/Verifier/absolute_symbol.ll
+++ b/llvm/test/Verifier/absolute_symbol.ll
@@ -37,21 +37,21 @@ define void @absolute_func_empty_arguments() !absolute_symbol !0 {
@absolute_wrong_order = external global i32, !absolute_symbol !15
; CHECK: It should have at least one range!
-; CHECK-NEXT: !0 = !{}
+; CHECK-NEXT: !{{[0-9]+}} = !{}
; CHECK: It should have at least one range!
-; CHECK-NEXT: !0 = !{}
+; CHECK-NEXT: !{{[0-9]+}} = !{}
!0 = !{}
; CHECK-NEXT: Unfinished range!
-; CHECK-NEXT: !1 = !{i64 128}
+; CHECK-NEXT: !{{[0-9]+}} = !{i64 128}
!1 = !{i64 128}
; CHECK-NEXT: Unfinished range!
-; CHECK-NEXT: !2 = !{i64 128, i64 256, i64 512}
+; CHECK-NEXT: !{{[0-9]+}} = !{i64 128, i64 256, i64 512}
!2 = !{i64 128, i64 256, i64 512}
; CHECK-NEXT: Unfinished range!
-; CHECK-NEXT: !3 = !{i32 256}
+; CHECK-NEXT: !{{[0-9]+}} = !{i32 256}
!3 = !{i32 256}
; CHECK-NEXT: Range types must match instruction type!
@@ -67,7 +67,7 @@ define void @absolute_func_empty_arguments() !absolute_symbol !0 {
!6 = !{i64 256, i32 512}
; CHECK-NEXT: Range must not be empty!
-; CHECK-NEXT: !7 = !{i64 0, i64 0}
+; CHECK-NEXT: !{{[0-9]+}} = !{i64 0, i64 0}
!7 = !{i64 0, i64 0}
; CHECK-NEXT: The upper and lower limits cannot be the same value
diff --git a/llvm/test/Verifier/associated-metadata.ll b/llvm/test/Verifier/associated-metadata.ll
index 00f30e6b82878..112c2c4fecc71 100644
--- a/llvm/test/Verifier/associated-metadata.ll
+++ b/llvm/test/Verifier/associated-metadata.ll
@@ -2,37 +2,37 @@
; CHECK: associated value must be pointer typed
; CHECK-NEXT: ptr addrspace(1) @associated.int
-; CHECK-NEXT: !0 = !{i32 1}
+; CHECK-NEXT: !{{[0-9]+}} = !{i32 1}
@associated.int = external addrspace(1) constant [8 x i8], !associated !0
; CHECK: associated value must be pointer typed
; CHECK-NEXT: ptr addrspace(1) @associated.float
-; CHECK-NEXT: !1 = !{float 1.000000e+00}
+; CHECK-NEXT: !{{[0-9]+}} = !{float 1.000000e+00}
@associated.float = external addrspace(1) constant [8 x i8], !associated !1
; CHECK: associated metadata must have one operand
; CHECK-NEXT: ptr addrspace(1) @associated.too.many.ops
-; CHECK-NEXT: !2 = !{ptr @gv.decl0, ptr @gv.decl1}
+; CHECK-NEXT: !{{[0-9]+}} = !{ptr @gv.decl0, ptr @gv.decl1}
@associated.too.many.ops = external addrspace(1) constant [8 x i8], !associated !2
; CHECK: associated metadata must have one operand
; CHECK-NEXT: ptr addrspace(1) @associated.empty
-; CHECK-NEXT: !3 = !{}
+; CHECK-NEXT: !{{[0-9]+}} = !{}
@associated.empty = external addrspace(1) constant [8 x i8], !associated !3
; CHECK: associated metadata must have a global value
; CHECK-NEXT: ptr addrspace(1) @associated.null.metadata
-; CHECK-NEXT: !4 = !{null}
+; CHECK-NEXT: !{{[0-9]+}} = !{null}
@associated.null.metadata = external addrspace(1) constant [8 x i8], !associated !4
; CHECK: global values should not associate to themselves
; CHECK-NEXT: ptr @associated.self
-; CHECK-NEXT: !5 = !{ptr @associated.self}
+; CHECK-NEXT: !{{[0-9]+}} = !{ptr @associated.self}
@associated.self = external constant [8 x i8], !associated !5
; CHECK: associated metadata must be ValueAsMetadata
; CHECK-NEXT: ptr @associated.string
-; CHECK-NEXT: !6 = !{!"string"}
+; CHECK-NEXT: !{{[0-9]+}} = !{!"string"}
@associated.string = external constant [8 x i8], !associated !6
@gv.decl0 = external constant [8 x i8]
diff --git a/llvm/test/Verifier/commandline-meta1.ll b/llvm/test/Verifier/commandline-meta1.ll
index 5c39bbdde6da4..7bcceec4e478c 100644
--- a/llvm/test/Verifier/commandline-meta1.ll
+++ b/llvm/test/Verifier/commandline-meta1.ll
@@ -7,4 +7,4 @@
!0 = !{!"string1", !"string2"}
; CHECK: assembly parsed, but does not verify as correct!
; CHECK-NEXT: incorrect number of operands in llvm.commandline metadata
-; CHECK-NEXT: !0
+; CHECK-NEXT: !{{[0-9]+}}
diff --git a/llvm/test/Verifier/dbg-orphaned-compileunit.ll b/llvm/test/Verifier/dbg-orphaned-compileunit.ll
index 9ab72824624df..4e442caa1e6e8 100644
--- a/llvm/test/Verifier/dbg-orphaned-compileunit.ll
+++ b/llvm/test/Verifier/dbg-orphaned-compileunit.ll
@@ -1,7 +1,7 @@
; RUN: not llvm-as -disable-output <%s 2>&1 | FileCheck %s
; CHECK: assembly parsed, but does not verify
; CHECK-NEXT: DICompileUnit not listed in llvm.dbg.cu
-; CHECK-NEXT: !0 = distinct !DICompileUnit(language: DW_LANG_Fortran77, file: !1, isOptimized: false, runtimeVersion: 0, emissionKind: NoDebug)
+; CHECK-NEXT: !{{[0-9]+}} = distinct !DICompileUnit(language: DW_LANG_Fortran77, file: !{{[0-9]+}}, isOptimized: false, runtimeVersion: 0, emissionKind: NoDebug)
!named = !{!1}
!llvm.module.flags = !{!0}
diff --git a/llvm/test/Verifier/di-subroutine-localvar.ll b/llvm/test/Verifier/di-subroutine-localvar.ll
index 35ba6ef42d703..33a984a238257 100644
--- a/llvm/test/Verifier/di-subroutine-localvar.ll
+++ b/llvm/test/Verifier/di-subroutine-localvar.ll
@@ -1,7 +1,7 @@
; RUN: opt %s -passes=verify 2>&1 | FileCheck %s
; CHECK: invalid type
-; CHECK: !20 = !DILocalVariable(name: "f", scope: !21, file: !13, line: 970, type: !14)
-; CHECK: !14 = !DISubroutineType(types: !15)
+; CHECK: !{{[0-9]+}} = !DILocalVariable(name: "f", scope: !{{[0-9]+}}, file: !{{[0-9]+}}, line: 970, type: !{{[0-9]+}})
+; CHECK: !{{[0-9]+}} = !DISubroutineType(types: !{{[0-9]+}})
%timespec.0.1.2.3.0.1.2 = type { i64, i64 }
diff --git a/llvm/test/Verifier/function-metadata-bad.ll b/llvm/test/Verifier/function-metadata-bad.ll
index b3bd3c27c6d49..7743f31c17341 100644
--- a/llvm/test/Verifier/function-metadata-bad.ll
+++ b/llvm/test/Verifier/function-metadata-bad.ll
@@ -7,7 +7,7 @@ define i32 @bad1() !prof !0 {
!0 = !{i32 123, i32 3}
; CHECK: assembly parsed, but does not verify as correct!
; CHECK-NEXT: expected string with name of the !prof annotation
-; CHECK-NEXT: !0 = !{i32 123, i32 3}
+; CHECK-NEXT: !{{[0-9]+}} = !{i32 123, i32 3}
define i32 @bad2() !prof !1 {
ret i32 0
@@ -15,7 +15,7 @@ define i32 @bad2() !prof !1 {
!1 = !{!"function_entry_count"}
; CHECK-NEXT: !prof annotations should have no less than 2 operands
-; CHECK-NEXT: !1 = !{!"function_entry_count"}
+; CHECK-NEXT: !{{[0-9]+}} = !{!"function_entry_count"}
define i32 @bad3() !prof !2 {
@@ -24,7 +24,7 @@ define i32 @bad3() !prof !2 {
!2 = !{!"some_other_count", i64 200}
; CHECK-NEXT: first operand should be 'function_entry_count'
-; CHECK-NEXT: !2 = !{!"some_other_count", i64 200}
+; CHECK-NEXT: !{{[0-9]+}} = !{!"some_other_count", i64 200}
define i32 @bad4() !prof !3 {
ret i32 0
@@ -32,4 +32,4 @@ define i32 @bad4() !prof !3 {
!3 = !{!"function_entry_count", !"string"}
; CHECK-NEXT: expected integer argument to function_entry_count
-; CHECK-NEXT: !3 = !{!"function_entry_count", !"string"}
+; CHECK-NEXT: !{{[0-9]+}} = !{!"function_entry_count", !"string"}
diff --git a/llvm/test/Verifier/ident-meta1.ll b/llvm/test/Verifier/ident-meta1.ll
index 3202fbd3e8f79..0ca77a6ef30e1 100644
--- a/llvm/test/Verifier/ident-meta1.ll
+++ b/llvm/test/Verifier/ident-meta1.ll
@@ -8,5 +8,5 @@
!1 = !{!"string1", !"string2"}
; CHECK: assembly parsed, but does not verify as correct!
; CHECK-NEXT: incorrect number of operands in llvm.ident metadata
-; CHECK-NEXT: !1
+; CHECK-NEXT: !{{[0-9]+}}
diff --git a/llvm/test/Verifier/llvm.loop.estimated_trip_count.ll b/llvm/test/Verifier/llvm.loop.estimated_trip_count.ll
index e0ec110efae86..aac3aa0c25ded 100644
--- a/llvm/test/Verifier/llvm.loop.estimated_trip_count.ll
+++ b/llvm/test/Verifier/llvm.loop.estimated_trip_count.ll
@@ -16,13 +16,13 @@ exit:
; GOOD-NOT: {{.}}
; BAD-VALUE: Expected second operand to be an integer constant of type i32 or smaller
-; BAD-VALUE-NEXT: !1 = !{!"llvm.loop.estimated_trip_count",
+; BAD-VALUE-NEXT: !{{[0-9]+}} = !{!"llvm.loop.estimated_trip_count",
; TOO-FEW: Expected two operands
-; TOO-FEW-NEXT: !1 = !{!"llvm.loop.estimated_trip_count"}
+; TOO-FEW-NEXT: !{{[0-9]+}} = !{!"llvm.loop.estimated_trip_count"}
; TOO-MANY: Expected two operands
-; TOO-MANY-NEXT: !1 = !{!"llvm.loop.estimated_trip_count", i32 5, i32 5}
+; TOO-MANY-NEXT: !{{[0-9]+}} = !{!"llvm.loop.estimated_trip_count", i32 5, i32 5}
; No value.
; RUN: cp %s %t
diff --git a/llvm/test/Verifier/mdcompositetype-templateparams-tuple.ll b/llvm/test/Verifier/mdcompositetype-templateparams-tuple.ll
index 8de6fac50eae5..3c88ed292b980 100644
--- a/llvm/test/Verifier/mdcompositetype-templateparams-tuple.ll
+++ b/llvm/test/Verifier/mdcompositetype-templateparams-tuple.ll
@@ -1,9 +1,9 @@
; RUN: not llvm-as < %s -disable-output 2>&1 | FileCheck %s
; CHECK: invalid template params
-; CHECK-NEXT: !2 = !DICompositeType(
-; CHECK-SAME: templateParams: !1
-; CHECK-NEXT: !1 = !DITemplateTypeParameter(
+; CHECK-NEXT: !{{[0-9]+}} = !DICompositeType(
+; CHECK-SAME: templateParams: !{{[0-9]+}}
+; CHECK-NEXT: !{{[0-9]+}} = !DITemplateTypeParameter(
!named = !{!0, !1, !2}
!0 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed)
diff --git a/llvm/test/Verifier/mdcompositetype-templateparams.ll b/llvm/test/Verifier/mdcompositetype-templateparams.ll
index 5d4bef2232fc0..6a15b32b6458d 100644
--- a/llvm/test/Verifier/mdcompositetype-templateparams.ll
+++ b/llvm/test/Verifier/mdcompositetype-templateparams.ll
@@ -1,10 +1,10 @@
; RUN: not llvm-as < %s -disable-output 2>&1 | FileCheck %s
; CHECK: invalid template parameter
-; CHECK-NEXT: !2 = !DICompositeType(
-; CHECK-SAME: templateParams: !1
-; CHECK-NEXT: !1 = !{!0}
-; CHECK-NEXT: !0 = !DIBasicType(
+; CHECK-NEXT: !{{[0-9]+}} = !DICompositeType(
+; CHECK-SAME: templateParams: !{{[0-9]+}}
+; CHECK-NEXT: !{{[0-9]+}} = !{!{{[0-9]+}}}
+; CHECK-NEXT: !{{[0-9]+}} = !DIBasicType(
!named = !{!0, !1, !2}
!0 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed)
diff --git a/llvm/test/Verifier/module-flags-cgprofile.ll b/llvm/test/Verifier/module-flags-cgprofile.ll
index 3eda5325f396e..ea90d6d066735 100644
--- a/llvm/test/Verifier/module-flags-cgprofile.ll
+++ b/llvm/test/Verifier/module-flags-cgprofile.ll
@@ -18,9 +18,9 @@ declare void @a()
; CHECK: expected a MDNode triple
; CHECK: !""
; CHECK: expected a MDNode triple
-; CHECK: !3 = !{ptr @a, ptr @b}
+; CHECK: !{{[0-9]+}} = !{ptr @a, ptr @b}
; CHECK: expected a MDNode triple
-; CHECK: !4 = !{ptr @a, ptr @b, i64 32, i64 32}
+; CHECK: !{{[0-9]+}} = !{ptr @a, ptr @b, i64 32, i64 32}
; CHECK: expected a Function or null
; CHECK: !"a"
; CHECK: expected a Function or null
diff --git a/llvm/test/Verifier/noalias-addrspace.ll b/llvm/test/Verifier/noalias-addrspace.ll
index 67a7293d2561c..f4cdf30e69e07 100644
--- a/llvm/test/Verifier/noalias-addrspace.ll
+++ b/llvm/test/Verifier/noalias-addrspace.ll
@@ -1,28 +1,28 @@
; RUN: not llvm-as < %s -o /dev/null 2>&1 | FileCheck %s
; CHECK: It should have at least one range!
-; CHECK-NEXT: !0 = !{}
+; CHECK-NEXT: !{{[0-9]+}} = !{}
define i64 @noalias_addrspace__empty(ptr %ptr, i64 %val) {
%ret = atomicrmw add ptr %ptr, i64 %val seq_cst, !noalias.addrspace !0
ret i64 %ret
}
; CHECK: Unfinished range!
-; CHECK-NEXT: !1 = !{i32 0}
+; CHECK-NEXT: !{{[0-9]+}} = !{i32 0}
define i64 @noalias_addrspace__single_field(ptr %ptr, i64 %val) {
%ret = atomicrmw add ptr %ptr, i64 %val seq_cst, !noalias.addrspace !1
ret i64 %ret
}
; CHECK: Range must not be empty!
-; CHECK-NEXT: !2 = !{i32 0, i32 0}
+; CHECK-NEXT: !{{[0-9]+}} = !{i32 0, i32 0}
define i64 @noalias_addrspace__0_0(ptr %ptr, i64 %val) {
%ret = atomicrmw add ptr %ptr, i64 %val seq_cst, !noalias.addrspace !2
ret i64 %ret
}
; CHECK: noalias.addrspace type must be i32!
-; CHECK-NEXT: %ret = atomicrmw add ptr %ptr, i64 %val seq_cst, align 8, !noalias.addrspace !3
+; CHECK-NEXT: %ret = atomicrmw add ptr %ptr, i64 %val seq_cst, align 8, !noalias.addrspace !{{[0-9]+}}
define i64 @noalias_addrspace__i64(ptr %ptr, i64 %val) {
%ret = atomicrmw add ptr %ptr, i64 %val seq_cst, !noalias.addrspace !3
ret i64 %ret
diff --git a/llvm/test/Verifier/noalias_scope_decl.ll b/llvm/test/Verifier/noalias_scope_decl.ll
index 6fbb9ffa66080..b457c5129dd57 100644
--- a/llvm/test/Verifier/noalias_scope_decl.ll
+++ b/llvm/test/Verifier/noalias_scope_decl.ll
@@ -10,7 +10,7 @@ define void @test_single_scope02() nounwind ssp {
ret void
}
; CHECK: !id.scope.list must point to a list with a single scope
-; CHECK-NEXT: tail call void @llvm.experimental.noalias.scope.decl(metadata !5)
+; CHECK-NEXT: tail call void @llvm.experimental.noalias.scope.decl(metadata !{{[0-9]+}})
define void @test_single_scope03() nounwind ssp {
tail call void @llvm.experimental.noalias.scope.decl(metadata !"test")
@@ -31,7 +31,7 @@ define void @test_dom02() nounwind ssp {
ret void
}
; CHECK-NEXT: llvm.experimental.noalias.scope.decl dominates another one with the same scope
-; CHECK-NEXT: tail call void @llvm.experimental.noalias.scope.decl(metadata !2)
+; CHECK-NEXT: tail call void @llvm.experimental.noalias.scope.decl(metadata !{{[0-9]+}})
define void @test_dom03() nounwind ssp {
tail call void @llvm.experimental.noalias.scope.decl(metadata !2)
@@ -39,7 +39,7 @@ define void @test_dom03() nounwind ssp {
ret void
}
; CHECK-NEXT: llvm.experimental.noalias.scope.decl dominates another one with the same scope
-; CHECK-NEXT: tail call void @llvm.experimental.noalias.scope.decl(metadata !2)
+; CHECK-NEXT: tail call void @llvm.experimental.noalias.scope.decl(metadata !{{[0-9]+}})
; CHECK-NOT: llvm.experimental.noalias.scope.decl
diff --git a/llvm/test/Verifier/ref.ll b/llvm/test/Verifier/ref.ll
index 58e195320583e..8dfa77aafaaa7 100644
--- a/llvm/test/Verifier/ref.ll
+++ b/llvm/test/Verifier/ref.ll
@@ -13,19 +13,19 @@
; CHECK: ref value must be pointer typed
; CHECK: ptr @a
-; CHECK: !0 = !{i32 1}
+; CHECK: !{{[0-9]+}} = !{i32 1}
; CHECK: values should not reference themselves
; CHECK: ptr @b
-; CHECK: !1 = !{ptr @b}
+; CHECK: !{{[0-9]+}} = !{ptr @b}
; CHECK: ref metadata must be ValueAsMetadata
; CHECK: ptr @c
-; CHECK: !2 = !{!"Hello World!"}
+; CHECK: !{{[0-9]+}} = !{!"Hello World!"}
; CHECK: ref metadata must have one operand
; CHECK: ptr @d
-; CHECK: !3 = !{ptr @c, ptr @a}
+; CHECK: !{{[0-9]+}} = !{ptr @c, ptr @a}
; CHECK: ref metadata must not be placed on a declaration
; CHECK: @e
diff --git a/llvm/test/Verifier/reloc-none.ll b/llvm/test/Verifier/reloc-none.ll
index 9c96799a36a36..55e60d262b5bd 100644
--- a/llvm/test/Verifier/reloc-none.ll
+++ b/llvm/test/Verifier/reloc-none.ll
@@ -1,7 +1,7 @@
; RUN: not llvm-as -disable-output 2>&1 %s | FileCheck %s
; CHECK: llvm.reloc.none argument must be a metadata string
-; CHECK-NEXT: call void @llvm.reloc.none(metadata !0)
+; CHECK-NEXT: call void @llvm.reloc.none(metadata !{{[0-9]+}})
define void @test_reloc_none_bad_arg() {
call void @llvm.reloc.none(metadata !0)
diff --git a/llvm/test/tools/llubi/metadata.ll b/llvm/test/tools/llubi/metadata.ll
index b5e5d48b6536f..71f71b0a36116 100644
--- a/llvm/test/tools/llubi/metadata.ll
+++ b/llvm/test/tools/llubi/metadata.ll
@@ -39,27 +39,27 @@ define void @main() {
; CHECK: Entering function: main
; CHECK-NEXT: %alloc = alloca i32, align 4 => ptr 0x8 [alloc]
; CHECK-NEXT: store i32 1, ptr %alloc, align 4
-; CHECK-NEXT: %range_load_valid = load i32, ptr %alloc, align 4, !range !0, !noundef !1 => i32 1
-; CHECK-NEXT: %range_load_invalid = load i32, ptr %alloc, align 4, !range !2 => poison
+; CHECK-NEXT: %range_load_valid = load i32, ptr %alloc, align 4, !range !{{[0-9]+}}, !noundef !{{[0-9]+}} => i32 1
+; CHECK-NEXT: %range_load_invalid = load i32, ptr %alloc, align 4, !range !{{[0-9]+}} => poison
; CHECK-NEXT: %alloc_vec = alloca <8 x i32>, align 32 => ptr 0x20 [alloc_vec]
; CHECK-NEXT: store <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, ptr %alloc_vec, align 32
-; CHECK-NEXT: %range_list_load_vec = load <8 x i32>, ptr %alloc_vec, align 32, !range !3 => { i32 0, i32 1, poison, i32 3, poison, i32 5, poison, i32 7 }
+; CHECK-NEXT: %range_list_load_vec = load <8 x i32>, ptr %alloc_vec, align 32, !range !{{[0-9]+}} => { i32 0, i32 1, poison, i32 3, poison, i32 5, poison, i32 7 }
; CHECK-NEXT: store float 0.000000e+00, ptr %alloc, align 4
-; CHECK-NEXT: %nofpclass_load_valid = load float, ptr %alloc, align 4, !noundef !1, !nofpclass !4 => float 0.000000e+00
-; CHECK-NEXT: %nofpclass_load_invalid = load float, ptr %alloc, align 4, !nofpclass !5 => poison
+; CHECK-NEXT: %nofpclass_load_valid = load float, ptr %alloc, align 4, !noundef !{{[0-9]+}}, !nofpclass !{{[0-9]+}} => float 0.000000e+00
+; CHECK-NEXT: %nofpclass_load_invalid = load float, ptr %alloc, align 4, !nofpclass !{{[0-9]+}} => poison
; CHECK-NEXT: %alloc_ptr = alloca ptr, align 8 => ptr 0x48 [alloc_ptr]
; CHECK-NEXT: store ptr %alloc_ptr, ptr %alloc_ptr, align 8
-; CHECK-NEXT: %align_nonnull_load_valid = load ptr, ptr %alloc_ptr, align 8, !nonnull !1, !dereferenceable !6, !dereferenceable_or_null !6, !align !6, !noundef !1 => ptr 0x48 [alloc_ptr]
+; CHECK-NEXT: %align_nonnull_load_valid = load ptr, ptr %alloc_ptr, align 8, !nonnull !{{[0-9]+}}, !dereferenceable !{{[0-9]+}}, !dereferenceable_or_null !{{[0-9]+}}, !align !{{[0-9]+}}, !noundef !{{[0-9]+}} => ptr 0x48 [alloc_ptr]
; CHECK-NEXT: store ptr null, ptr %alloc_ptr, align 8
-; CHECK-NEXT: %align_load_valid = load ptr, ptr %alloc_ptr, align 8, !dereferenceable_or_null !6, !align !6, !noundef !1 => ptr 0x0 [nullary]
-; CHECK-NEXT: %nonnull_load_invalid = load ptr, ptr %alloc_ptr, align 8, !nonnull !1 => poison
+; CHECK-NEXT: %align_load_valid = load ptr, ptr %alloc_ptr, align 8, !dereferenceable_or_null !{{[0-9]+}}, !align !{{[0-9]+}}, !noundef !{{[0-9]+}} => ptr 0x0 [nullary]
+; CHECK-NEXT: %nonnull_load_invalid = load ptr, ptr %alloc_ptr, align 8, !nonnull !{{[0-9]+}} => poison
; CHECK-NEXT: Entering function: callee
; CHECK-NEXT: ret i32 10
; CHECK-NEXT: Exiting function: callee
-; CHECK-NEXT: %range_call_valid = call i32 @callee(), !range !7 => i32 10
+; CHECK-NEXT: %range_call_valid = call i32 @callee(), !range !{{[0-9]+}} => i32 10
; CHECK-NEXT: Entering function: callee
; CHECK-NEXT: ret i32 10
; CHECK-NEXT: Exiting function: callee
-; CHECK-NEXT: %range_call_invalid = call i32 @callee(), !range !0 => poison
+; CHECK-NEXT: %range_call_invalid = call i32 @callee(), !range !{{[0-9]+}} => poison
; CHECK-NEXT: ret void
; CHECK-NEXT: Exiting function: main
diff --git a/llvm/test/tools/llubi/metadata_noundef_ub.ll b/llvm/test/tools/llubi/metadata_noundef_ub.ll
index d18d6b20c20dc..1a2b71346ceec 100644
--- a/llvm/test/tools/llubi/metadata_noundef_ub.ll
+++ b/llvm/test/tools/llubi/metadata_noundef_ub.ll
@@ -11,6 +11,6 @@ define void @main() {
; CHECK-NEXT: %alloc = alloca i32, align 4 => ptr 0x8 [alloc]
; CHECK-NEXT: store i32 -1, ptr %alloc, align 4
; CHECK-NEXT: Stacktrace:
-; CHECK-NEXT: #0 %res = load i32, ptr %alloc, align 4, !range !0, !noundef !1 at @main <stdin>:7
+; CHECK-NEXT: #0 %res = load i32, ptr %alloc, align 4, !range !{{[0-9]+}}, !noundef !{{[0-9]+}} at @main <stdin>:7
; CHECK-NEXT: Immediate UB detected: The value poison violates !noundef metadata.
; CHECK-NEXT: error: Execution of function 'main' failed.
diff --git a/llvm/test/tools/llubi/noalias_scope.ll b/llvm/test/tools/llubi/noalias_scope.ll
index c04b89df37b8a..1cd764b957d25 100644
--- a/llvm/test/tools/llubi/noalias_scope.ll
+++ b/llvm/test/tools/llubi/noalias_scope.ll
@@ -11,6 +11,6 @@ entry:
!1 = distinct !{!1, !2, !"func: %agg.result"}
!2 = distinct !{!2, !"func"}
; CHECK: Entering function: main
-; CHECK-NEXT: tail call void @llvm.experimental.noalias.scope.decl(metadata !0)
+; CHECK-NEXT: tail call void @llvm.experimental.noalias.scope.decl(metadata !{{[0-9]+}})
; CHECK-NEXT: ret void
; CHECK-NEXT: Exiting function: main
>From 2d848724753067f17f782e8e7f10a84390218a25 Mon Sep 17 00:00:00 2001
From: "Yaxun (Sam) Liu" <yaxun.liu at amd.com>
Date: Fri, 28 Aug 2026 15:51:01 -0400
Subject: [PATCH 2/3] [MIR] Round-trip all machine metadata nodes
Collect metadata referenced by machine instructions, memory operands, debug locations, and variable debug information so MIR emits definitions instead of pointer-form operands. Parse the machine metadata block with the LLVM IR metadata parser to support specialized nodes and forward references, and remove the obsolete tuple-only parser.
---
llvm/include/llvm/AsmParser/LLParser.h | 2 +
llvm/include/llvm/AsmParser/Parser.h | 6 +
.../include/llvm/CodeGen/MIRParser/MIParser.h | 5 -
llvm/lib/AsmParser/LLParser.cpp | 26 +++
llvm/lib/AsmParser/Parser.cpp | 10 ++
llvm/lib/CodeGen/MIRParser/MIParser.cpp | 153 ------------------
llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 46 +++---
llvm/lib/CodeGen/MachineModuleSlotTracker.cpp | 33 +++-
.../GlobalISel/constant-mir-debugify.mir | 22 +--
...lize-load-store-vector-of-ptr-debugloc.mir | 9 +-
.../legalize-memcpy-with-debug-info.mir | 16 +-
.../legalize-shift-imm-promote-dloc.mir | 7 +-
.../AArch64/GlobalISel/legalize-vaarg.mir | 22 +--
.../localizer-propagate-debug-loc.mir | 34 ++--
.../AArch64/GlobalISel/phi-mir-debugify.mir | 60 +++----
.../GlobalISel/salvage-debug-info-dead.mir | 15 +-
.../GlobalISel/store-merging-debug.mir | 32 ++--
.../AArch64/tail-duplicate-debug-variance.mir | 6 +-
.../GlobalISel/irtranslator-metadata.ll | 2 +-
.../AMDGPU/dbg-value-ends-sched-region.mir | 2 +-
.../AMDGPU/rewrite-partial-reg-uses-dbg.mir | 26 +--
...ip-processing-stack-arg-dbg-value-list.mir | 6 +-
...ip-processing-stack-arg-dbg-value-list.mir | 6 +-
.../MIRDebugify/locations-and-values.mir | 12 +-
.../dont-strip-real-debug-info.mir | 4 +-
.../CodeGen/Hexagon/packetize-debug-loc.mir | 7 +-
.../MIR/Generic/machine-metadata-err0.mir | 2 +-
.../MIR/Generic/machine-metadata-err1.mir | 2 +-
.../MIR/Generic/machine-metadata-err2.mir | 2 +-
.../MIR/Generic/machine-metadata-err6.mir | 2 +-
.../MIR/Generic/machine-metadata-err7.mir | 2 +-
.../MIR/Generic/machine-metadata-err8.mir | 2 +-
.../MIR/X86/instructions-debug-location.mir | 17 +-
.../MIR/X86/machine-metadata-round-trip.mir | 35 ++++
.../MIR/X86/machine-metadata-specialized.mir | 40 +++++
.../LowOverheadLoops/vpt-block-debug.mir | 16 +-
.../test/CodeGen/X86/machine-sink-dbg-loc.mir | 6 +-
.../X86/win64-eh-unwindv2-too-many-instr.mir | 6 +-
.../AArch64/merge-locations-legalizer.mir | 5 +-
llvm/test/DebugInfo/Hexagon/packet-debug.mir | 8 +-
.../DebugInfo/KeyInstructions/X86/parse.mir | 4 +-
.../InstrRef/undef-phi-through-regalloc.mir | 2 +-
.../DebugInfo/MIR/X86/merge-inline-loc1.mir | 5 +-
.../DebugInfo/MIR/X86/merge-inline-loc2.mir | 5 +-
.../DebugInfo/MIR/X86/merge-inline-loc3.mir | 4 +-
.../DebugInfo/MIR/X86/merge-inline-loc4.mir | 4 +-
.../WebAssembly/dbg-loc-reg-stackify.mir | 20 ++-
.../X86/branch-folder-dbg-after-end.mir | 3 +-
llvm/test/DebugInfo/X86/branch-folder-dbg.mir | 4 +-
49 files changed, 419 insertions(+), 346 deletions(-)
create mode 100644 llvm/test/CodeGen/MIR/X86/machine-metadata-round-trip.mir
create mode 100644 llvm/test/CodeGen/MIR/X86/machine-metadata-specialized.mir
diff --git a/llvm/include/llvm/AsmParser/LLParser.h b/llvm/include/llvm/AsmParser/LLParser.h
index 788b56cb78f08..586016508e044 100644
--- a/llvm/include/llvm/AsmParser/LLParser.h
+++ b/llvm/include/llvm/AsmParser/LLParser.h
@@ -235,6 +235,8 @@ namespace llvm {
unsigned &Read,
const SlotMapping *Slots);
+ LLVM_ABI bool parseMetadataDefinitions(SlotMapping &Slots);
+
LLVMContext &getContext() { return Context; }
private:
diff --git a/llvm/include/llvm/AsmParser/Parser.h b/llvm/include/llvm/AsmParser/Parser.h
index 22b0881d92b53..2908323336e1d 100644
--- a/llvm/include/llvm/AsmParser/Parser.h
+++ b/llvm/include/llvm/AsmParser/Parser.h
@@ -211,6 +211,12 @@ parseDIExpressionBodyAtBeginning(StringRef Asm, unsigned &Read,
SMDiagnostic &Err, const Module &M,
const SlotMapping *Slots);
+/// Parse a sequence of standalone metadata definitions using and updating the
+/// supplied slot mapping.
+/// \return true on error.
+LLVM_ABI bool parseMetadataDefinitions(StringRef Asm, SMDiagnostic &Err,
+ const Module &M, SlotMapping &Slots);
+
} // End llvm namespace
#endif
diff --git a/llvm/include/llvm/CodeGen/MIRParser/MIParser.h b/llvm/include/llvm/CodeGen/MIRParser/MIParser.h
index 622862279cfdd..1c30ad02e1705 100644
--- a/llvm/include/llvm/CodeGen/MIRParser/MIParser.h
+++ b/llvm/include/llvm/CodeGen/MIRParser/MIParser.h
@@ -173,7 +173,6 @@ struct PerFunctionMIParsingState {
PerTargetMIParsingState &Target;
std::map<unsigned, TrackingMDNodeRef> MachineMetadataNodes;
- std::map<unsigned, std::pair<TempMDTuple, SMLoc>> MachineForwardRefMDNodes;
DenseMap<unsigned, MachineBasicBlock *> MBBSlots;
DenseMap<Register, VRegInfo *> VRegInfos;
@@ -249,10 +248,6 @@ LLVM_ABI bool parsePrefetchTarget(PerFunctionMIParsingState &PFS,
LLVM_ABI bool parseMDNode(PerFunctionMIParsingState &PFS, MDNode *&Node,
StringRef Src, SMDiagnostic &Error);
-LLVM_ABI bool parseMachineMetadata(PerFunctionMIParsingState &PFS,
- StringRef Src, SMRange SourceRange,
- SMDiagnostic &Error);
-
} // end namespace llvm
#endif // LLVM_CODEGEN_MIRPARSER_MIPARSER_H
diff --git a/llvm/lib/AsmParser/LLParser.cpp b/llvm/lib/AsmParser/LLParser.cpp
index fa7f2af27cc91..0ff0d159932e1 100644
--- a/llvm/lib/AsmParser/LLParser.cpp
+++ b/llvm/lib/AsmParser/LLParser.cpp
@@ -136,6 +136,32 @@ bool LLParser::parseDIExpressionBodyAtBeginning(MDNode *&Result, unsigned &Read,
return Status;
}
+bool LLParser::parseMetadataDefinitions(SlotMapping &Slots) {
+ restoreParsingState(&Slots);
+ Lex.Lex();
+
+ while (Lex.getKind() != lltok::Eof) {
+ if (Lex.getKind() != lltok::exclaim)
+ return tokError("expected a metadata definition");
+ if (parseStandaloneMetadata())
+ return true;
+ }
+
+ if (!ForwardRefMDNodes.empty())
+ return error(ForwardRefMDNodes.begin()->second.second,
+ "use of undefined metadata '!" +
+ Twine(ForwardRefMDNodes.begin()->first) + "'");
+
+ for (auto &[_, MD] : NumberedMetadata)
+ if (MD && !MD->isResolved())
+ MD->resolveCycles();
+ DISubprogram::cleanupRetainedNodes(NewDistinctSPs);
+ NewDistinctSPs.clear();
+
+ Slots.MetadataNodes = std::move(NumberedMetadata);
+ return false;
+}
+
void LLParser::restoreParsingState(const SlotMapping *Slots) {
if (!Slots)
return;
diff --git a/llvm/lib/AsmParser/Parser.cpp b/llvm/lib/AsmParser/Parser.cpp
index f33a9dad2bb06..a0209b164ef1b 100644
--- a/llvm/lib/AsmParser/Parser.cpp
+++ b/llvm/lib/AsmParser/Parser.cpp
@@ -247,3 +247,13 @@ DIExpression *llvm::parseDIExpressionBodyAtBeginning(StringRef Asm,
return nullptr;
return dyn_cast<DIExpression>(MD);
}
+
+bool llvm::parseMetadataDefinitions(StringRef Asm, SMDiagnostic &Err,
+ const Module &M, SlotMapping &Slots) {
+ SourceMgr SM;
+ std::unique_ptr<MemoryBuffer> Buf = MemoryBuffer::getMemBuffer(Asm);
+ SM.AddNewSourceBuffer(std::move(Buf), SMLoc());
+ return LLParser(Asm, SM, Err, const_cast<Module *>(&M), nullptr,
+ M.getContext())
+ .parseMetadataDefinitions(Slots);
+}
diff --git a/llvm/lib/CodeGen/MIRParser/MIParser.cpp b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
index bb0b87cc042d0..a9caf95a32ef9 100644
--- a/llvm/lib/CodeGen/MIRParser/MIParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
@@ -401,7 +401,6 @@ class MIParser {
MachineFunction &MF;
SMDiagnostic &Error;
StringRef Source, CurrentSource;
- SMRange SourceRange;
MIToken Token;
PerFunctionMIParsingState &PFS;
/// Maps from slot numbers to function's unnamed basic blocks.
@@ -410,8 +409,6 @@ class MIParser {
public:
MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &Error,
StringRef Source);
- MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &Error,
- StringRef Source, SMRange SourceRange);
/// \p SkipChar gives the number of characters to skip before looking
/// for the next token.
@@ -437,10 +434,6 @@ class MIParser {
bool parseStandaloneRegister(Register &Reg);
bool parseStandaloneStackObject(int &FI);
bool parseStandaloneMDNode(MDNode *&Node);
- bool parseMachineMetadata();
- bool parseMDTuple(MDNode *&MD, bool IsDistinct);
- bool parseMDNodeVector(SmallVectorImpl<Metadata *> &Elts);
- bool parseMetadata(Metadata *&MD);
bool
parseBasicBlockDefinition(DenseMap<unsigned, MachineBasicBlock *> &MBBSlots);
@@ -574,10 +567,6 @@ class MIParser {
/// parseStringConstant
/// ::= StringConstant
bool parseStringConstant(std::string &Result);
-
- /// Map the location in the MI string to the corresponding location specified
- /// in `SourceRange`.
- SMLoc mapSMLoc(StringRef::iterator Loc);
};
} // end anonymous namespace
@@ -587,11 +576,6 @@ MIParser::MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &Error,
: MF(PFS.MF), Error(Error), Source(Source), CurrentSource(Source), PFS(PFS)
{}
-MIParser::MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &Error,
- StringRef Source, SMRange SourceRange)
- : MF(PFS.MF), Error(Error), Source(Source), CurrentSource(Source),
- SourceRange(SourceRange), PFS(PFS) {}
-
void MIParser::lex(unsigned SkipChar) {
CurrentSource = lexMIToken(
CurrentSource.substr(SkipChar), Token,
@@ -617,13 +601,6 @@ bool MIParser::error(StringRef::iterator Loc, const Twine &Msg) {
return true;
}
-SMLoc MIParser::mapSMLoc(StringRef::iterator Loc) {
- assert(SourceRange.isValid() && "Invalid source range");
- assert(Loc >= Source.data() && Loc <= (Source.data() + Source.size()));
- return SMLoc::getFromPointer(SourceRange.Start.getPointer() +
- (Loc - Source.data()));
-}
-
typedef function_ref<bool(StringRef::iterator Loc, const Twine &)>
ErrorCallbackType;
@@ -1341,131 +1318,6 @@ bool MIParser::parseStandaloneMDNode(MDNode *&Node) {
return false;
}
-bool MIParser::parseMachineMetadata() {
- lex();
- if (Token.isNot(MIToken::exclaim))
- return error("expected a metadata node");
-
- lex();
- if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
- return error("expected metadata id after '!'");
- unsigned ID = 0;
- if (getUnsigned(ID))
- return true;
- lex();
- if (expectAndConsume(MIToken::equal))
- return true;
- bool IsDistinct = Token.is(MIToken::kw_distinct);
- if (IsDistinct)
- lex();
- if (Token.isNot(MIToken::exclaim))
- return error("expected a metadata node");
- lex();
-
- MDNode *MD;
- if (parseMDTuple(MD, IsDistinct))
- return true;
-
- auto FI = PFS.MachineForwardRefMDNodes.find(ID);
- if (FI != PFS.MachineForwardRefMDNodes.end()) {
- FI->second.first->replaceAllUsesWith(MD);
- PFS.MachineForwardRefMDNodes.erase(FI);
-
- assert(PFS.MachineMetadataNodes[ID] == MD && "Tracking VH didn't work");
- } else {
- auto [It, Inserted] = PFS.MachineMetadataNodes.try_emplace(ID);
- if (!Inserted)
- return error("Metadata id is already used");
- It->second.reset(MD);
- }
-
- return false;
-}
-
-bool MIParser::parseMDTuple(MDNode *&MD, bool IsDistinct) {
- SmallVector<Metadata *, 16> Elts;
- if (parseMDNodeVector(Elts))
- return true;
- MD = (IsDistinct ? MDTuple::getDistinct
- : MDTuple::get)(MF.getFunction().getContext(), Elts);
- return false;
-}
-
-bool MIParser::parseMDNodeVector(SmallVectorImpl<Metadata *> &Elts) {
- if (Token.isNot(MIToken::lbrace))
- return error("expected '{' here");
- lex();
-
- if (Token.is(MIToken::rbrace)) {
- lex();
- return false;
- }
-
- do {
- Metadata *MD;
- if (parseMetadata(MD))
- return true;
-
- Elts.push_back(MD);
-
- if (Token.isNot(MIToken::comma))
- break;
- lex();
- } while (true);
-
- if (Token.isNot(MIToken::rbrace))
- return error("expected end of metadata node");
- lex();
-
- return false;
-}
-
-// ::= !42
-// ::= !"string"
-bool MIParser::parseMetadata(Metadata *&MD) {
- if (Token.isNot(MIToken::exclaim))
- return error("expected '!' here");
- lex();
-
- if (Token.is(MIToken::StringConstant)) {
- std::string Str;
- if (parseStringConstant(Str))
- return true;
- MD = MDString::get(MF.getFunction().getContext(), Str);
- return false;
- }
-
- if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
- return error("expected metadata id after '!'");
-
- SMLoc Loc = mapSMLoc(Token.location());
-
- unsigned ID = 0;
- if (getUnsigned(ID))
- return true;
- lex();
-
- auto NodeInfo = PFS.IRSlots.MetadataNodes.find(ID);
- if (NodeInfo != PFS.IRSlots.MetadataNodes.end()) {
- MD = NodeInfo->second.get();
- return false;
- }
- // Check machine metadata.
- NodeInfo = PFS.MachineMetadataNodes.find(ID);
- if (NodeInfo != PFS.MachineMetadataNodes.end()) {
- MD = NodeInfo->second.get();
- return false;
- }
- // Forward reference.
- auto &FwdRef = PFS.MachineForwardRefMDNodes[ID];
- FwdRef = std::make_pair(
- MDTuple::getTemporary(MF.getFunction().getContext(), {}), Loc);
- PFS.MachineMetadataNodes[ID].reset(FwdRef.first.get());
- MD = FwdRef.first.get();
-
- return false;
-}
-
static const char *printImplicitRegisterFlag(const MachineOperand &MO) {
assert(MO.isImplicit());
return MO.isDef() ? "implicit-def" : "implicit";
@@ -4060,11 +3912,6 @@ bool llvm::parseMDNode(PerFunctionMIParsingState &PFS, MDNode *&Node,
return MIParser(PFS, Error, Src).parseStandaloneMDNode(Node);
}
-bool llvm::parseMachineMetadata(PerFunctionMIParsingState &PFS, StringRef Src,
- SMRange SrcRange, SMDiagnostic &Error) {
- return MIParser(PFS, Error, Src, SrcRange).parseMachineMetadata();
-}
-
bool MIRFormatter::parseIRValue(StringRef Src, MachineFunction &MF,
PerFunctionMIParsingState &PFS, const Value *&V,
ErrorCallbackType ErrorCallback) {
diff --git a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
index 6f1e7594f34da..966479b93179f 100644
--- a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
@@ -178,9 +178,6 @@ class MIRParserImpl {
MachineBasicBlock *&MBB,
const yaml::StringValue &Source);
- bool parseMachineMetadata(PerFunctionMIParsingState &PFS,
- const yaml::StringValue &Source);
-
/// Return a MIR diagnostic converted from an MI string diagnostic.
SMDiagnostic diagFromMIStringDiag(const SMDiagnostic &Error,
SMRange SourceRange);
@@ -1226,26 +1223,39 @@ bool MIRParserImpl::parseMBBReference(PerFunctionMIParsingState &PFS,
return false;
}
-bool MIRParserImpl::parseMachineMetadata(PerFunctionMIParsingState &PFS,
- const yaml::StringValue &Source) {
- SMDiagnostic Error;
- if (llvm::parseMachineMetadata(PFS, Source.Value, Source.SourceRange, Error))
- return error(Error, Source.SourceRange);
- return false;
-}
-
bool MIRParserImpl::parseMachineMetadataNodes(
PerFunctionMIParsingState &PFS, MachineFunction &MF,
const yaml::MachineFunction &YMF) {
+ // Parse the definitions as one LLVM metadata block so specialized nodes and
+ // forward references use the same rules as metadata in the IR module.
+ std::string Definitions;
for (const auto &MDS : YMF.MachineMetadataNodes) {
- if (parseMachineMetadata(PFS, MDS))
- return true;
+ Definitions.append(MDS.Value);
+ Definitions.push_back('\n');
}
- // Report missing definitions from forward referenced nodes.
- if (!PFS.MachineForwardRefMDNodes.empty())
- return error(PFS.MachineForwardRefMDNodes.begin()->second.second,
- "use of undefined metadata '!" +
- Twine(PFS.MachineForwardRefMDNodes.begin()->first) + "'");
+
+ SlotMapping Slots = PFS.IRSlots;
+ SMDiagnostic Error;
+ if (parseMetadataDefinitions(Definitions, Error,
+ *MF.getFunction().getParent(), Slots)) {
+ unsigned Line = std::max(Error.getLineNo(), 1);
+ unsigned Index =
+ std::min<unsigned>(Line - 1, YMF.MachineMetadataNodes.size() - 1);
+ const yaml::StringValue &Source = YMF.MachineMetadataNodes[Index];
+ if (Line > YMF.MachineMetadataNodes.size()) {
+ const char *Start = Source.SourceRange.Start.getPointer();
+ const char *End = Source.SourceRange.End.getPointer();
+ SMLoc Loc = Source.SourceRange.End;
+ if (Start < End && (*Start == '\'' || *Start == '"'))
+ Loc = SMLoc::getFromPointer(End - 1);
+ return error(Loc, Error.getMessage());
+ }
+ return error(Error, Source.SourceRange);
+ }
+
+ for (auto &[ID, MD] : Slots.MetadataNodes)
+ if (PFS.IRSlots.MetadataNodes.find(ID) == PFS.IRSlots.MetadataNodes.end())
+ PFS.MachineMetadataNodes.try_emplace(ID, MD);
return false;
}
diff --git a/llvm/lib/CodeGen/MachineModuleSlotTracker.cpp b/llvm/lib/CodeGen/MachineModuleSlotTracker.cpp
index 5250330e170c2..b95289f3304ad 100644
--- a/llvm/lib/CodeGen/MachineModuleSlotTracker.cpp
+++ b/llvm/lib/CodeGen/MachineModuleSlotTracker.cpp
@@ -8,7 +8,10 @@
#include "llvm/CodeGen/MachineModuleSlotTracker.h"
#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
+#include "llvm/CodeGen/MachineOperand.h"
+#include "llvm/IR/DebugInfoMetadata.h"
#include "llvm/IR/Module.h"
using namespace llvm;
@@ -17,7 +20,21 @@ void MachineModuleSlotTracker::processMachineFunctionMetadata(
AbstractSlotTrackerStorage *AST, const MachineFunction &MF) {
// Create metadata created within the backend.
for (const MachineBasicBlock &MBB : MF)
- for (const MachineInstr &MI : MBB.instrs())
+ for (const MachineInstr &MI : MBB.instrs()) {
+ if (DebugLoc DL = MI.getDebugLoc())
+ AST->createMetadataSlot(DL.getAsMDNode());
+
+ if (MDNode *N = MI.getHeapAllocMarker())
+ AST->createMetadataSlot(N);
+ if (MDNode *N = MI.getPCSections())
+ AST->createMetadataSlot(N);
+ if (MDNode *N = MI.getMMRAMetadata())
+ AST->createMetadataSlot(N);
+
+ for (const MachineOperand &MO : MI.operands())
+ if (MO.isMetadata())
+ AST->createMetadataSlot(MO.getMetadata());
+
for (const MachineMemOperand *MMO : MI.memoperands()) {
AAMDNodes AAInfo = MMO->getAAInfo();
if (AAInfo.TBAA)
@@ -28,7 +45,21 @@ void MachineModuleSlotTracker::processMachineFunctionMetadata(
AST->createMetadataSlot(AAInfo.Scope);
if (AAInfo.NoAlias)
AST->createMetadataSlot(AAInfo.NoAlias);
+ if (AAInfo.NoAliasAddrSpace)
+ AST->createMetadataSlot(AAInfo.NoAliasAddrSpace);
+ if (const MDNode *N = MMO->getRanges())
+ AST->createMetadataSlot(N);
+ if (const MDNode *N = MMO->getMemCacheHint())
+ AST->createMetadataSlot(N);
}
+ }
+
+ for (const MachineFunction::VariableDbgInfo &DebugVar :
+ MF.getVariableDbgInfo()) {
+ AST->createMetadataSlot(DebugVar.Var);
+ AST->createMetadataSlot(DebugVar.Expr);
+ AST->createMetadataSlot(DebugVar.Loc);
+ }
}
void MachineModuleSlotTracker::processMachineModule(
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/constant-mir-debugify.mir b/llvm/test/CodeGen/AArch64/GlobalISel/constant-mir-debugify.mir
index a6c26be283ec7..a1a27f9014863 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/constant-mir-debugify.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/constant-mir-debugify.mir
@@ -16,17 +16,17 @@ body: |
; CHECK-LABEL: name: fconstant_to_constant_s32
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0, debug-location !11
- ; CHECK-NEXT: DBG_VALUE [[COPY]](p0), $noreg, !9, !DIExpression(), debug-location !11
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(f32) = G_FCONSTANT float 5.000000e-02, debug-location !DILocation(line: 2, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE [[C]](f32), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 2, column: 1, scope: !5)
- ; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 524, debug-location !DILocation(line: 3, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE [[C1]](i64), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 3, column: 1, scope: !5)
- ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C1]](i64), debug-location !DILocation(line: 4, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE [[PTR_ADD]](p0), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 4, column: 1, scope: !5)
- ; CHECK-NEXT: G_STORE [[C]](f32), [[PTR_ADD]](p0), debug-location !DILocation(line: 5, column: 1, scope: !5) :: (store (s32))
- ; CHECK-NEXT: DBG_VALUE 0, $noreg, !9, !DIExpression(), debug-location !DILocation(line: 5, column: 1, scope: !5)
- ; CHECK-NEXT: RET_ReallyLR debug-location !DILocation(line: 6, column: 1, scope: !5)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0, debug-location !11
+ ; CHECK-NEXT: DBG_VALUE [[COPY]](p0), $noreg, !9, !DIExpression(), debug-location !11
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(f32) = G_FCONSTANT float 5.000000e-02, debug-location !12
+ ; CHECK-NEXT: DBG_VALUE [[C]](f32), $noreg, !9, !DIExpression(), debug-location !12
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 524, debug-location !13
+ ; CHECK-NEXT: DBG_VALUE [[C1]](i64), $noreg, !9, !DIExpression(), debug-location !13
+ ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C1]](i64), debug-location !14
+ ; CHECK-NEXT: DBG_VALUE [[PTR_ADD]](p0), $noreg, !9, !DIExpression(), debug-location !14
+ ; CHECK-NEXT: G_STORE [[C]](f32), [[PTR_ADD]](p0), debug-location !15 :: (store (s32))
+ ; CHECK-NEXT: DBG_VALUE 0, $noreg, !9, !DIExpression(), debug-location !15
+ ; CHECK-NEXT: RET_ReallyLR debug-location !16
%0:_(p0) = COPY $x0
%3:_(f32) = G_FCONSTANT float 0x3FA99999A0000000
%1:_(i64) = G_CONSTANT i64 524
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-vector-of-ptr-debugloc.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-vector-of-ptr-debugloc.mir
index 4414a386d6a40..ed7378e1be896 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-vector-of-ptr-debugloc.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-vector-of-ptr-debugloc.mir
@@ -38,12 +38,15 @@ body: |
liveins: $q0, $x0
; CHECK-LABEL: name: test_debugloc
+ ; CHECK: machineMetadataNodes:
+ ; CHECK-DAG: - '[[STORE_LOC:![0-9]+]] = !DILocation(line: 4, column: 3
+ ; CHECK-DAG: - '[[RET_LOC:![0-9]+]] = !DILocation(line: 5, column: 1
; CHECK: liveins: $q0, $x0
; CHECK: [[COPY:%[0-9]+]]:_(<2 x p0>) = COPY $q0
; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK: [[BITCAST:%[0-9]+]]:_(<2 x i64>) = G_BITCAST [[COPY]](<2 x p0>), debug-location !DILocation(line: 4, column: 3
- ; CHECK: G_STORE [[BITCAST]](<2 x i64>), [[COPY1]](p0), debug-location !DILocation(line: 4, column: 3
- ; CHECK: RET_ReallyLR debug-location !DILocation(line: 5, column: 1
+ ; CHECK: [[BITCAST:%[0-9]+]]:_(<2 x i64>) = G_BITCAST [[COPY]](<2 x p0>), debug-location [[STORE_LOC]]
+ ; CHECK: G_STORE [[BITCAST]](<2 x i64>), [[COPY1]](p0), debug-location [[STORE_LOC]]
+ ; CHECK: RET_ReallyLR debug-location [[RET_LOC]]
%0:_(<2 x p0>) = COPY $q0
%1:_(p0) = COPY $x0
G_STORE %0(<2 x p0>), %1(p0), debug-location !11 :: (store (<2 x p0>))
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-with-debug-info.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-with-debug-info.mir
index b789fa22b0034..20d07b320452b 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-with-debug-info.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-with-debug-info.mir
@@ -41,14 +41,14 @@ body: |
; CHECK-LABEL: name: test_memcpy_tail
; CHECK: liveins: $w2, $x0, $x1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0, debug-location !10
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1, debug-location !DILocation(line: 3, column: 1, scope: !5)
- ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(i32) = COPY $w2, debug-location !DILocation(line: 4, column: 1, scope: !5)
- ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(i64) = G_ZEXT [[COPY2]](i32), debug-location !DILocation(line: 5, column: 1, scope: !5)
- ; CHECK-NEXT: $x0 = COPY [[COPY]](p0), debug-location !DILocation(line: 6, column: 1, scope: !5)
- ; CHECK-NEXT: $x1 = COPY [[COPY1]](p0), debug-location !DILocation(line: 6, column: 1, scope: !5)
- ; CHECK-NEXT: $x2 = COPY [[ZEXT]](i64), debug-location !DILocation(line: 6, column: 1, scope: !5)
- ; CHECK-NEXT: TCRETURNdi &memcpy, 0, csr_aarch64_aapcs, implicit $sp, implicit $x0, implicit $x1, implicit $x2, debug-location !DILocation(line: 6, column: 1, scope: !5)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0, debug-location !10
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1, debug-location !11
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(i32) = COPY $w2, debug-location !12
+ ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(i64) = G_ZEXT [[COPY2]](i32), debug-location !13
+ ; CHECK-NEXT: $x0 = COPY [[COPY]](p0), debug-location !14
+ ; CHECK-NEXT: $x1 = COPY [[COPY1]](p0), debug-location !14
+ ; CHECK-NEXT: $x2 = COPY [[ZEXT]](i64), debug-location !14
+ ; CHECK-NEXT: TCRETURNdi &memcpy, 0, csr_aarch64_aapcs, implicit $sp, implicit $x0, implicit $x1, implicit $x2, debug-location !14
%0:_(p0) = COPY $x0, debug-location !14
%1:_(p0) = COPY $x1, debug-location !DILocation(line: 3, column: 1, scope: !11)
%2:_(i32) = COPY $w2, debug-location !DILocation(line: 4, column: 1, scope: !11)
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift-imm-promote-dloc.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift-imm-promote-dloc.mir
index 28c0cee67e9f3..c942a8590b4d0 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift-imm-promote-dloc.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift-imm-promote-dloc.mir
@@ -41,13 +41,16 @@ body: |
; Check that the G_LSHR has the right debug loc. This should also check that the G_ZEXT of the constant
; also has the right DL too, but it gets optimized away.
; CHECK-LABEL: name: test_shl_imm_promote_debug
+ ; CHECK: machineMetadataNodes:
+ ; CHECK-DAG: - '[[SHIFT_LOC:![0-9]+]] = !DILocation(line: 4, column: 3
+ ; CHECK-DAG: - '[[RET_LOC:![0-9]+]] = !DILocation(line: 5, column: 1
; CHECK: liveins: $w0, $w1
; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK: [[COPY1:%[0-9]+]]:_(i32) = COPY $w1
; CHECK: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 8
- ; CHECK: [[LSHR:%[0-9]+]]:_(i32) = G_LSHR [[COPY1]], [[C]](i64), debug-location !DILocation(line: 4, column: 3
+ ; CHECK: [[LSHR:%[0-9]+]]:_(i32) = G_LSHR [[COPY1]], [[C]](i64), debug-location [[SHIFT_LOC]]
; CHECK: $w0 = COPY [[LSHR]](i32)
- ; CHECK: RET_ReallyLR debug-location !DILocation(line: 5, column: 1
+ ; CHECK: RET_ReallyLR debug-location [[RET_LOC]]
%0:_(p0) = COPY $x0
%1:_(i32) = COPY $w1
%2:_(i32) = G_CONSTANT i32 8
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-vaarg.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-vaarg.mir
index 83736fe8e3604..a0cf22ece9ddb 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-vaarg.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-vaarg.mir
@@ -33,20 +33,20 @@ body: |
bb.0:
; CHECK-LABEL: name: test_vaarg
; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(p0) = G_LOAD [[COPY]](p0), debug-location !DILocation(line: 4, column: 3, scope: {{.*}}) :: (load (p0))
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(p0) = G_LOAD [[COPY]](p0), debug-location !8 :: (load (p0))
; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 8
- ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[LOAD]], [[C]](i64), debug-location !DILocation(line: 4, column: 3, scope: {{.*}})
- ; CHECK-NEXT: G_STORE [[PTR_ADD]](p0), [[COPY]](p0), debug-location !DILocation(line: 4, column: 3, scope: {{.*}}) :: (store (p0))
- ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(p0) = G_LOAD [[COPY]](p0), debug-location !DILocation(line: 5, column: 1, scope: {{.*}}) :: (load (p0))
- ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[LOAD1]], [[C]](i64), debug-location !DILocation(line: 5, column: 1, scope: {{.*}})
- ; CHECK-NEXT: G_STORE [[PTR_ADD1]](p0), [[COPY]](p0), debug-location !DILocation(line: 5, column: 1, scope: {{.*}}) :: (store (p0))
- ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(p0) = G_LOAD [[COPY]](p0), debug-location !DILocation(line: 4, column: 3, scope: {{.*}}) :: (load (p0))
+ ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[LOAD]], [[C]](i64), debug-location !8
+ ; CHECK-NEXT: G_STORE [[PTR_ADD]](p0), [[COPY]](p0), debug-location !8 :: (store (p0))
+ ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(p0) = G_LOAD [[COPY]](p0), debug-location !12 :: (load (p0))
+ ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[LOAD1]], [[C]](i64), debug-location !12
+ ; CHECK-NEXT: G_STORE [[PTR_ADD1]](p0), [[COPY]](p0), debug-location !12 :: (store (p0))
+ ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(p0) = G_LOAD [[COPY]](p0), debug-location !8 :: (load (p0))
; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 15
- ; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD [[LOAD2]], [[C1]](i64), debug-location !DILocation(line: 4, column: 3, scope: {{.*}})
+ ; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD [[LOAD2]], [[C1]](i64), debug-location !8
; CHECK-NEXT: [[C2:%[0-9]+]]:_(i64) = G_CONSTANT i64 -16
- ; CHECK-NEXT: [[PTRMASK:%[0-9]+]]:_(p0) = G_PTRMASK [[PTR_ADD2]], [[C2]](i64), debug-location !DILocation(line: 4, column: 3, scope: {{.*}})
- ; CHECK-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTRMASK]], [[C]](i64), debug-location !DILocation(line: 4, column: 3, scope: {{.*}})
- ; CHECK-NEXT: G_STORE [[PTR_ADD3]](p0), [[COPY]](p0), debug-location !DILocation(line: 4, column: 3, scope: {{.*}}) :: (store (p0))
+ ; CHECK-NEXT: [[PTRMASK:%[0-9]+]]:_(p0) = G_PTRMASK [[PTR_ADD2]], [[C2]](i64), debug-location !8
+ ; CHECK-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTRMASK]], [[C]](i64), debug-location !8
+ ; CHECK-NEXT: G_STORE [[PTR_ADD3]](p0), [[COPY]](p0), debug-location !8 :: (store (p0))
%0:_(p0) = COPY $x0
%1:_(i8) = G_VAARG %0(p0), 1, debug-location !11
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/localizer-propagate-debug-loc.mir b/llvm/test/CodeGen/AArch64/GlobalISel/localizer-propagate-debug-loc.mir
index 6ced34daed680..488f793432341 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/localizer-propagate-debug-loc.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/localizer-propagate-debug-loc.mir
@@ -76,12 +76,12 @@ body: |
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[C:%[0-9]+]]:gpr(i32) = G_CONSTANT i32 3
- ; CHECK-NEXT: [[ADRP:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @C, debug-location !DILocation(line: 0, scope: !18)
- ; CHECK-NEXT: [[ADD_LOW:%[0-9]+]]:gpr(p0) = G_ADD_LOW [[ADRP]](p0), target-flags(aarch64-pageoff, aarch64-nc) @C, debug-location !DILocation(line: 0, scope: !18)
- ; CHECK-NEXT: [[ADRP1:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @B, debug-location !DILocation(line: 0, scope: !14)
- ; CHECK-NEXT: [[ADD_LOW1:%[0-9]+]]:gpr(p0) = G_ADD_LOW [[ADRP1]](p0), target-flags(aarch64-pageoff, aarch64-nc) @B, debug-location !DILocation(line: 0, scope: !14)
- ; CHECK-NEXT: [[ADRP2:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @A, debug-location !DILocation(line: 0, scope: !11)
- ; CHECK-NEXT: [[ADD_LOW2:%[0-9]+]]:gpr(p0) = G_ADD_LOW [[ADRP2]](p0), target-flags(aarch64-pageoff, aarch64-nc) @A, debug-location !DILocation(line: 0, scope: !11)
+ ; CHECK-NEXT: [[ADRP:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @C, debug-location !19
+ ; CHECK-NEXT: [[ADD_LOW:%[0-9]+]]:gpr(p0) = G_ADD_LOW [[ADRP]](p0), target-flags(aarch64-pageoff, aarch64-nc) @C, debug-location !19
+ ; CHECK-NEXT: [[ADRP1:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @B, debug-location !20
+ ; CHECK-NEXT: [[ADD_LOW1:%[0-9]+]]:gpr(p0) = G_ADD_LOW [[ADRP1]](p0), target-flags(aarch64-pageoff, aarch64-nc) @B, debug-location !20
+ ; CHECK-NEXT: [[ADRP2:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @A, debug-location !21
+ ; CHECK-NEXT: [[ADD_LOW2:%[0-9]+]]:gpr(p0) = G_ADD_LOW [[ADRP2]](p0), target-flags(aarch64-pageoff, aarch64-nc) @A, debug-location !21
; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:gpr(p0) = G_FRAME_INDEX %stack.0
; CHECK-NEXT: [[C1:%[0-9]+]]:gpr(i32) = G_CONSTANT i32 0
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(i32) = COPY [[C1]](i32)
@@ -94,9 +94,9 @@ body: |
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.5(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[ADRP3:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @A, debug-location !10
- ; CHECK-NEXT: [[ADD_LOW3:%[0-9]+]]:gpr(p0) = G_ADD_LOW [[ADRP3]](p0), target-flags(aarch64-pageoff, aarch64-nc) @A, debug-location !10
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:gpr(i32) = G_LOAD [[ADD_LOW3]](p0), debug-location !10 :: (dereferenceable load (i32))
+ ; CHECK-NEXT: [[ADRP3:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @A, debug-location !10
+ ; CHECK-NEXT: [[ADD_LOW3:%[0-9]+]]:gpr(p0) = G_ADD_LOW [[ADRP3]](p0), target-flags(aarch64-pageoff, aarch64-nc) @A, debug-location !10
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:gpr(i32) = G_LOAD [[ADD_LOW3]](p0), debug-location !10 :: (dereferenceable load (i32))
; CHECK-NEXT: [[FRAME_INDEX1:%[0-9]+]]:gpr(p0) = G_FRAME_INDEX %stack.0
; CHECK-NEXT: G_STORE [[LOAD]](i32), [[FRAME_INDEX1]](p0) :: (volatile store (i32) into %ir.1)
; CHECK-NEXT: G_BR %bb.5
@@ -114,22 +114,22 @@ body: |
; CHECK-NEXT: bb.3:
; CHECK-NEXT: successors: %bb.5(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[ADRP4:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @B, debug-location !DILocation(line: 0, scope: !14)
- ; CHECK-NEXT: [[ADD_LOW4:%[0-9]+]]:gpr(p0) = G_ADD_LOW [[ADRP4]](p0), target-flags(aarch64-pageoff, aarch64-nc) @B, debug-location !DILocation(line: 0, scope: !14)
- ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:gpr(i32) = G_LOAD [[ADD_LOW4]](p0), debug-location !13 :: (dereferenceable load (i32))
+ ; CHECK-NEXT: [[ADRP4:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @B, debug-location !20
+ ; CHECK-NEXT: [[ADD_LOW4:%[0-9]+]]:gpr(p0) = G_ADD_LOW [[ADRP4]](p0), target-flags(aarch64-pageoff, aarch64-nc) @B, debug-location !20
+ ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:gpr(i32) = G_LOAD [[ADD_LOW4]](p0), debug-location !13 :: (dereferenceable load (i32))
; CHECK-NEXT: [[FRAME_INDEX2:%[0-9]+]]:gpr(p0) = G_FRAME_INDEX %stack.0
; CHECK-NEXT: G_STORE [[LOAD1]](i32), [[FRAME_INDEX2]](p0) :: (volatile store (i32) into %ir.1)
- ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:gpr(i32) = G_LOAD [[ADD_LOW4]](p0), debug-location !16 :: (dereferenceable load (i32))
+ ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:gpr(i32) = G_LOAD [[ADD_LOW4]](p0), debug-location !16 :: (dereferenceable load (i32))
; CHECK-NEXT: G_STORE [[LOAD2]](i32), [[FRAME_INDEX2]](p0) :: (volatile store (i32) into %ir.1)
; CHECK-NEXT: G_BR %bb.5
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.4:
; CHECK-NEXT: successors: %bb.5(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[ADRP5:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @C, debug-location !17
- ; CHECK-NEXT: [[ADD_LOW5:%[0-9]+]]:gpr(p0) = G_ADD_LOW [[ADRP5]](p0), target-flags(aarch64-pageoff, aarch64-nc) @C, debug-location !17
- ; CHECK-NEXT: [[C5:%[0-9]+]]:gpr(i32) = G_CONSTANT i32 3, debug-location !17
- ; CHECK-NEXT: G_STORE [[C5]](i32), [[ADD_LOW5]](p0), debug-location !17 :: (store (i32) into @C)
+ ; CHECK-NEXT: [[ADRP5:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @C, debug-location !17
+ ; CHECK-NEXT: [[ADD_LOW5:%[0-9]+]]:gpr(p0) = G_ADD_LOW [[ADRP5]](p0), target-flags(aarch64-pageoff, aarch64-nc) @C, debug-location !17
+ ; CHECK-NEXT: [[C5:%[0-9]+]]:gpr(i32) = G_CONSTANT i32 3, debug-location !17
+ ; CHECK-NEXT: G_STORE [[C5]](i32), [[ADD_LOW5]](p0), debug-location !17 :: (store (i32) into @C)
; CHECK-NEXT: G_BR %bb.5
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.5:
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/phi-mir-debugify.mir b/llvm/test/CodeGen/AArch64/GlobalISel/phi-mir-debugify.mir
index 9be4317cf669c..cf838388aff9d 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/phi-mir-debugify.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/phi-mir-debugify.mir
@@ -39,46 +39,46 @@ body: |
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-NEXT: liveins: $w0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(i32) = COPY $w0, debug-location !11
- ; CHECK-NEXT: DBG_VALUE [[COPY]](i32), $noreg, !9, !DIExpression(), debug-location !11
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 0, debug-location !DILocation(line: 2, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE [[C]](i32), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 2, column: 1, scope: !5)
- ; CHECK-NEXT: [[C1:%[0-9]+]]:_(i32) = G_CONSTANT i32 1, debug-location !DILocation(line: 3, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE [[C1]](i32), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 3, column: 1, scope: !5)
- ; CHECK-NEXT: [[C2:%[0-9]+]]:_(i32) = G_CONSTANT i32 2, debug-location !DILocation(line: 4, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE [[C2]](i32), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 4, column: 1, scope: !5)
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(i1) = G_ICMP intpred(ugt), [[COPY]](i32), [[C]], debug-location !DILocation(line: 5, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE [[ICMP]](i1), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 5, column: 1, scope: !5)
- ; CHECK-NEXT: G_BRCOND [[ICMP]](i1), %bb.1, debug-location !DILocation(line: 6, column: 1, scope: !5)
- ; CHECK-NEXT: G_BR %bb.2, debug-location !DILocation(line: 7, column: 1, scope: !5)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(i32) = COPY $w0, debug-location !11
+ ; CHECK-NEXT: DBG_VALUE [[COPY]](i32), $noreg, !9, !DIExpression(), debug-location !11
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 0, debug-location !12
+ ; CHECK-NEXT: DBG_VALUE [[C]](i32), $noreg, !9, !DIExpression(), debug-location !12
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(i32) = G_CONSTANT i32 1, debug-location !13
+ ; CHECK-NEXT: DBG_VALUE [[C1]](i32), $noreg, !9, !DIExpression(), debug-location !13
+ ; CHECK-NEXT: [[C2:%[0-9]+]]:_(i32) = G_CONSTANT i32 2, debug-location !14
+ ; CHECK-NEXT: DBG_VALUE [[C2]](i32), $noreg, !9, !DIExpression(), debug-location !14
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(i1) = G_ICMP intpred(ugt), [[COPY]](i32), [[C]], debug-location !15
+ ; CHECK-NEXT: DBG_VALUE [[ICMP]](i1), $noreg, !9, !DIExpression(), debug-location !15
+ ; CHECK-NEXT: G_BRCOND [[ICMP]](i1), %bb.1, debug-location !16
+ ; CHECK-NEXT: G_BR %bb.2, debug-location !17
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.3(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(i32) = G_ADD [[COPY]], [[C1]], debug-location !DILocation(line: 8, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE [[ADD]](i32), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 8, column: 1, scope: !5)
- ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i1) = G_TRUNC [[ADD]](i32), debug-location !DILocation(line: 9, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE [[TRUNC]](i1), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 9, column: 1, scope: !5)
- ; CHECK-NEXT: G_BR %bb.3, debug-location !DILocation(line: 10, column: 1, scope: !5)
+ ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(i32) = G_ADD [[COPY]], [[C1]], debug-location !18
+ ; CHECK-NEXT: DBG_VALUE [[ADD]](i32), $noreg, !9, !DIExpression(), debug-location !18
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i1) = G_TRUNC [[ADD]](i32), debug-location !19
+ ; CHECK-NEXT: DBG_VALUE [[TRUNC]](i1), $noreg, !9, !DIExpression(), debug-location !19
+ ; CHECK-NEXT: G_BR %bb.3, debug-location !20
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: successors: %bb.3(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(i32) = G_ADD [[COPY]], [[C2]], debug-location !DILocation(line: 11, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE [[ADD1]](i32), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 11, column: 1, scope: !5)
- ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(i1) = G_TRUNC [[ADD1]](i32), debug-location !DILocation(line: 12, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE [[TRUNC1]](i1), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 12, column: 1, scope: !5)
+ ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(i32) = G_ADD [[COPY]], [[C2]], debug-location !21
+ ; CHECK-NEXT: DBG_VALUE [[ADD1]](i32), $noreg, !9, !DIExpression(), debug-location !21
+ ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(i1) = G_TRUNC [[ADD1]](i32), debug-location !22
+ ; CHECK-NEXT: DBG_VALUE [[TRUNC1]](i1), $noreg, !9, !DIExpression(), debug-location !22
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.3:
- ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(i1) = G_PHI [[TRUNC]](i1), %bb.1, [[TRUNC1]](i1), %bb.2, debug-location !DILocation(line: 13, column: 1, scope: !5)
- ; CHECK-NEXT: [[PHI1:%[0-9]+]]:_(i1) = G_PHI [[TRUNC]](i1), %bb.1, [[TRUNC1]](i1), %bb.2, debug-location !DILocation(line: 14, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE [[PHI]](i1), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 13, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE [[PHI1]](i1), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 14, column: 1, scope: !5)
- ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(i32) = G_ZEXT [[PHI]](i1), debug-location !DILocation(line: 15, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE [[ZEXT]](i32), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 15, column: 1, scope: !5)
- ; CHECK-NEXT: $w0 = COPY [[ZEXT]](i32), debug-location !DILocation(line: 16, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE $w0, $noreg, !9, !DIExpression(), debug-location !DILocation(line: 16, column: 1, scope: !5)
- ; CHECK-NEXT: RET_ReallyLR implicit $w0, debug-location !DILocation(line: 17, column: 1, scope: !5)
+ ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(i1) = G_PHI [[TRUNC]](i1), %bb.1, [[TRUNC1]](i1), %bb.2, debug-location !23
+ ; CHECK-NEXT: [[PHI1:%[0-9]+]]:_(i1) = G_PHI [[TRUNC]](i1), %bb.1, [[TRUNC1]](i1), %bb.2, debug-location !24
+ ; CHECK-NEXT: DBG_VALUE [[PHI]](i1), $noreg, !9, !DIExpression(), debug-location !23
+ ; CHECK-NEXT: DBG_VALUE [[PHI1]](i1), $noreg, !9, !DIExpression(), debug-location !24
+ ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(i32) = G_ZEXT [[PHI]](i1), debug-location !25
+ ; CHECK-NEXT: DBG_VALUE [[ZEXT]](i32), $noreg, !9, !DIExpression(), debug-location !25
+ ; CHECK-NEXT: $w0 = COPY [[ZEXT]](i32), debug-location !26
+ ; CHECK-NEXT: DBG_VALUE $w0, $noreg, !9, !DIExpression(), debug-location !26
+ ; CHECK-NEXT: RET_ReallyLR implicit $w0, debug-location !27
bb.0:
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $w0
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/salvage-debug-info-dead.mir b/llvm/test/CodeGen/AArch64/GlobalISel/salvage-debug-info-dead.mir
index 6fd24f0af770e..56ce2bcca6d6e 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/salvage-debug-info-dead.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/salvage-debug-info-dead.mir
@@ -44,15 +44,20 @@ name: main
tracksRegLiveness: true
body: |
; CHECK-LABEL: name: main
+ ; CHECK: machineMetadataNodes:
+ ; CHECK-DAG: - '[[LOC6:![0-9]+]] = !DILocation(line: 6, column: 7, scope: !6)'
+ ; CHECK-DAG: - '[[LOC7:![0-9]+]] = !DILocation(line: 7, column: 7, scope: !6)'
+ ; CHECK-DAG: - '[[LOC8:![0-9]+]] = !DILocation(line: 8, column: 7, scope: !6)'
+ ; CHECK-DAG: - '[[LOC9:![0-9]+]] = !DILocation(line: 9, column: 7, scope: !6)'
; CHECK: bb.0:
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: DBG_VALUE $x0, $noreg, {{.*}}, !DIExpression(DW_OP_LLVM_convert, 64, DW_ATE_unsigned, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_stack_value), debug-location !DILocation(line: 6, column: 7, scope: !6)
- ; CHECK-NEXT: DBG_VALUE $x0, $noreg, {{.*}}, !DIExpression(DW_OP_LLVM_convert, 64, DW_ATE_unsigned, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_LLVM_convert, 16, DW_ATE_unsigned, DW_OP_stack_value), debug-location !DILocation(line: 7, column: 7, scope: !6)
- ; CHECK-NEXT: DBG_VALUE $x0, $noreg, {{.*}}, !DIExpression(DW_OP_LLVM_convert, 64, DW_ATE_unsigned, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_LLVM_convert, 16, DW_ATE_unsigned, DW_OP_LLVM_convert, 16, DW_ATE_unsigned, DW_OP_LLVM_convert, 8, DW_ATE_unsigned, DW_OP_stack_value), debug-location !DILocation(line: 8, column: 7, scope: !6)
+ ; CHECK-NEXT: DBG_VALUE $x0, $noreg, {{.*}}, !DIExpression(DW_OP_LLVM_convert, 64, DW_ATE_unsigned, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_stack_value), debug-location [[LOC6]]
+ ; CHECK-NEXT: DBG_VALUE $x0, $noreg, {{.*}}, !DIExpression(DW_OP_LLVM_convert, 64, DW_ATE_unsigned, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_LLVM_convert, 16, DW_ATE_unsigned, DW_OP_stack_value), debug-location [[LOC7]]
+ ; CHECK-NEXT: DBG_VALUE $x0, $noreg, {{.*}}, !DIExpression(DW_OP_LLVM_convert, 64, DW_ATE_unsigned, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_LLVM_convert, 16, DW_ATE_unsigned, DW_OP_LLVM_convert, 16, DW_ATE_unsigned, DW_OP_LLVM_convert, 8, DW_ATE_unsigned, DW_OP_stack_value), debug-location [[LOC8]]
; CHECK: bb.1:
- ; CHECK-NEXT: DBG_VALUE $x0, $noreg, {{.*}}, !DIExpression(DW_OP_LLVM_convert, 64, DW_ATE_unsigned, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_stack_value), debug-location !DILocation(line: 9, column: 7, scope: !6)
- ; CHECK-NEXT: DBG_VALUE %4:_(i32), 0, {{.*}}, !DIExpression(), debug-location !DILocation(line: 9, column: 7, scope: !6)
+ ; CHECK-NEXT: DBG_VALUE $x0, $noreg, {{.*}}, !DIExpression(DW_OP_LLVM_convert, 64, DW_ATE_unsigned, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_stack_value), debug-location [[LOC9]]
+ ; CHECK-NEXT: DBG_VALUE %4:_(i32), 0, {{.*}}, !DIExpression(), debug-location [[LOC9]]
bb.0:
liveins: $x0
%0:_(i64) = COPY $x0
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/store-merging-debug.mir b/llvm/test/CodeGen/AArch64/GlobalISel/store-merging-debug.mir
index 49e9930aec9bd..0e00b36775c5a 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/store-merging-debug.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/store-merging-debug.mir
@@ -103,23 +103,23 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0, debug-location !11
; CHECK-NEXT: DBG_VALUE [[COPY]](p0), $noreg, !9, !DIExpression(), debug-location !11
- ; CHECK-NEXT: DBG_VALUE %1:_(i16), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 2, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE %4:_(i16), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 3, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE %7:_(i16), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 4, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE %10:_(i16), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 5, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE 0, $noreg, !9, !DIExpression(), debug-location !DILocation(line: 6, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE %2:_(i64), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 7, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE %3:_(p0), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 8, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE 1, $noreg, !9, !DIExpression(), debug-location !DILocation(line: 9, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE %5:_(i64), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 10, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE %6:_(p0), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 11, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE 2, $noreg, !9, !DIExpression(), debug-location !DILocation(line: 12, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE %8:_(i64), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 13, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE %9:_(p0), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 14, column: 1, scope: !5)
+ ; CHECK-NEXT: DBG_VALUE %1:_(i16), $noreg, !9, !DIExpression(), debug-location !12
+ ; CHECK-NEXT: DBG_VALUE %4:_(i16), $noreg, !9, !DIExpression(), debug-location !13
+ ; CHECK-NEXT: DBG_VALUE %7:_(i16), $noreg, !9, !DIExpression(), debug-location !14
+ ; CHECK-NEXT: DBG_VALUE %10:_(i16), $noreg, !9, !DIExpression(), debug-location !15
+ ; CHECK-NEXT: DBG_VALUE 0, $noreg, !9, !DIExpression(), debug-location !16
+ ; CHECK-NEXT: DBG_VALUE %2:_(i64), $noreg, !9, !DIExpression(), debug-location !17
+ ; CHECK-NEXT: DBG_VALUE %3:_(p0), $noreg, !9, !DIExpression(), debug-location !18
+ ; CHECK-NEXT: DBG_VALUE 1, $noreg, !9, !DIExpression(), debug-location !19
+ ; CHECK-NEXT: DBG_VALUE %5:_(i64), $noreg, !9, !DIExpression(), debug-location !20
+ ; CHECK-NEXT: DBG_VALUE %6:_(p0), $noreg, !9, !DIExpression(), debug-location !21
+ ; CHECK-NEXT: DBG_VALUE 2, $noreg, !9, !DIExpression(), debug-location !22
+ ; CHECK-NEXT: DBG_VALUE %8:_(i64), $noreg, !9, !DIExpression(), debug-location !23
+ ; CHECK-NEXT: DBG_VALUE %9:_(p0), $noreg, !9, !DIExpression(), debug-location !24
; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 3940688328982532
- ; CHECK-NEXT: G_STORE [[C]](i64), [[COPY]](p0), debug-location !DILocation(line: 9, scope: !5) :: (store (i64), align 2)
- ; CHECK-NEXT: DBG_VALUE 3, $noreg, !9, !DIExpression(), debug-location !DILocation(line: 15, column: 1, scope: !5)
- ; CHECK-NEXT: RET_ReallyLR debug-location !DILocation(line: 16, column: 1, scope: !5)
+ ; CHECK-NEXT: G_STORE [[C]](i64), [[COPY]](p0), debug-location !25 :: (store (i64), align 2)
+ ; CHECK-NEXT: DBG_VALUE 3, $noreg, !9, !DIExpression(), debug-location !26
+ ; CHECK-NEXT: RET_ReallyLR debug-location !27
%0:_(p0) = COPY $x0, debug-location !11
DBG_VALUE %0(p0), $noreg, !9, !DIExpression(), debug-location !11
%1:_(i16) = G_CONSTANT i16 4, debug-location !DILocation(line: 2, column: 1, scope: !5)
diff --git a/llvm/test/CodeGen/AArch64/tail-duplicate-debug-variance.mir b/llvm/test/CodeGen/AArch64/tail-duplicate-debug-variance.mir
index 8787d85aa3e44..253a0ea05b170 100644
--- a/llvm/test/CodeGen/AArch64/tail-duplicate-debug-variance.mir
+++ b/llvm/test/CodeGen/AArch64/tail-duplicate-debug-variance.mir
@@ -39,6 +39,8 @@ tracksRegLiveness: true
liveins: []
body: |
; CHECK-LABEL: name: test
+ ; DEBUG: machineMetadataNodes:
+ ; DEBUG: - '[[TAIL_LOC:![0-9]+]] = !DILocation(line: 0, scope: !7)'
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK-NEXT: liveins: $w0, $wzr
@@ -50,14 +52,14 @@ body: |
; CHECK-NEXT: successors: %bb.4(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: $x0 = COPY undef $x0
- ; DEBUG-NEXT: DBG_VALUE [[COPY]], $noreg, !11, !DIExpression(), debug-location !DILocation(line: 0, scope: !7)
+ ; DEBUG-NEXT: DBG_VALUE [[COPY]], $noreg, !11, !DIExpression(), debug-location [[TAIL_LOC]]
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]]
; CHECK-NEXT: B %bb.4
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: successors: %bb.4(0x80000000)
; CHECK-NEXT: {{ $}}
- ; DEBUG-NEXT: DBG_VALUE [[COPY]], $noreg, !11, !DIExpression(), debug-location !DILocation(line: 0, scope: !7)
+ ; DEBUG-NEXT: DBG_VALUE [[COPY]], $noreg, !11, !DIExpression(), debug-location [[TAIL_LOC]]
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY [[COPY]]
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.4:
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-metadata.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-metadata.ll
index f8b1a3879421d..1c6c52e0be081 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-metadata.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-metadata.ll
@@ -7,7 +7,7 @@ define i32 @reloc_constant() {
; CHECK-LABEL: name: reloc_constant
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: [[INT:%[0-9]+]]:_(i32) = G_INTRINSIC intrinsic(@llvm.amdgcn.reloc.constant), !0
- ; CHECK-NEXT: [[INT1:%[0-9]+]]:_(i32) = G_INTRINSIC intrinsic(@llvm.amdgcn.reloc.constant), <{{0x[0-9a-f]+}}>
+ ; CHECK-NEXT: [[INT1:%[0-9]+]]:_(i32) = G_INTRINSIC intrinsic(@llvm.amdgcn.reloc.constant), !1
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(i32) = G_ADD [[INT]], [[INT1]]
; CHECK-NEXT: $vgpr0 = COPY [[ADD]](i32)
; CHECK-NEXT: SI_RETURN implicit $vgpr0
diff --git a/llvm/test/CodeGen/AMDGPU/dbg-value-ends-sched-region.mir b/llvm/test/CodeGen/AMDGPU/dbg-value-ends-sched-region.mir
index de68534fdfedc..8916ad00c9efe 100644
--- a/llvm/test/CodeGen/AMDGPU/dbg-value-ends-sched-region.mir
+++ b/llvm/test/CodeGen/AMDGPU/dbg-value-ends-sched-region.mir
@@ -90,7 +90,7 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: dead [[COPY7:%[0-9]+]]:sreg_64 = COPY $exec
; CHECK-NEXT: dead [[GLOBAL_LOAD_DWORDX4_:%[0-9]+]]:vreg_128 = GLOBAL_LOAD_DWORDX4 [[COPY1]], 0, 0, implicit $exec :: (load (s128), addrspace 1)
- ; CHECK-NEXT: DBG_VALUE [[GLOBAL_LOAD_DWORDX4_]], $noreg, <0x{{[0-9a-f]+}}>, !DIExpression(DW_OP_constu, 1, DW_OP_swap, DW_OP_xderef), debug-location !DILocation(line: 0, scope: <0x{{[0-9a-f]+}}>)
+ ; CHECK-NEXT: DBG_VALUE [[GLOBAL_LOAD_DWORDX4_]], $noreg, !10, !DIExpression(DW_OP_constu, 1, DW_OP_swap, DW_OP_xderef), debug-location !5
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.5:
; CHECK-NEXT: successors: %bb.3(0x40000000), %bb.1(0x40000000)
diff --git a/llvm/test/CodeGen/AMDGPU/rewrite-partial-reg-uses-dbg.mir b/llvm/test/CodeGen/AMDGPU/rewrite-partial-reg-uses-dbg.mir
index 8eb8050dbd9f2..c670d1bc79ee4 100644
--- a/llvm/test/CodeGen/AMDGPU/rewrite-partial-reg-uses-dbg.mir
+++ b/llvm/test/CodeGen/AMDGPU/rewrite-partial-reg-uses-dbg.mir
@@ -38,19 +38,19 @@ body: |
; CHECK-LABEL: name: test_vreg_96_w64
; CHECK: undef [[V_MOV_B32_e32_:%[0-9]+]].sub0:vreg_64 = V_MOV_B32_e32 0, implicit $exec, debug-location !11
; CHECK-NEXT: DBG_VALUE [[V_MOV_B32_e32_]].sub0, $noreg, !9, !DIExpression(), debug-location !11
- ; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]].sub1:vreg_64 = V_MOV_B32_e32 1, implicit $exec, debug-location !DILocation(line: 2, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE [[V_MOV_B32_e32_]].sub1, $noreg, !9, !DIExpression(), debug-location !DILocation(line: 2, column: 1, scope: !5)
- ; CHECK-NEXT: S_NOP 0, implicit [[V_MOV_B32_e32_]], debug-location !DILocation(line: 3, column: 1, scope: !5)
- ; CHECK-NEXT: undef [[V_MOV_B32_e32_1:%[0-9]+]].sub0:vreg_64 = V_MOV_B32_e32 11, implicit $exec, debug-location !DILocation(line: 4, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE [[V_MOV_B32_e32_1]].sub0, $noreg, !9, !DIExpression(), debug-location !DILocation(line: 4, column: 1, scope: !5)
- ; CHECK-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]].sub1:vreg_64 = V_MOV_B32_e32 12, implicit $exec, debug-location !DILocation(line: 5, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE [[V_MOV_B32_e32_1]].sub1, $noreg, !9, !DIExpression(), debug-location !DILocation(line: 5, column: 1, scope: !5)
- ; CHECK-NEXT: S_NOP 0, implicit [[V_MOV_B32_e32_1]], debug-location !DILocation(line: 6, column: 1, scope: !5)
- ; CHECK-NEXT: undef [[V_MOV_B32_e32_2:%[0-9]+]].sub0:vreg_64 = V_MOV_B32_e32 11, implicit $exec, debug-location !DILocation(line: 4, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE [[V_MOV_B32_e32_2]], $noreg, !9, !DIExpression(), debug-location !DILocation(line: 4, column: 1, scope: !5)
- ; CHECK-NEXT: [[V_MOV_B32_e32_2:%[0-9]+]].sub1:vreg_64 = V_MOV_B32_e32 12, implicit $exec, debug-location !DILocation(line: 5, column: 1, scope: !5)
- ; CHECK-NEXT: DBG_VALUE [[V_MOV_B32_e32_2]], $noreg, !9, !DIExpression(), debug-location !DILocation(line: 5, column: 1, scope: !5)
- ; CHECK-NEXT: S_NOP 0, implicit [[V_MOV_B32_e32_2]], debug-location !DILocation(line: 6, column: 1, scope: !5)
+ ; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]].sub1:vreg_64 = V_MOV_B32_e32 1, implicit $exec, debug-location !12
+ ; CHECK-NEXT: DBG_VALUE [[V_MOV_B32_e32_]].sub1, $noreg, !9, !DIExpression(), debug-location !12
+ ; CHECK-NEXT: S_NOP 0, implicit [[V_MOV_B32_e32_]], debug-location !13
+ ; CHECK-NEXT: undef [[V_MOV_B32_e32_1:%[0-9]+]].sub0:vreg_64 = V_MOV_B32_e32 11, implicit $exec, debug-location !14
+ ; CHECK-NEXT: DBG_VALUE [[V_MOV_B32_e32_1]].sub0, $noreg, !9, !DIExpression(), debug-location !14
+ ; CHECK-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]].sub1:vreg_64 = V_MOV_B32_e32 12, implicit $exec, debug-location !15
+ ; CHECK-NEXT: DBG_VALUE [[V_MOV_B32_e32_1]].sub1, $noreg, !9, !DIExpression(), debug-location !15
+ ; CHECK-NEXT: S_NOP 0, implicit [[V_MOV_B32_e32_1]], debug-location !16
+ ; CHECK-NEXT: undef [[V_MOV_B32_e32_2:%[0-9]+]].sub0:vreg_64 = V_MOV_B32_e32 11, implicit $exec, debug-location !14
+ ; CHECK-NEXT: DBG_VALUE [[V_MOV_B32_e32_2]], $noreg, !9, !DIExpression(), debug-location !14
+ ; CHECK-NEXT: [[V_MOV_B32_e32_2:%[0-9]+]].sub1:vreg_64 = V_MOV_B32_e32 12, implicit $exec, debug-location !15
+ ; CHECK-NEXT: DBG_VALUE [[V_MOV_B32_e32_2]], $noreg, !9, !DIExpression(), debug-location !15
+ ; CHECK-NEXT: S_NOP 0, implicit [[V_MOV_B32_e32_2]], debug-location !16
undef %0.sub0:vreg_96 = V_MOV_B32_e32 0, implicit $exec, debug-location !11
DBG_VALUE %0.sub0, $noreg, !9, !DIExpression(), debug-location !11
%0.sub1:vreg_96 = V_MOV_B32_e32 1, implicit $exec, debug-location !DILocation(line: 2, column: 1, scope: !5)
diff --git a/llvm/test/CodeGen/AMDGPU/sgpr-spill-fi-skip-processing-stack-arg-dbg-value-list.mir b/llvm/test/CodeGen/AMDGPU/sgpr-spill-fi-skip-processing-stack-arg-dbg-value-list.mir
index 2af4e95b17cad..c576367f38e12 100644
--- a/llvm/test/CodeGen/AMDGPU/sgpr-spill-fi-skip-processing-stack-arg-dbg-value-list.mir
+++ b/llvm/test/CodeGen/AMDGPU/sgpr-spill-fi-skip-processing-stack-arg-dbg-value-list.mir
@@ -40,8 +40,12 @@ machineFunctionInfo:
privateSegmentWaveByteOffset: { reg: '$sgpr9' }
body: |
; CHECK-LABEL: name: test
+ ; CHECK: machineMetadataNodes:
+ ; CHECK-DAG: '![[LOC:[0-9]+]] = !DILocation(line: 10, column: 9, scope: ![[SP:[0-9]+]])'
+ ; CHECK-DAG: '![[SP]] = distinct !DISubprogram
+ ; CHECK-DAG: '![[VAR:[0-9]+]] = !DILocalVariable(name: "a", scope: ![[SP]],
; CHECK: bb.0:
- ; CHECK: DBG_VALUE_LIST <{{.*}}>, !DIExpression(), $noreg, 0, debug-location !DILocation(line: 10, column: 9, scope: <{{.*}}>)
+ ; CHECK: DBG_VALUE_LIST ![[VAR]], !DIExpression(), $noreg, 0, debug-location ![[LOC]]
bb.0:
renamable $sgpr10 = IMPLICIT_DEF
diff --git a/llvm/test/CodeGen/AMDGPU/vgpr-spill-fi-skip-processing-stack-arg-dbg-value-list.mir b/llvm/test/CodeGen/AMDGPU/vgpr-spill-fi-skip-processing-stack-arg-dbg-value-list.mir
index 4a77dd204fa38..8d36014c0560b 100644
--- a/llvm/test/CodeGen/AMDGPU/vgpr-spill-fi-skip-processing-stack-arg-dbg-value-list.mir
+++ b/llvm/test/CodeGen/AMDGPU/vgpr-spill-fi-skip-processing-stack-arg-dbg-value-list.mir
@@ -40,8 +40,12 @@ machineFunctionInfo:
privateSegmentWaveByteOffset: { reg: '$sgpr9' }
body: |
; CHECK-LABEL: name: test
+ ; CHECK: machineMetadataNodes:
+ ; CHECK-DAG: '![[LOC:[0-9]+]] = !DILocation(line: 10, column: 9, scope: ![[SP:[0-9]+]])'
+ ; CHECK-DAG: '![[SP]] = distinct !DISubprogram
+ ; CHECK-DAG: '![[VAR:[0-9]+]] = !DILocalVariable(name: "a", scope: ![[SP]],
; CHECK: bb.0:
- ; CHECK: DBG_VALUE_LIST <{{.*}}>, !DIExpression(), $noreg, 0, debug-location !DILocation(line: 10, column: 9, scope: <{{.*}}>)
+ ; CHECK: DBG_VALUE_LIST ![[VAR]], !DIExpression(), $noreg, 0, debug-location ![[LOC]]
bb.0:
$vgpr2 = IMPLICIT_DEF
SI_SPILL_V32_SAVE $vgpr2, %stack.0, $sgpr32, 0, implicit $exec :: (store (s32) into %stack.0, align 4, addrspace 5)
diff --git a/llvm/test/CodeGen/Generic/MIRDebugify/locations-and-values.mir b/llvm/test/CodeGen/Generic/MIRDebugify/locations-and-values.mir
index 009dd5c249b9d..4300fcf58fa9b 100644
--- a/llvm/test/CodeGen/Generic/MIRDebugify/locations-and-values.mir
+++ b/llvm/test/CodeGen/Generic/MIRDebugify/locations-and-values.mir
@@ -7,6 +7,7 @@
# RUN: llc -passes=mir-debugify -debugify-level=locations -o - %s | FileCheck --check-prefixes=ALL --implicit-check-not=dbg_value %s
# RUN: llc -passes=mir-debugify,mir-strip-debug,mir-debugify -o - %s | FileCheck --check-prefixes=ALL,VALUE %s
# RUN: llc -passes=mir-debugify,mir-strip-debug -o - %s | FileCheck --check-prefix=STRIP %s
+# RUN: llc -run-pass=mir-debugify -o - %s | llc -x mir -run-pass=none -filetype=null
--- |
; ModuleID = 'loc-only.ll'
@@ -33,6 +34,9 @@
; VALUE: [[VAR2:![0-9]+]] = !DILocalVariable(name: "2"
; STRIP-NOT: !llvm.debugify
; STRIP-NOT: !llvm.mir.debugify
+ ; ALL: machineMetadataNodes:
+ ; ALL-DAG: - '![[L4:[0-9]+]] = !DILocation(line: 4, column: 1, scope: !{{[0-9]+}})'
+ ; ALL-DAG: - '![[L5:[0-9]+]] = !DILocation(line: 5, column: 1, scope: !{{[0-9]+}})'
...
---
@@ -53,8 +57,8 @@ body: |
; VALUE: DBG_VALUE %1(s32), $noreg, [[VAR2]], !DIExpression(), debug-location [[L2]]
; ALL: %2:_(s32) = G_CONSTANT i32 2, debug-location [[L3]]
; VALUE: DBG_VALUE %2(s32), $noreg, [[VAR1]], !DIExpression(), debug-location [[L3]]
- ; ALL: %3:_(s32) = G_ADD %0, %2, debug-location !DILocation(line: 4, column: 1, scope: [[SP:![0-9]+]])
- ; VALUE: DBG_VALUE %3(s32), $noreg, [[VAR1]], !DIExpression(), debug-location !DILocation(line: 4
- ; ALL: %4:_(s32) = G_SUB %3, %1, debug-location !DILocation(line: 5, column: 1, scope: [[SP]])
- ; VALUE: DBG_VALUE %4(s32), $noreg, [[VAR1]], !DIExpression(), debug-location !DILocation(line: 5
+ ; ALL: %3:_(s32) = G_ADD %0, %2, debug-location ![[L4]]
+ ; VALUE: DBG_VALUE %3(s32), $noreg, [[VAR1]], !DIExpression(), debug-location ![[L4]]
+ ; ALL: %4:_(s32) = G_SUB %3, %1, debug-location ![[L5]]
+ ; VALUE: DBG_VALUE %4(s32), $noreg, [[VAR1]], !DIExpression(), debug-location ![[L5]]
...
diff --git a/llvm/test/CodeGen/Generic/MIRStripDebug/dont-strip-real-debug-info.mir b/llvm/test/CodeGen/Generic/MIRStripDebug/dont-strip-real-debug-info.mir
index f241396648f2b..1737ce5419459 100644
--- a/llvm/test/CodeGen/Generic/MIRStripDebug/dont-strip-real-debug-info.mir
+++ b/llvm/test/CodeGen/Generic/MIRStripDebug/dont-strip-real-debug-info.mir
@@ -63,6 +63,8 @@
; CHECK: !10 = !DILocation(line: 1, column: 1, scope: !4)
; CHECK: !11 = !DILocation(line: 2, column: 1, scope: !4)
; CHECK: !12 = !DILocation(line: 3, column: 1, scope: !4)
+ ; CHECK: machineMetadataNodes:
+ ; CHECK-DAG: - '![[ZERO_LOC:[0-9]+]] = !DILocation(line: 0, scope: !4)'
...
---
@@ -81,7 +83,7 @@ body: |
; CHECK-NEXT: bb
; CHECK-NEXT: %0:_(s32) = G_IMPLICIT_DEF{{$}}
; CHECK-NEXT: %1:_(s32) = G_IMPLICIT_DEF{{$}}
- ; CHECK-NEXT: %2:_(s32) = G_CONSTANT i32 2, debug-location !DILocation(line: 0, scope: !4)
+ ; CHECK-NEXT: %2:_(s32) = G_CONSTANT i32 2, debug-location ![[ZERO_LOC]]
; CHECK-NEXT: %3:_(s32) = G_ADD %0, %2, debug-location !10
; CHECK-NEXT: DBG_VALUE %3(s32), $noreg, !7, !DIExpression(), debug-location !10
; CHECK-NEXT: %4:_(s32) = G_SUB %3, %1, debug-location !11
diff --git a/llvm/test/CodeGen/Hexagon/packetize-debug-loc.mir b/llvm/test/CodeGen/Hexagon/packetize-debug-loc.mir
index 77236f56a8970..94615fa23ceb7 100644
--- a/llvm/test/CodeGen/Hexagon/packetize-debug-loc.mir
+++ b/llvm/test/CodeGen/Hexagon/packetize-debug-loc.mir
@@ -39,11 +39,14 @@ body: |
...
# CHECK-LABEL: name: test
+# CHECK: machineMetadataNodes:
+# CHECK-DAG: - '[[DL1:![0-9]+]] = !DILocation(line: 126, column: 9
+# CHECK-DAG: - '[[DL2:![0-9]+]] = !DILocation(line: 321, column: 4
# CHECK: BUNDLE
-# CHECK-SAME: debug-location [[DL1:!DILocation([^)]+)]]
+# CHECK-SAME: debug-location [[DL1]]
# CHECK-NEXT: L2_loadri_io $r1, 0, debug-location [[DL1]]
-# CHECK-NEXT: L2_loadri_io $r1, 0, debug-location [[DL2:!DILocation([^)]+)]]
+# CHECK-NEXT: L2_loadri_io $r1, 0, debug-location [[DL2]]
# CHECK: BUNDLE
# CHECK-SAME: debug-location [[DL1]]
diff --git a/llvm/test/CodeGen/MIR/Generic/machine-metadata-err0.mir b/llvm/test/CodeGen/MIR/Generic/machine-metadata-err0.mir
index 0502ac90e51eb..9d5848b80e0c5 100644
--- a/llvm/test/CodeGen/MIR/Generic/machine-metadata-err0.mir
+++ b/llvm/test/CodeGen/MIR/Generic/machine-metadata-err0.mir
@@ -12,4 +12,4 @@ name: t0
machineMetadataNodes:
- '9 = distinct !{!9, !7, !"Dst"}'
...
-# CHECK: [[@LINE-2]]:6: expected a metadata node
+# CHECK: [[@LINE-2]]:6: expected a metadata definition
diff --git a/llvm/test/CodeGen/MIR/Generic/machine-metadata-err1.mir b/llvm/test/CodeGen/MIR/Generic/machine-metadata-err1.mir
index 4ac5202527d2f..dd77caccb0cf1 100644
--- a/llvm/test/CodeGen/MIR/Generic/machine-metadata-err1.mir
+++ b/llvm/test/CodeGen/MIR/Generic/machine-metadata-err1.mir
@@ -12,4 +12,4 @@ name: t0
machineMetadataNodes:
- '! = distinct !{!9, !7, !"Dst"}'
...
-# CHECK: [[@LINE-2]]:8: expected metadata id after '!'
+# CHECK: [[@LINE-2]]:8: expected integer
diff --git a/llvm/test/CodeGen/MIR/Generic/machine-metadata-err2.mir b/llvm/test/CodeGen/MIR/Generic/machine-metadata-err2.mir
index 0e731b12c6456..8bb00b0aa6333 100644
--- a/llvm/test/CodeGen/MIR/Generic/machine-metadata-err2.mir
+++ b/llvm/test/CodeGen/MIR/Generic/machine-metadata-err2.mir
@@ -12,4 +12,4 @@ name: t0
machineMetadataNodes:
- '!9 = distinct {!9, !7, !"Dst"}'
...
-# CHECK: [[@LINE-2]]:20: expected a metadata node
+# CHECK: [[@LINE-2]]:20: Expected '!' here
diff --git a/llvm/test/CodeGen/MIR/Generic/machine-metadata-err6.mir b/llvm/test/CodeGen/MIR/Generic/machine-metadata-err6.mir
index 51cca1b259cd0..21dce2f8c4d97 100644
--- a/llvm/test/CodeGen/MIR/Generic/machine-metadata-err6.mir
+++ b/llvm/test/CodeGen/MIR/Generic/machine-metadata-err6.mir
@@ -12,4 +12,4 @@ name: t0
machineMetadataNodes:
- '!9 = distinct !{9, !7, !"Dst"}'
...
-# CHECK: [[@LINE-2]]:22: expected '!' here
+# CHECK: [[@LINE-2]]:22: expected metadata operand
diff --git a/llvm/test/CodeGen/MIR/Generic/machine-metadata-err7.mir b/llvm/test/CodeGen/MIR/Generic/machine-metadata-err7.mir
index 0cc5ef1b8af83..eaf78448f1245 100644
--- a/llvm/test/CodeGen/MIR/Generic/machine-metadata-err7.mir
+++ b/llvm/test/CodeGen/MIR/Generic/machine-metadata-err7.mir
@@ -12,4 +12,4 @@ name: t0
machineMetadataNodes:
- '!9 = distinct !{!, !7, !"Dst"}'
...
-# CHECK: [[@LINE-2]]:23: expected metadata id after '!'
+# CHECK: [[@LINE-2]]:23: expected integer
diff --git a/llvm/test/CodeGen/MIR/Generic/machine-metadata-err8.mir b/llvm/test/CodeGen/MIR/Generic/machine-metadata-err8.mir
index 1d51dbc5d659d..ade425348782e 100644
--- a/llvm/test/CodeGen/MIR/Generic/machine-metadata-err8.mir
+++ b/llvm/test/CodeGen/MIR/Generic/machine-metadata-err8.mir
@@ -12,4 +12,4 @@ name: t0
machineMetadataNodes:
- '!9 = distinct !{!9, !7, !"Dst"}'
...
-# CHECK: [[@LINE-2]]:26: use of undefined metadata '!7'
+# CHECK: [[@LINE-2]]:27: use of undefined metadata '!7'
diff --git a/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir b/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir
index 11fed8ae64fd0..532c8ac354e71 100644
--- a/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir
+++ b/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir
@@ -124,11 +124,18 @@ body: |
%0 = COPY $edi
; CHECK-LABEL: name: test_mir_created
- ; CHECK: MOV32mr %stack.0.x.addr, 1, $noreg, 0, $noreg, %0, debug-location !DILocation(line: 1, scope: !14)
- ; CHECK: MOV32mr %stack.0.x.addr, 1, $noreg, 0, $noreg, %0, debug-location !DILocation(line: 2, column: 2, scope: !14)
- ; CHECK: MOV32mr %stack.0.x.addr, 1, $noreg, 0, $noreg, %0, debug-location !DILocation(line: 3, column: 2, scope: !14, isImplicitCode: true)
- ; CHECK: MOV32mr %stack.0.x.addr, 1, $noreg, 0, $noreg, %0, debug-location !DILocation(line: 4, scope: !14, inlinedAt: !15)
- ; CHECK: MOV32mr %stack.0.x.addr, 1, $noreg, 0, $noreg, %0, debug-location !DILocation(line: 5, scope: !14, inlinedAt: !DILocation(line: 4, scope: !14))
+ ; CHECK: machineMetadataNodes:
+ ; CHECK-DAG: - '![[INLINE:[0-9]+]] = !DILocation(line: 4, scope: ![[SCOPE:[0-9]+]])'
+ ; CHECK-DAG: - '![[LOC1:[0-9]+]] = !DILocation(line: 1, scope: ![[SCOPE]])'
+ ; CHECK-DAG: - '![[LOC2:[0-9]+]] = !DILocation(line: 2, column: 2, scope: ![[SCOPE]])'
+ ; CHECK-DAG: - '![[LOC3:[0-9]+]] = !DILocation(line: 3, column: 2, scope: ![[SCOPE]], isImplicitCode: true)'
+ ; CHECK-DAG: - '![[LOC4:[0-9]+]] = !DILocation(line: 4, scope: ![[SCOPE]], inlinedAt: ![[CALLSITE:[0-9]+]])'
+ ; CHECK-DAG: - '![[LOC5:[0-9]+]] = !DILocation(line: 5, scope: ![[SCOPE]], inlinedAt: ![[INLINE]])'
+ ; CHECK: MOV32mr %stack.0.x.addr, 1, $noreg, 0, $noreg, %0, debug-location ![[LOC1]]
+ ; CHECK: MOV32mr %stack.0.x.addr, 1, $noreg, 0, $noreg, %0, debug-location ![[LOC2]]
+ ; CHECK: MOV32mr %stack.0.x.addr, 1, $noreg, 0, $noreg, %0, debug-location ![[LOC3]]
+ ; CHECK: MOV32mr %stack.0.x.addr, 1, $noreg, 0, $noreg, %0, debug-location ![[LOC4]]
+ ; CHECK: MOV32mr %stack.0.x.addr, 1, $noreg, 0, $noreg, %0, debug-location ![[LOC5]]
MOV32mr %stack.0.x.addr, 1, _, 0, _, %0, debug-location !DILocation(line: 1, scope: !15)
MOV32mr %stack.0.x.addr, 1, _, 0, _, %0, debug-location !DILocation(line: 2, column: 2, scope: !15)
MOV32mr %stack.0.x.addr, 1, _, 0, _, %0, debug-location !DILocation(line: 3, column: 2, scope: !15, isImplicitCode: true)
diff --git a/llvm/test/CodeGen/MIR/X86/machine-metadata-round-trip.mir b/llvm/test/CodeGen/MIR/X86/machine-metadata-round-trip.mir
new file mode 100644
index 0000000000000..c1bcfd9794ece
--- /dev/null
+++ b/llvm/test/CodeGen/MIR/X86/machine-metadata-round-trip.mir
@@ -0,0 +1,35 @@
+# RUN: llc -mtriple=x86_64 -run-pass=none -o - %s | FileCheck %s
+# RUN: llc -mtriple=x86_64 -run-pass=none -o - %s | llc -mtriple=x86_64 -x mir -run-pass=none -filetype=null
+
+--- |
+ define i8 @test(ptr %p) {
+ %value = load i8, ptr %p
+ ret i8 %value
+ }
+...
+---
+name: test
+machineMetadataNodes:
+ - '!0 = !{!"heap"}'
+ - '!1 = !{!"pcsections"}'
+ - '!2 = !{!"tag", !"value"}'
+ - '!3 = !{i32 1}'
+ - '!4 = !{i8 0, i8 10}'
+ - '!5 = !{i32 0, !6}'
+ - '!6 = !{!"cache", !"streaming"}'
+body: |
+ bb.0:
+ liveins: $rdi
+
+ ; CHECK: machineMetadataNodes:
+ ; CHECK-DAG: - '![[HEAP:[0-9]+]] = !{!"heap"}'
+ ; CHECK-DAG: - '![[PCSECTIONS:[0-9]+]] = !{!"pcsections"}'
+ ; CHECK-DAG: - '![[MMRA:[0-9]+]] = !{!"tag", !"value"}'
+ ; CHECK-DAG: - '![[NOALIAS:[0-9]+]] = !{i32 1}'
+ ; CHECK-DAG: - '![[RANGE:[0-9]+]] = !{i8 0, i8 10}'
+ ; CHECK-DAG: - '![[CACHE:[0-9]+]] = !{i32 0, ![[CACHE_HINT:[0-9]+]]}'
+ ; CHECK-DAG: - '![[CACHE_HINT]] = !{!"cache", !"streaming"}'
+ ; CHECK: renamable $al = MOV8rm killed renamable $rdi, 1, $noreg, 0, $noreg, heap-alloc-marker ![[HEAP]], pcsections ![[PCSECTIONS]], mmra ![[MMRA]] :: (load (s8) from %ir.p, !noalias.addrspace ![[NOALIAS]], !range ![[RANGE]], !mem.cache_hint ![[CACHE]])
+ renamable $al = MOV8rm killed renamable $rdi, 1, $noreg, 0, $noreg, heap-alloc-marker !0, pcsections !1, mmra !2 :: (load (s8) from %ir.p, !noalias.addrspace !3, !range !4, !mem.cache_hint !5)
+ RET64 implicit killed $al
+...
diff --git a/llvm/test/CodeGen/MIR/X86/machine-metadata-specialized.mir b/llvm/test/CodeGen/MIR/X86/machine-metadata-specialized.mir
new file mode 100644
index 0000000000000..4b1ba5cf159c1
--- /dev/null
+++ b/llvm/test/CodeGen/MIR/X86/machine-metadata-specialized.mir
@@ -0,0 +1,40 @@
+# RUN: llc -mtriple=x86_64 -run-pass=none -o - %s | FileCheck %s
+# RUN: llc -mtriple=x86_64 -run-pass=none -o - %s | llc -mtriple=x86_64 -x mir -run-pass=none -filetype=null
+
+--- |
+ define void @test() {
+ ret void
+ }
+...
+---
+name: test
+machineMetadataNodes:
+ - '!0 = !DILocation(line: 1, scope: !1)'
+ - '!1 = distinct !DISubprogram(name: "test", scope: !2, file: !2, line: 1, type: !3, scopeLine: 1, spFlags: DISPFlagDefinition, unit: !6, retainedNodes: !7)'
+ - '!2 = !DIFile(filename: "test.c", directory: "/tmp")'
+ - '!3 = !DISubroutineType(types: !4)'
+ - '!4 = !{null}'
+ - '!5 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)'
+ - '!6 = distinct !DICompileUnit(language: DW_LANG_C99, file: !2, producer: "clang", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug)'
+ - '!7 = !{}'
+ - '!8 = !DILocalVariable(name: "x", scope: !1, file: !2, line: 1, type: !5)'
+ - '!9 = !DILocalVariable(name: "y", scope: !1, file: !2, line: 2, type: !5)'
+ - '!10 = !DILocation(line: 2, scope: !1)'
+entry_values:
+ - { entry-value-register: '$rax', debug-info-variable: '!9', debug-info-expression: '!DIExpression(DW_OP_LLVM_entry_value, 1)',
+ debug-info-location: '!10' }
+# CHECK: entry_values:
+# CHECK: - { entry-value-register: '$rax', debug-info-variable: '![[ENTRY_VAR:[0-9]+]]', debug-info-expression: '!DIExpression(DW_OP_LLVM_entry_value, 1)',
+# CHECK: debug-info-location: '![[ENTRY_LOC:[0-9]+]]' }
+body: |
+ bb.0:
+ ; CHECK: machineMetadataNodes:
+ ; CHECK-DAG: - '![[LOC:[0-9]+]] = !DILocation(line: 1, scope: ![[SP:[0-9]+]])'
+ ; CHECK-DAG: - '![[SP]] = distinct !DISubprogram(name: "test"
+ ; CHECK-DAG: - '![[VAR:[0-9]+]] = !DILocalVariable(name: "x", scope: ![[SP]]
+ ; CHECK-DAG: - '![[ENTRY_VAR]] = !DILocalVariable(name: "y", scope: ![[SP]]
+ ; CHECK-DAG: - '![[ENTRY_LOC]] = !DILocation(line: 2, scope: ![[SP]])'
+ ; CHECK: DBG_VALUE $rax, $noreg, ![[VAR]], !DIExpression(), debug-location ![[LOC]]
+ DBG_VALUE $rax, $noreg, !8, !DIExpression(), debug-location !0
+ RET 0
+...
diff --git a/llvm/test/CodeGen/Thumb2/LowOverheadLoops/vpt-block-debug.mir b/llvm/test/CodeGen/Thumb2/LowOverheadLoops/vpt-block-debug.mir
index 00f0a1c6d9de4..05edfc6955f1a 100644
--- a/llvm/test/CodeGen/Thumb2/LowOverheadLoops/vpt-block-debug.mir
+++ b/llvm/test/CodeGen/Thumb2/LowOverheadLoops/vpt-block-debug.mir
@@ -288,11 +288,17 @@ stack:
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
body: |
; CHECK-LABEL: name: __arm_2d_impl_rgb16_cl_key_1x1_paving_x_mirror_xx
- ; CHECK: early-clobber renamable $q2 = MVE_VLDRHU16_rq renamable $r0, killed renamable $q1, 0, $noreg, renamable $lr, debug-location !DILocation(line: 83, column: 18, scope: {{.*}}) :: (load (s128), align 1)
- ; CHECK: renamable $q1, renamable $r8 = MVE_VDDUPu16 killed renamable $r8, 1, 0, $noreg, renamable $lr, undef renamable $q1, debug-location !DILocation(line: 84, column: 22, scope: {{.*}})
- ; CHECK: MVE_VPTv8i16r 8, renamable $q2, renamable $r11, 1, implicit-def $vpr, debug-location !DILocation(line: 85, column: 17, scope: {{.*}})
- ; CHECK: renamable $r6 = MVE_VSTRHU16_post killed renamable $q2, killed renamable $r6, 16, 1, killed renamable $vpr, renamable $lr, debug-location !DILocation(line: 86, column: 13, scope: {{.*}}) :: (store (s128) into %ir.pDst.01, align 2)
- ; CHECK: $lr = MVE_LETP killed renamable $lr, %bb.3, debug-location !DILocation(line: 89, column: 9, scope: {{.*}})
+ ; CHECK: machineMetadataNodes:
+ ; CHECK-DAG: - '[[LOC83:![0-9]+]] = !DILocation(line: 83, column: 18
+ ; CHECK-DAG: - '[[LOC84:![0-9]+]] = !DILocation(line: 84, column: 22
+ ; CHECK-DAG: - '[[LOC85:![0-9]+]] = !DILocation(line: 85, column: 17
+ ; CHECK-DAG: - '[[LOC86:![0-9]+]] = !DILocation(line: 86, column: 13
+ ; CHECK-DAG: - '[[LOC89:![0-9]+]] = !DILocation(line: 89, column: 9
+ ; CHECK: early-clobber renamable $q2 = MVE_VLDRHU16_rq renamable $r0, killed renamable $q1, 0, $noreg, renamable $lr, debug-location [[LOC83]] :: (load (s128), align 1)
+ ; CHECK: renamable $q1, renamable $r8 = MVE_VDDUPu16 killed renamable $r8, 1, 0, $noreg, renamable $lr, undef renamable $q1, debug-location [[LOC84]]
+ ; CHECK: MVE_VPTv8i16r 8, renamable $q2, renamable $r11, 1, implicit-def $vpr, debug-location [[LOC85]]
+ ; CHECK: renamable $r6 = MVE_VSTRHU16_post killed renamable $q2, killed renamable $r6, 16, 1, killed renamable $vpr, renamable $lr, debug-location [[LOC86]] :: (store (s128) into %ir.pDst.01, align 2)
+ ; CHECK: $lr = MVE_LETP killed renamable $lr, %bb.3, debug-location [[LOC89]]
bb.0.entry:
successors: %bb.1(0x50000000), %bb.5(0x30000000)
liveins: $r0, $r1, $r2, $r3, $r4, $r5, $r6, $lr, $r8, $r9, $r10, $r11
diff --git a/llvm/test/CodeGen/X86/machine-sink-dbg-loc.mir b/llvm/test/CodeGen/X86/machine-sink-dbg-loc.mir
index 8b46053d3f53c..7283994b197cb 100644
--- a/llvm/test/CodeGen/X86/machine-sink-dbg-loc.mir
+++ b/llvm/test/CodeGen/X86/machine-sink-dbg-loc.mir
@@ -7,13 +7,15 @@
# CHECK: ![[DBG_VALUE_SCOPE:[0-9]+]] = distinct !DISubprogram
# CHECK: ![[MERGE_SCOPE:[0-9]+]] = !DILexicalBlock
# CHECK: ![[DBG_VALUE_LOC:[0-9]+]] = !DILocation(line: 5, scope: ![[DBG_VALUE_SCOPE]])
+# CHECK: machineMetadataNodes:
+# CHECK-NEXT: - '![[MERGE_LOC:[0-9]+]] = !DILocation(line: 0, scope: ![[MERGE_SCOPE]])'
# CHECK: bb.2.if.else:
# CHECK-NEXT: successors: %bb.1
# CHECK-NEXT: {{ $}}
# CHECK-NEXT: [[MOVSX64rr32_:%[0-9]+]]:gr64 = MOVSX64rr32 %[[#]]
-# CHECK-NEXT: [[SHL64ri:%[0-9]+]]:gr64 = SHL64ri [[MOVSX64rr32_]], 4, implicit-def dead $eflags, debug-location !DILocation(line: 0, scope: ![[MERGE_SCOPE]])
-# CHECK-NEXT: [[ADD64rm:%[0-9]+]]:gr64 = ADD64rm [[SHL64ri]], %[[#]], 1, $noreg, 0, $noreg, implicit-def dead $eflags, debug-location !DILocation(line: 0, scope: ![[MERGE_SCOPE]])
+# CHECK-NEXT: [[SHL64ri:%[0-9]+]]:gr64 = SHL64ri [[MOVSX64rr32_]], 4, implicit-def dead $eflags, debug-location ![[MERGE_LOC]]
+# CHECK-NEXT: [[ADD64rm:%[0-9]+]]:gr64 = ADD64rm [[SHL64ri]], %[[#]], 1, $noreg, 0, $noreg, implicit-def dead $eflags, debug-location ![[MERGE_LOC]]
# CHECK-NEXT: DBG_VALUE $noreg, $noreg, !9, !DIExpression(), debug-location ![[DBG_VALUE_LOC]]
diff --git a/llvm/test/CodeGen/X86/win64-eh-unwindv2-too-many-instr.mir b/llvm/test/CodeGen/X86/win64-eh-unwindv2-too-many-instr.mir
index 44d89356ecae7..f69670c61caf0 100644
--- a/llvm/test/CodeGen/X86/win64-eh-unwindv2-too-many-instr.mir
+++ b/llvm/test/CodeGen/X86/win64-eh-unwindv2-too-many-instr.mir
@@ -80,17 +80,17 @@ body: |
# bb.2 doesn't fill the current info, so bb.1 gets added as well.
# CHECK-NOT: SEH_SplitChainedAtEndOfBlock
# CHECK: SEH_UnwindV2Start
-# CHECK: RET64 debug-location !DILocation(line: 3, column: 1, scope: !6)
+# CHECK: RET64 debug-location !{{[0-9]+}}
# CHECK-LABEL: bb.2
# bb.3 has enough instructions by itself that bb.2 needs to split.
# ALLOWLESS-NEXT: SEH_SplitChainedAtEndOfBlock
# ALLOWMORE-NOT: SEH_SplitChainedAtEndOfBlock
# CHECK: SEH_UnwindV2Start
-# CHECK: RET64 debug-location !DILocation(line: 4, column: 1, scope: !6)
+# CHECK: RET64 debug-location !{{[0-9]+}}
# CHECK-LABEL: bb.3
# Never split at the end.
# CHECK-NOT: SEH_SplitChainedAtEndOfBlock
# CHECK: SEH_UnwindV2Start
-# CHECK: RET64 debug-location !DILocation(line: 5, column: 1, scope: !6)
+# CHECK: RET64 debug-location !{{[0-9]+}}
diff --git a/llvm/test/DebugInfo/AArch64/merge-locations-legalizer.mir b/llvm/test/DebugInfo/AArch64/merge-locations-legalizer.mir
index e70ec396bffc4..aa37c53190e9d 100644
--- a/llvm/test/DebugInfo/AArch64/merge-locations-legalizer.mir
+++ b/llvm/test/DebugInfo/AArch64/merge-locations-legalizer.mir
@@ -4,8 +4,9 @@
# instruction that is moved (%3) is updated appropriately.
# RUN: llc %s -run-pass=legalizer -mtriple=aarch64 -o - | FileCheck %s
-# CHECK-NOT: %2:_(s32) = G_CONSTANT i32 0, debug-location !DILocation(line: 13
-# CHECK: %2:_(s32) = G_CONSTANT i32 0, debug-location !DILocation(line: 0,
+# CHECK: machineMetadataNodes:
+# CHECK: - '[[MERGED_LOC:![0-9]+]] = !DILocation(line: 0,
+# CHECK: %2:_(s32) = G_CONSTANT i32 0, debug-location [[MERGED_LOC]]
--- |
define i32 @main(i32 %0, ptr %1) #0 !dbg !57 {
diff --git a/llvm/test/DebugInfo/Hexagon/packet-debug.mir b/llvm/test/DebugInfo/Hexagon/packet-debug.mir
index 485b543b6e176..358910facc269 100644
--- a/llvm/test/DebugInfo/Hexagon/packet-debug.mir
+++ b/llvm/test/DebugInfo/Hexagon/packet-debug.mir
@@ -1,11 +1,13 @@
# RUN: llc -mtriple=hexagon -run-pass hexagon-packetizer %s -o - | FileCheck %s
# CHECK-LABEL: name: factorial
+# CHECK: machineMetadataNodes:
+# CHECK: - '[[BUNDLE_LOC:![0-9]+]] = !DILocation(line: 9, column: 9
-# The first bundle in bb.0 should have debug-location !19 (line 9),
-# not !18 (line 0) from the DBG_VALUE instructions.
+# The first bundle in bb.0 should have line 9, not line 0 from the DBG_VALUE
+# instructions.
# CHECK: bb.0:
-# CHECK: BUNDLE {{.*}}line: 9
+# CHECK: BUNDLE {{.*}}debug-location [[BUNDLE_LOC]]
--- |
define void @factorial() { ret void }
diff --git a/llvm/test/DebugInfo/KeyInstructions/X86/parse.mir b/llvm/test/DebugInfo/KeyInstructions/X86/parse.mir
index 45cc23831412c..4d98bb1f3558f 100644
--- a/llvm/test/DebugInfo/KeyInstructions/X86/parse.mir
+++ b/llvm/test/DebugInfo/KeyInstructions/X86/parse.mir
@@ -2,7 +2,9 @@
## Check the MIR parser understands atomGroup and atomRank.
-# CHECK: RET64 $eax, debug-location !DILocation(line: 2, scope: ![[#]], atomGroup: 1, atomRank: 2)
+# CHECK: machineMetadataNodes:
+# CHECK-NEXT: - '![[LOC:[0-9]+]] = !DILocation(line: 2, scope: ![[#]], atomGroup: 1, atomRank: 2)'
+# CHECK: RET64 $eax, debug-location ![[LOC]]
--- |
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/undef-phi-through-regalloc.mir b/llvm/test/DebugInfo/MIR/InstrRef/undef-phi-through-regalloc.mir
index 68c4589798078..474e0d82621cd 100644
--- a/llvm/test/DebugInfo/MIR/InstrRef/undef-phi-through-regalloc.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/undef-phi-through-regalloc.mir
@@ -29,7 +29,7 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: dead renamable $al = IMPLICIT_DEF
- ; CHECK-NEXT: DBG_INSTR_REF !7, !DIExpression(), dbg-instr-ref(1, 0), debug-location !DILocation(line: 0, scope: !3)
+ ; CHECK-NEXT: DBG_INSTR_REF !7, !DIExpression(), dbg-instr-ref(1, 0), debug-location !8
; CHECK-NEXT: RET 0
bb.0:
successors: %bb.1
diff --git a/llvm/test/DebugInfo/MIR/X86/merge-inline-loc1.mir b/llvm/test/DebugInfo/MIR/X86/merge-inline-loc1.mir
index 1504789cd5854..db373913a70fd 100644
--- a/llvm/test/DebugInfo/MIR/X86/merge-inline-loc1.mir
+++ b/llvm/test/DebugInfo/MIR/X86/merge-inline-loc1.mir
@@ -216,7 +216,10 @@ body: |
# CHECK-DAG: [[INLINER:![0-9]+]] = distinct !DISubprogram(name: "multiple_inl_one_loc"
# CHECK-DAG: [[INLINEE:![0-9]+]] = distinct !DISubprogram(name: "inl1"
+# CHECK: machineMetadataNodes:
+# CHECK-DAG: - '[[MERGED_AT:![0-9]+]] = !DILocation(line: 0, scope: [[INLINER]])'
+# CHECK-DAG: - '[[MERGED_LOC:![0-9]+]] = !DILocation(line: 6, column: 5, scope: [[INLINEE]], inlinedAt: [[MERGED_AT]])'
# CHECK-NOT: CALL64pcrel32
-# CHECK: CALL64pcrel32 target-flags(x86-plt) @abort, {{.*}} debug-location !DILocation(line: 6, column: 5, scope: [[INLINEE]], inlinedAt: !DILocation(line: 0, scope: [[INLINER]]))
+# CHECK: CALL64pcrel32 target-flags(x86-plt) @abort, {{.*}} debug-location [[MERGED_LOC]]
# CHECK-NOT: CALL64pcrel32
diff --git a/llvm/test/DebugInfo/MIR/X86/merge-inline-loc2.mir b/llvm/test/DebugInfo/MIR/X86/merge-inline-loc2.mir
index 0564b49fcafdd..9dde35d982188 100644
--- a/llvm/test/DebugInfo/MIR/X86/merge-inline-loc2.mir
+++ b/llvm/test/DebugInfo/MIR/X86/merge-inline-loc2.mir
@@ -333,7 +333,10 @@ body: |
# CHECK-DAG: [[INLINER:![0-9]+]] = distinct !DISubprogram(name: "multiple_inl_multiple_loc"
# CHECK-DAG: [[INLINEE:![0-9]+]] = distinct !DISubprogram(name: "inl2"
+# CHECK: machineMetadataNodes:
+# CHECK-DAG: - '[[MERGED_AT:![0-9]+]] = !DILocation(line: 0, scope: [[INLINER]])'
+# CHECK-DAG: - '[[MERGED_LOC:![0-9]+]] = !DILocation(line: 0, scope: [[INLINEE]], inlinedAt: [[MERGED_AT]])'
# CHECK-NOT: CALL64pcrel32
-# CHECK: CALL64pcrel32 target-flags(x86-plt) @abort, {{.*}} debug-location !DILocation(line: 0, scope: [[INLINEE]], inlinedAt: !DILocation(line: 0, scope: [[INLINER]]))
+# CHECK: CALL64pcrel32 target-flags(x86-plt) @abort, {{.*}} debug-location [[MERGED_LOC]]
# CHECK-NOT: CALL64pcrel32
diff --git a/llvm/test/DebugInfo/MIR/X86/merge-inline-loc3.mir b/llvm/test/DebugInfo/MIR/X86/merge-inline-loc3.mir
index 2f21c7912c723..5cbb653dc7424 100644
--- a/llvm/test/DebugInfo/MIR/X86/merge-inline-loc3.mir
+++ b/llvm/test/DebugInfo/MIR/X86/merge-inline-loc3.mir
@@ -181,7 +181,9 @@ body: |
# multiple_inl_funcs(), without any inline information.
# CHECK: [[INLINER:![0-9]+]] = distinct !DISubprogram(name: "multiple_inl_funcs"
+# CHECK: machineMetadataNodes:
+# CHECK-NEXT: - '[[MERGED_LOC:![0-9]+]] = !DILocation(line: 0, scope: [[INLINER]])'
# CHECK-NOT: CALL64pcrel32
-# CHECK: CALL64pcrel32 target-flags(x86-plt) @abort, {{.*}} debug-location !DILocation(line: 0, scope: [[INLINER]])
+# CHECK: CALL64pcrel32 target-flags(x86-plt) @abort, {{.*}} debug-location [[MERGED_LOC]]
# CHECK-NOT: CALL64pcrel32
diff --git a/llvm/test/DebugInfo/MIR/X86/merge-inline-loc4.mir b/llvm/test/DebugInfo/MIR/X86/merge-inline-loc4.mir
index 24b17a6289203..691bd61783eb6 100644
--- a/llvm/test/DebugInfo/MIR/X86/merge-inline-loc4.mir
+++ b/llvm/test/DebugInfo/MIR/X86/merge-inline-loc4.mir
@@ -160,7 +160,9 @@ body: |
# merge_inl_and_non_inl(), without any inline information.
# CHECK: [[INLINER:![0-9]+]] = distinct !DISubprogram(name: "merge_inl_and_non_inl"
+# CHECK: machineMetadataNodes:
+# CHECK-NEXT: - '[[MERGED_LOC:![0-9]+]] = !DILocation(line: 0, scope: [[INLINER]])'
# CHECK-NOT: CALL64pcrel32
-# CHECK: CALL64pcrel32 target-flags(x86-plt) @abort, {{.*}} debug-location !DILocation(line: 0, scope: [[INLINER]])
+# CHECK: CALL64pcrel32 target-flags(x86-plt) @abort, {{.*}} debug-location [[MERGED_LOC]]
# CHECK-NOT: CALL64pcrel32
diff --git a/llvm/test/DebugInfo/WebAssembly/dbg-loc-reg-stackify.mir b/llvm/test/DebugInfo/WebAssembly/dbg-loc-reg-stackify.mir
index 7b4b500e808a6..e388d1e724d3c 100644
--- a/llvm/test/DebugInfo/WebAssembly/dbg-loc-reg-stackify.mir
+++ b/llvm/test/DebugInfo/WebAssembly/dbg-loc-reg-stackify.mir
@@ -34,6 +34,8 @@
---
# Sinking within the same BB preserves the debug location.
# CHECK-LABEL: name: sink_same_bb
+# CHECK: machineMetadataNodes:
+# CHECK-NEXT: - '[[SINK_LOC:![0-9]+]] = !DILocation(line: 10,
name: sink_same_bb
liveins:
- { reg: '$arguments' }
@@ -46,13 +48,15 @@ body: |
CALL @use, %0:i32, implicit-def $arguments
RETURN implicit-def $arguments
- ; CHECK: %0:i32 = CONST_I32 1, {{.*}}, debug-location !DILocation(line: 10
+ ; CHECK: %0:i32 = CONST_I32 1, {{.*}}, debug-location [[SINK_LOC]]
; CHECK-NEXT: CALL @use
...
---
# Cloning within the same BB preserves the debug location.
# CHECK-LABEL: name: clone_same_bb
+# CHECK: machineMetadataNodes:
+# CHECK-NEXT: - '[[SAME_LOC:![0-9]+]] = !DILocation(line: 10,
name: clone_same_bb
liveins:
- { reg: '$arguments' }
@@ -67,7 +71,7 @@ body: |
RETURN implicit-def $arguments
; CHECK: CALL @use
- ; CHECK-NEXT: %1:i32 = CONST_I32 1, {{.*}}, debug-location !DILocation(line: 10
+ ; CHECK-NEXT: %1:i32 = CONST_I32 1, {{.*}}, debug-location [[SAME_LOC]]
; CHECK-NEXT: CALL @use
...
@@ -76,6 +80,8 @@ body: |
# the destination BB has an instruction that has the same debug location
# (test.c:10).
# CHECK-LABEL: name: clone_different_bb_0
+# CHECK: machineMetadataNodes:
+# CHECK-NEXT: - '[[CLONE_LOC:![0-9]+]] = !DILocation(line: 10,
name: clone_different_bb_0
liveins:
- { reg: '$arguments' }
@@ -93,8 +99,8 @@ body: |
RETURN implicit-def $arguments
; CHECK: bb.1:
- ; CHECK: %1:i32 = CONST_I32 1, {{.*}}, debug-location !DILocation(line: 10
- ; CHECK-NEXT: CALL @use, %1, {{.*}}, debug-location !DILocation(line: 10
+ ; CHECK: %1:i32 = CONST_I32 1, {{.*}}, debug-location [[CLONE_LOC]]
+ ; CHECK-NEXT: CALL @use, %1, {{.*}}, debug-location [[CLONE_LOC]]
...
---
@@ -102,6 +108,8 @@ body: |
# because the destination BB doesn't have an instruction that has the same debug
# location (It has test.c:20 but not test.c:10).
# CHECK-LABEL: name: clone_different_bb_1
+# CHECK: machineMetadataNodes:
+# CHECK-NEXT: - '[[DEST_LOC:![0-9]+]] = !DILocation(line: 20,
name: clone_different_bb_1
liveins:
- { reg: '$arguments' }
@@ -120,6 +128,6 @@ body: |
; CHECK: bb.1:
; CHECK: %1:i32 = CONST_I32 1
- ; CHECK-NOT: %1:i32 = CONST_I32 1, {{.*}}, debug-location !DILocation(line: 10
- ; CHECK-NEXT: CALL @use, %1, {{.*}}, debug-location !DILocation(line: 20
+ ; CHECK-NOT: %1:i32 = CONST_I32 1, {{.*}}, debug-location
+ ; CHECK-NEXT: CALL @use, %1, {{.*}}, debug-location [[DEST_LOC]]
...
diff --git a/llvm/test/DebugInfo/X86/branch-folder-dbg-after-end.mir b/llvm/test/DebugInfo/X86/branch-folder-dbg-after-end.mir
index 743851c34610a..017e131cbc5a9 100644
--- a/llvm/test/DebugInfo/X86/branch-folder-dbg-after-end.mir
+++ b/llvm/test/DebugInfo/X86/branch-folder-dbg-after-end.mir
@@ -7,10 +7,11 @@
## Note the MIR doesn't match the IR as it's modified from:
## /home/och/dev/llvm-project/llvm/test/DebugInfo/X86/branch-folder-dbg.mir
+# CHECK: - '[[MERGED_LOC:![0-9]+]] = !DILocation(line: 0,
# CHECK: bb.0
# CHECK: CALL64pcrel32 @f, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
## --- Start splice from bb.2.if.else (and debug instructions from bb.1.if.then) ---
-# CHECK-NEXT: $edi = MOV32r0 implicit-def dead $eflags, debug-location !DILocation(line: 0, scope: ![[#]])
+# CHECK-NEXT: $edi = MOV32r0 implicit-def dead $eflags, debug-location [[MERGED_LOC]]
# CHECK-NEXT: DBG_VALUE $noreg, $noreg, ![[#]], !DIExpression(), debug-location
# CHECK-NEXT: DBG_VALUE $noreg, $noreg, ![[#]], !DIExpression(), debug-location
## --- End splice ------------------------------------------------------------------
diff --git a/llvm/test/DebugInfo/X86/branch-folder-dbg.mir b/llvm/test/DebugInfo/X86/branch-folder-dbg.mir
index 11b3721809129..3259ec0fff1c7 100644
--- a/llvm/test/DebugInfo/X86/branch-folder-dbg.mir
+++ b/llvm/test/DebugInfo/X86/branch-folder-dbg.mir
@@ -12,6 +12,8 @@
##
## Check DBG_LABELs are hoisted and not modified (and don't cause a crash).
+# CHECK: machineMetadataNodes:
+# CHECK-NEXT: - '![[MERGED_LOC:[0-9]+]] = !DILocation(line: 0, scope: ![[#]])'
# CHECK: bb.0
# CHECK: CALL64pcrel32 @f, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
## --- Start splice from bb.2.if.else (and debug instructions from bb.1.if.then) ---
@@ -19,7 +21,7 @@
# CHECK-NEXT: DBG_VALUE $noreg, $noreg, ![[#]], !DIExpression(), debug-location ![[#]]
# CHECK-NEXT: DBG_LABEL 1
# CHECK-NEXT: DBG_VALUE $noreg, $noreg, ![[#]], !DIExpression(), debug-location ![[#]]
-# CHECK-NEXT: $edi = MOV32r0 implicit-def dead $eflags, debug-instr-number 2, debug-location !DILocation(line: 0, scope: ![[#]])
+# CHECK-NEXT: $edi = MOV32r0 implicit-def dead $eflags, debug-instr-number 2, debug-location ![[MERGED_LOC]]
# CHECK-NEXT: DBG_VALUE $noreg, $noreg, ![[#]], !DIExpression(DW_OP_LLVM_arg, 0), debug-location ![[#]]
# CHECK-NEXT: DBG_VALUE $noreg, $noreg, ![[#]], !DIExpression(DW_OP_LLVM_arg, 0), debug-location ![[#]]
## --- End splice ------------------------------------------------------------------
>From 5471d604a4e111d1957b3c27cb5919078e58a1aa Mon Sep 17 00:00:00 2001
From: "Yaxun (Sam) Liu" <yaxun.liu at amd.com>
Date: Fri, 28 Aug 2026 16:05:47 -0400
Subject: [PATCH 3/3] [IR] Use persistent metadata IDs for printing
---
clang/lib/CodeGen/BackendUtil.cpp | 7 +-
clang/tools/cir-translate/cir-translate.cpp | 1 +
.../clang-fuzzer/handle-llvm/handle_llvm.cpp | 5 +-
.../clang-import-test/clang-import-test.cpp | 4 +-
.../include/flang/Optimizer/CodeGen/CodeGen.h | 8 +-
flang/lib/Frontend/FrontendActions.cpp | 6 +-
.../llvm/CodeGen/MachineModuleSlotTracker.h | 19 +-
llvm/include/llvm/IR/IRPrintingPasses.h | 5 +
llvm/include/llvm/IR/Metadata.h | 10 +-
llvm/include/llvm/IR/Module.h | 5 +
llvm/include/llvm/IR/ModuleSlotTracker.h | 48 ++-
.../include/llvm/IRPrinter/IRPrintingPasses.h | 7 +-
llvm/lib/CodeGen/MIRParser/MIParser.cpp | 4 +-
llvm/lib/CodeGen/MIRPrintingPass.cpp | 16 +
llvm/lib/CodeGen/MachineBasicBlock.cpp | 2 +-
llvm/lib/CodeGen/MachineModuleSlotTracker.cpp | 96 ++---
llvm/lib/CodeGen/MachineOperand.cpp | 2 +-
llvm/lib/IR/AsmWriter.cpp | 392 ++++++++++--------
llvm/lib/IR/Core.cpp | 2 +
llvm/lib/IR/IRPrintingPasses.cpp | 71 ++--
llvm/lib/IR/LLVMContextImpl.cpp | 9 +
llvm/lib/IR/LLVMContextImpl.h | 18 +
llvm/lib/IR/Metadata.cpp | 17 +
llvm/lib/IR/MetadataImpl.h | 2 +
llvm/lib/IR/SSAContext.cpp | 2 +-
llvm/lib/IRPrinter/IRPrintingPasses.cpp | 20 +-
llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp | 106 ++++-
.../DirectX/DebugInfo/di-globalvariable.ll | 7 +
llvm/test/CodeGen/Hexagon/swp-no-alias.mir | 8 +-
llvm/test/CodeGen/MIR/AMDGPU/instr-mmra.mir | 2 +-
.../CodeGen/MIR/AMDGPU/machine-metadata.mir | 12 +-
.../MIR/X86/instr-heap-alloc-operands.mir | 2 +-
.../test/CodeGen/MIR/X86/instr-pcsections.mir | 2 +-
.../MIR/X86/instructions-debug-location.mir | 14 +-
.../test/CodeGen/MIR/X86/machine-metadata.mir | 36 +-
llvm/test/CodeGen/MIR/X86/mem-cache-hint.mir | 4 +-
llvm/test/CodeGen/MIR/X86/memory-operands.mir | 10 +-
.../CodeGen/MIR/X86/metadata-operands.mir | 2 +-
llvm/test/CodeGen/MIR/X86/pr38773.mir | 4 +-
.../MIR/X86/stack-object-debug-info.mir | 4 +-
.../X86/win64-eh-unwindv2-too-many-instr.mir | 10 +-
.../AArch64/no-dbg-value-after-terminator.mir | 2 +-
.../DebugInfo/MIR/X86/merge-inline-loc1.mir | 4 +-
.../DebugInfo/MIR/X86/merge-inline-loc2.mir | 4 +-
.../X86/branch-folder-dbg-after-end.mir | 5 +-
.../legacy-callgraph-scc-pass-printer.ll | 13 +-
.../print-changed-persistent-metadata-ids.ll | 77 ++++
.../Other/print-persistent-metadata-ids.ll | 94 +++++
.../Inputs/loop-distribute.ll.expected | 6 +-
.../IR/01-ir-print-basic-details.test | 22 +-
.../IR/01-ir-select-logical-elements.test | 16 +-
.../IR/02-ir-logical-lines.test | 4 +-
.../IR/06-ir-full-logical-view.test | 22 +-
llvm/tools/llvm-dis/llvm-dis.cpp | 1 +
llvm/tools/llvm-extract/llvm-extract.cpp | 6 +-
llvm/tools/llvm-link/llvm-link.cpp | 1 +
llvm/tools/llvm-reduce/ReducerWorkItem.cpp | 9 +-
llvm/tools/llvm-split/llvm-split.cpp | 7 +-
llvm/tools/llvm-stress/llvm-stress.cpp | 1 +
llvm/tools/opt/NewPMDriver.cpp | 3 +-
llvm/tools/opt/optdriver.cpp | 7 +-
.../verify-uselistorder.cpp | 9 +-
llvm/unittests/AsmParser/AsmParserTest.cpp | 33 ++
llvm/unittests/IR/AsmWriterTest.cpp | 124 ++++++
llvm/unittests/IR/MetadataTest.cpp | 18 +-
llvm/unittests/IR/ModuleTest.cpp | 55 +++
llvm/unittests/MIR/MachineMetadata.cpp | 113 +++--
mlir/lib/Target/LLVMIR/ConvertToLLVMIR.cpp | 1 +
.../Target/LLVMIR/Import/import-failure.ll | 24 +-
polly/test/ForwardOpTree/atax.ll | 16 +-
polly/test/ForwardOpTree/jacobi-1d.ll | 8 +-
...eserve-equiv-class-order-in-basic_block.ll | 4 +-
.../stmt_split_exit_of_region_stmt.ll | 2 +-
.../ScopInfo/stmt_split_no_after_split.ll | 2 +-
.../test/ScopInfo/stmt_split_no_dependence.ll | 2 +-
.../stmt_split_phi_in_beginning_bb.ll | 2 +-
polly/test/ScopInfo/stmt_split_phi_in_stmt.ll | 2 +-
.../ScopInfo/stmt_split_scalar_dependence.ll | 2 +-
polly/test/ScopInfo/stmt_split_within_loop.ll | 2 +-
79 files changed, 1206 insertions(+), 518 deletions(-)
create mode 100644 llvm/test/Other/print-changed-persistent-metadata-ids.ll
create mode 100644 llvm/test/Other/print-persistent-metadata-ids.ll
diff --git a/clang/lib/CodeGen/BackendUtil.cpp b/clang/lib/CodeGen/BackendUtil.cpp
index 6aa6bc1bd41e8..086f886be4390 100644
--- a/clang/lib/CodeGen/BackendUtil.cpp
+++ b/clang/lib/CodeGen/BackendUtil.cpp
@@ -1166,7 +1166,8 @@ void EmitAssemblyHelper::RunOptimizationPipeline(
*OS, ThinLinkOS ? &ThinLinkOS->os() : nullptr));
} else if (Action == Backend_EmitLL) {
MPM.addPass(PrintModulePass(*OS, "", CodeGenOpts.EmitLLVMUseLists,
- /*EmitLTOSummary=*/true));
+ /*EmitLTOSummary=*/true,
+ /*ShouldRenumberMetadata=*/true));
}
} else {
// Emit a module summary by default for Regular LTO except for ld64
@@ -1184,7 +1185,8 @@ void EmitAssemblyHelper::RunOptimizationPipeline(
EmitLTOSummary));
} else if (Action == Backend_EmitLL) {
MPM.addPass(PrintModulePass(*OS, "", CodeGenOpts.EmitLLVMUseLists,
- EmitLTOSummary));
+ EmitLTOSummary,
+ /*ShouldRenumberMetadata=*/true));
}
}
@@ -1456,6 +1458,7 @@ runThinLTOBackend(CompilerInstance &CI, ModuleSummaryIndex *CombinedIndex,
break;
case Backend_EmitLL:
Conf.PreCodeGenModuleHook = [&](size_t Task, const llvm::Module &Mod) {
+ M->renumberMetadataForAssembly();
M->print(*OS, nullptr, CGOpts.EmitLLVMUseLists);
return false;
};
diff --git a/clang/tools/cir-translate/cir-translate.cpp b/clang/tools/cir-translate/cir-translate.cpp
index 4452741d7433e..a58512e3fca22 100644
--- a/clang/tools/cir-translate/cir-translate.cpp
+++ b/clang/tools/cir-translate/cir-translate.cpp
@@ -165,6 +165,7 @@ void registerToLLVMTranslation() {
enableOpenMP);
if (!llvmModule)
return mlir::failure();
+ llvmModule->renumberMetadataForAssembly();
llvmModule->print(output, nullptr);
return mlir::success();
},
diff --git a/clang/tools/clang-fuzzer/handle-llvm/handle_llvm.cpp b/clang/tools/clang-fuzzer/handle-llvm/handle_llvm.cpp
index 942e35c30e19f..1c745bffe00c0 100644
--- a/clang/tools/clang-fuzzer/handle-llvm/handle_llvm.cpp
+++ b/clang/tools/clang-fuzzer/handle-llvm/handle_llvm.cpp
@@ -103,7 +103,10 @@ static void RunOptimizationPasses(raw_ostream &OS, Module &M,
PB.crossRegisterProxies(LAM, FAM, CGAM, MAM);
ModulePassManager MPM = PB.buildPerModuleDefaultPipeline(OL);
- MPM.addPass(PrintModulePass(OS));
+ MPM.addPass(PrintModulePass(OS, /*Banner=*/"",
+ /*ShouldPreserveUseListOrder=*/false,
+ /*EmitSummaryIndex=*/false,
+ /*ShouldRenumberMetadata=*/true));
MPM.run(M, MAM);
}
diff --git a/clang/tools/clang-import-test/clang-import-test.cpp b/clang/tools/clang-import-test/clang-import-test.cpp
index 8e83687d3e96a..bcb5d2bdb8952 100644
--- a/clang/tools/clang-import-test/clang-import-test.cpp
+++ b/clang/tools/clang-import-test/clang-import-test.cpp
@@ -338,8 +338,10 @@ llvm::Expected<CIAndOrigins> Parse(const std::string &Path,
if (llvm::Error PE = ParseSource(Path, CI.getCompilerInstance(), Consumers))
return std::move(PE);
CI.getDiagnosticClient().EndSourceFile();
- if (ShouldDumpIR)
+ if (ShouldDumpIR) {
+ CG.GetModule()->renumberMetadataForAssembly();
CG.GetModule()->print(llvm::outs(), nullptr);
+ }
if (CI.getDiagnosticClient().getNumErrors())
return llvm::make_error<llvm::StringError>(
"Errors occurred while parsing the expression.", std::error_code());
diff --git a/flang/include/flang/Optimizer/CodeGen/CodeGen.h b/flang/include/flang/Optimizer/CodeGen/CodeGen.h
index 1d36788fb84f9..6ef575f5391d9 100644
--- a/flang/include/flang/Optimizer/CodeGen/CodeGen.h
+++ b/flang/include/flang/Optimizer/CodeGen/CodeGen.h
@@ -90,9 +90,11 @@ using LLVMIRLoweringPrinter =
/// Convert the LLVM IR dialect to LLVM-IR proper
std::unique_ptr<mlir::Pass> createLLVMDialectToLLVMPass(
- llvm::raw_ostream &output,
- LLVMIRLoweringPrinter printer =
- [](llvm::Module &m, llvm::raw_ostream &out) { m.print(out, nullptr); });
+ llvm::raw_ostream &output, LLVMIRLoweringPrinter printer =
+ [](llvm::Module &m, llvm::raw_ostream &out) {
+ m.renumberMetadataForAssembly();
+ m.print(out, nullptr);
+ });
/// Populate the given list with patterns that convert from FIR to LLVM.
void populateFIRToLLVMConversionPatterns(
diff --git a/flang/lib/Frontend/FrontendActions.cpp b/flang/lib/Frontend/FrontendActions.cpp
index 8a2d1a6c2e2a2..a5b15cc3e334f 100644
--- a/flang/lib/Frontend/FrontendActions.cpp
+++ b/flang/lib/Frontend/FrontendActions.cpp
@@ -1092,9 +1092,9 @@ void CodeGenAction::runOptimizationPipeline(llvm::raw_pwrite_stream &os) {
os, /*ShouldPreserveUseListOrder=*/false, emitSummary));
}
} else if (action == BackendActionTy::Backend_EmitLL) {
- mpm.addPass(llvm::PrintModulePass(os, /*Banner=*/"",
- /*ShouldPreserveUseListOrder=*/false,
- emitSummary));
+ mpm.addPass(llvm::PrintModulePass(
+ os, /*Banner=*/"", /*ShouldPreserveUseListOrder=*/false, emitSummary,
+ /*ShouldRenumberMetadata=*/true));
}
}
diff --git a/llvm/include/llvm/CodeGen/MachineModuleSlotTracker.h b/llvm/include/llvm/CodeGen/MachineModuleSlotTracker.h
index 666b3caf67e27..fd52ce7027c9b 100644
--- a/llvm/include/llvm/CodeGen/MachineModuleSlotTracker.h
+++ b/llvm/include/llvm/CodeGen/MachineModuleSlotTracker.h
@@ -10,12 +10,12 @@
#define LLVM_CODEGEN_MACHINEMODULESLOTTRACKER_H
#include "llvm/ADT/STLFunctionalExtras.h"
+#include "llvm/ADT/SmallVector.h"
#include "llvm/IR/ModuleSlotTracker.h"
#include "llvm/Support/Compiler.h"
namespace llvm {
-class AbstractSlotTrackerStorage;
class Function;
class MachineModuleInfo;
class MachineFunction;
@@ -24,23 +24,18 @@ class Module;
using MFGetterFnT = function_ref<MachineFunction *(const Function &)>;
class LLVM_ABI MachineModuleSlotTracker : public ModuleSlotTracker {
- const Function &TheFunction;
const MachineFunction *TheMF;
- unsigned MDNStartSlot = 0, MDNEndSlot = 0;
+ MachineMDNodeListType MachineMDNodes;
- void processMachineFunctionMetadata(AbstractSlotTrackerStorage *AST,
- const MachineFunction &MF);
- void processMachineModule(AbstractSlotTrackerStorage *AST, const Module *M,
- bool ShouldInitializeAllMetadata);
- void processMachineFunction(AbstractSlotTrackerStorage *AST,
- const Function *F,
- bool ShouldInitializeAllMetadata);
+ void collectMachineFunctionMetadata(SmallVectorImpl<const MDNode *> &Metadata,
+ const MachineFunction &MF) const;
public:
- MachineModuleSlotTracker(MFGetterFnT Fn, const MachineFunction *MF,
- bool ShouldInitializeAllMetadata = true);
+ MachineModuleSlotTracker(MFGetterFnT Fn, const MachineFunction *MF);
~MachineModuleSlotTracker() override;
+ /// Renumber module and machine metadata for canonical MIR output.
+ void renumberMetadataForAssembly();
void collectMachineMDNodes(MachineMDNodeListType &L) const;
};
diff --git a/llvm/include/llvm/IR/IRPrintingPasses.h b/llvm/include/llvm/IR/IRPrintingPasses.h
index 1b2d38d6190e9..0eb60f55f74c3 100644
--- a/llvm/include/llvm/IR/IRPrintingPasses.h
+++ b/llvm/include/llvm/IR/IRPrintingPasses.h
@@ -31,6 +31,11 @@ LLVM_ABI ModulePass *
createPrintModulePass(raw_ostream &OS, const std::string &Banner = "",
bool ShouldPreserveUseListOrder = false);
+LLVM_ABI ModulePass *createPrintModulePass(raw_ostream &OS,
+ const std::string &Banner,
+ bool ShouldPreserveUseListOrder,
+ bool ShouldRenumberMetadata);
+
/// Create and return a pass that prints functions to the specified
/// \c raw_ostream as they are processed.
LLVM_ABI FunctionPass *createPrintFunctionPass(raw_ostream &OS,
diff --git a/llvm/include/llvm/IR/Metadata.h b/llvm/include/llvm/IR/Metadata.h
index 5b458fa14f0b1..a53cb63ed59cf 100644
--- a/llvm/include/llvm/IR/Metadata.h
+++ b/llvm/include/llvm/IR/Metadata.h
@@ -1079,11 +1079,11 @@ class MDNode : public Metadata {
/// Explicity set alignment because bitfields by default have an
/// alignment of 1 on z/OS.
struct alignas(alignof(size_t)) Header {
- size_t IsResizable : 1;
- size_t IsLarge : 1;
- size_t SmallSize : 4;
- size_t SmallNumOps : 4;
- size_t : sizeof(size_t) * CHAR_BIT - 10;
+ uint32_t IsResizable : 1;
+ uint32_t IsLarge : 1;
+ uint32_t SmallSize : 4;
+ uint32_t SmallNumOps : 4;
+ uint32_t MetadataPrintID;
unsigned NumUnresolved = 0;
using LargeStorageVector = SmallVector<MDOperand, 0>;
diff --git a/llvm/include/llvm/IR/Module.h b/llvm/include/llvm/IR/Module.h
index 6090644f7a12f..1b22ac79f2d51 100644
--- a/llvm/include/llvm/IR/Module.h
+++ b/llvm/include/llvm/IR/Module.h
@@ -987,6 +987,11 @@ class LLVM_ABI Module {
bool ShouldPreserveUseListOrder = false,
bool IsForDebug = false) const;
+ /// Renumber the IDs stored in metadata nodes into canonical assembly order.
+ /// This mutates the IDs and should only be used immediately before final
+ /// assembly output.
+ void renumberMetadataForAssembly();
+
/// Dump the module to stderr (for debugging).
void dump() const;
diff --git a/llvm/include/llvm/IR/ModuleSlotTracker.h b/llvm/include/llvm/IR/ModuleSlotTracker.h
index a3882a81e1177..1e08db6dbdb0a 100644
--- a/llvm/include/llvm/IR/ModuleSlotTracker.h
+++ b/llvm/include/llvm/IR/ModuleSlotTracker.h
@@ -9,11 +9,12 @@
#ifndef LLVM_IR_MODULESLOTTRACKER_H
#define LLVM_IR_MODULESLOTTRACKER_H
+#include "llvm/ADT/ArrayRef.h"
+#include "llvm/ADT/SmallVector.h"
#include "llvm/Support/Compiler.h"
#include <functional>
#include <memory>
#include <utility>
-#include <vector>
namespace llvm {
@@ -28,8 +29,6 @@ class LLVM_ABI AbstractSlotTrackerStorage {
public:
virtual ~AbstractSlotTrackerStorage();
- virtual unsigned getNextMetadataSlot() = 0;
-
virtual void createMetadataSlot(const MDNode *) = 0;
virtual int getMetadataSlot(const MDNode *) = 0;
};
@@ -43,20 +42,37 @@ class LLVM_ABI AbstractSlotTrackerStorage {
/// If the IR changes from underneath \a ModuleSlotTracker, strings like
/// "<badref>" will be printed, or, worse, the wrong slots entirely.
class LLVM_ABI ModuleSlotTracker {
+public:
+ using MachineMDNodeListType =
+ SmallVector<std::pair<unsigned, const MDNode *>, 0>;
+
+private:
/// Storage for a slot tracker.
std::unique_ptr<SlotTracker> MachineStorage;
bool ShouldCreateStorage = false;
- bool ShouldInitializeAllMetadata = false;
const Module *M = nullptr;
const Function *F = nullptr;
SlotTracker *Machine = nullptr;
- std::function<void(AbstractSlotTrackerStorage *, const Module *, bool)>
+ std::function<void(AbstractSlotTrackerStorage *, const Module *)>
ProcessModuleHookFn;
- std::function<void(AbstractSlotTrackerStorage *, const Function *, bool)>
+ std::function<void(AbstractSlotTrackerStorage *, const Function *)>
ProcessFunctionHookFn;
+protected:
+ /// Renumber module metadata and then additional metadata for canonical
+ /// assembly output.
+ void renumberMetadataForAssembly(
+ ArrayRef<const MDNode *> AdditionalMetadata,
+ MachineMDNodeListType *AdditionalMetadataNodes = nullptr) const;
+
+ /// Collect metadata reachable from \p AdditionalMetadata but not from the
+ /// module.
+ void collectAdditionalMetadata(
+ ArrayRef<const MDNode *> AdditionalMetadata,
+ MachineMDNodeListType &AdditionalMetadataNodes) const;
+
public:
/// Wrap a preinitialized SlotTracker.
ModuleSlotTracker(SlotTracker &Machine, const Module *M,
@@ -64,13 +80,8 @@ class LLVM_ABI ModuleSlotTracker {
/// Construct a slot tracker from a module.
///
- /// If \a M is \c nullptr, uses a null slot tracker. Otherwise, initializes
- /// a slot tracker, and initializes all metadata slots. \c
- /// ShouldInitializeAllMetadata defaults to true because this is expected to
- /// be shared between multiple callers, and otherwise MDNode references will
- /// not match up.
- explicit ModuleSlotTracker(const Module *M,
- bool ShouldInitializeAllMetadata = true);
+ /// If \a M is \c nullptr, uses a null slot tracker.
+ explicit ModuleSlotTracker(const Module *M);
/// Destructor to clean up storage.
virtual ~ModuleSlotTracker();
@@ -95,14 +106,11 @@ class LLVM_ABI ModuleSlotTracker {
int getLocalSlot(const Value *V);
void setProcessHook(
- std::function<void(AbstractSlotTrackerStorage *, const Module *, bool)>);
- void setProcessHook(std::function<void(AbstractSlotTrackerStorage *,
- const Function *, bool)>);
-
- using MachineMDNodeListType =
- std::vector<std::pair<unsigned, const MDNode *>>;
+ std::function<void(AbstractSlotTrackerStorage *, const Module *)>);
+ void setProcessHook(
+ std::function<void(AbstractSlotTrackerStorage *, const Function *)>);
- void collectMDNodes(MachineMDNodeListType &L, unsigned LB, unsigned UB) const;
+ void collectMDNodes(MachineMDNodeListType &L) const;
};
} // end namespace llvm
diff --git a/llvm/include/llvm/IRPrinter/IRPrintingPasses.h b/llvm/include/llvm/IRPrinter/IRPrintingPasses.h
index e574d94ca2f22..56fdd94187dd3 100644
--- a/llvm/include/llvm/IRPrinter/IRPrintingPasses.h
+++ b/llvm/include/llvm/IRPrinter/IRPrintingPasses.h
@@ -35,13 +35,16 @@ class PrintModulePass : public RequiredPassInfoMixin<PrintModulePass> {
std::string Banner;
bool ShouldPreserveUseListOrder;
bool EmitSummaryIndex;
+ bool ShouldRenumberMetadata;
public:
LLVM_ABI PrintModulePass();
+ /// If \p ShouldRenumberMetadata, renumber metadata for canonical assembly
+ /// output before printing.
LLVM_ABI PrintModulePass(raw_ostream &OS, const std::string &Banner = "",
bool ShouldPreserveUseListOrder = false,
- bool EmitSummaryIndex = false);
-
+ bool EmitSummaryIndex = false,
+ bool ShouldRenumberMetadata = false);
LLVM_ABI PreservedAnalyses run(Module &M, AnalysisManager<Module> &);
};
diff --git a/llvm/lib/CodeGen/MIRParser/MIParser.cpp b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
index a9caf95a32ef9..ef4927e2c4ee3 100644
--- a/llvm/lib/CodeGen/MIRParser/MIParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
@@ -360,7 +360,7 @@ static void mapValueToSlot(const Value *V, ModuleSlotTracker &MST,
/// Creates the mapping from slot numbers to function's unnamed IR values.
static void initSlots2Values(const Function &F,
DenseMap<unsigned, const Value *> &Slots2Values) {
- ModuleSlotTracker MST(F.getParent(), /*ShouldInitializeAllMetadata=*/false);
+ ModuleSlotTracker MST(F.getParent());
MST.incorporateFunction(F);
for (const auto &Arg : F.args())
mapValueToSlot(&Arg, MST, Slots2Values);
@@ -3813,7 +3813,7 @@ bool MIParser::parseMMRA(MDNode *&Node) {
static void initSlots2BasicBlocks(
const Function &F,
DenseMap<unsigned, const BasicBlock *> &Slots2BasicBlocks) {
- ModuleSlotTracker MST(F.getParent(), /*ShouldInitializeAllMetadata=*/false);
+ ModuleSlotTracker MST(F.getParent());
MST.incorporateFunction(F);
for (const auto &BB : F) {
if (BB.hasName())
diff --git a/llvm/lib/CodeGen/MIRPrintingPass.cpp b/llvm/lib/CodeGen/MIRPrintingPass.cpp
index f5e455a520151..5f6537cdd8c13 100644
--- a/llvm/lib/CodeGen/MIRPrintingPass.cpp
+++ b/llvm/lib/CodeGen/MIRPrintingPass.cpp
@@ -12,16 +12,20 @@
//===----------------------------------------------------------------------===//
#include "llvm/CodeGen/MIRPrinter.h"
+#include "llvm/CodeGen/MachineFunctionAnalysis.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
+#include "llvm/CodeGen/MachineModuleSlotTracker.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/VirtRegMap.h"
#include "llvm/IR/Function.h"
+#include "llvm/IR/Module.h"
#include "llvm/InitializePasses.h"
using namespace llvm;
PreservedAnalyses PrintMIRPreparePass::run(Module &M, ModuleAnalysisManager &) {
+ M.renumberMetadataForAssembly();
printMIR(OS, M);
return PreservedAnalyses::all();
}
@@ -32,6 +36,14 @@ PreservedAnalyses PrintMIRPass::run(MachineFunction &MF,
.getManager();
const VirtRegMap *VRM = MFAM.getCachedResult<VirtRegMapAnalysis>(MF);
+ MachineModuleSlotTracker MST(
+ [&](const Function &F) {
+ return &FAM.getResult<MachineFunctionAnalysis>(
+ const_cast<Function &>(F))
+ .getMF();
+ },
+ &MF);
+ MST.renumberMetadataForAssembly();
printMIR(OS, FAM, MF, VRM);
return PreservedAnalyses::all();
}
@@ -67,12 +79,16 @@ struct MIRPrintingPass : public MachineFunctionPass {
if (auto *W = getAnalysisIfAvailable<VirtRegMapWrapperLegacy>())
VRM = &W->getVRM();
+ MachineModuleSlotTracker MST(
+ [&](const Function &F) { return MMI->getMachineFunction(F); }, &MF);
+ MST.renumberMetadataForAssembly();
printMIR(StrOS, *MMI, MF, VRM);
MachineFunctions.append(Str);
return false;
}
bool doFinalization(Module &M) override {
+ M.renumberMetadataForAssembly();
printMIR(OS, M);
OS << MachineFunctions;
return false;
diff --git a/llvm/lib/CodeGen/MachineBasicBlock.cpp b/llvm/lib/CodeGen/MachineBasicBlock.cpp
index 08a67935b52f5..b58a11efd103c 100644
--- a/llvm/lib/CodeGen/MachineBasicBlock.cpp
+++ b/llvm/lib/CodeGen/MachineBasicBlock.cpp
@@ -503,7 +503,7 @@ void MachineBasicBlock::printName(raw_ostream &os, unsigned printNameFlags,
if (moduleSlotTracker) {
slot = moduleSlotTracker->getLocalSlot(bb);
} else if (bb->getParent()) {
- ModuleSlotTracker tmpTracker(bb->getModule(), false);
+ ModuleSlotTracker tmpTracker(bb->getModule());
tmpTracker.incorporateFunction(*bb->getParent());
slot = tmpTracker.getLocalSlot(bb);
}
diff --git a/llvm/lib/CodeGen/MachineModuleSlotTracker.cpp b/llvm/lib/CodeGen/MachineModuleSlotTracker.cpp
index b95289f3304ad..6a0043f0b4c92 100644
--- a/llvm/lib/CodeGen/MachineModuleSlotTracker.cpp
+++ b/llvm/lib/CodeGen/MachineModuleSlotTracker.cpp
@@ -16,97 +16,77 @@
using namespace llvm;
-void MachineModuleSlotTracker::processMachineFunctionMetadata(
- AbstractSlotTrackerStorage *AST, const MachineFunction &MF) {
- // Create metadata created within the backend.
+void MachineModuleSlotTracker::collectMachineFunctionMetadata(
+ SmallVectorImpl<const MDNode *> &Metadata,
+ const MachineFunction &MF) const {
for (const MachineBasicBlock &MBB : MF)
for (const MachineInstr &MI : MBB.instrs()) {
if (DebugLoc DL = MI.getDebugLoc())
- AST->createMetadataSlot(DL.getAsMDNode());
+ Metadata.push_back(DL.getAsMDNode());
if (MDNode *N = MI.getHeapAllocMarker())
- AST->createMetadataSlot(N);
+ Metadata.push_back(N);
if (MDNode *N = MI.getPCSections())
- AST->createMetadataSlot(N);
+ Metadata.push_back(N);
if (MDNode *N = MI.getMMRAMetadata())
- AST->createMetadataSlot(N);
+ Metadata.push_back(N);
for (const MachineOperand &MO : MI.operands())
if (MO.isMetadata())
- AST->createMetadataSlot(MO.getMetadata());
+ Metadata.push_back(MO.getMetadata());
for (const MachineMemOperand *MMO : MI.memoperands()) {
AAMDNodes AAInfo = MMO->getAAInfo();
if (AAInfo.TBAA)
- AST->createMetadataSlot(AAInfo.TBAA);
+ Metadata.push_back(AAInfo.TBAA);
if (AAInfo.TBAAStruct)
- AST->createMetadataSlot(AAInfo.TBAAStruct);
+ Metadata.push_back(AAInfo.TBAAStruct);
if (AAInfo.Scope)
- AST->createMetadataSlot(AAInfo.Scope);
+ Metadata.push_back(AAInfo.Scope);
if (AAInfo.NoAlias)
- AST->createMetadataSlot(AAInfo.NoAlias);
+ Metadata.push_back(AAInfo.NoAlias);
if (AAInfo.NoAliasAddrSpace)
- AST->createMetadataSlot(AAInfo.NoAliasAddrSpace);
+ Metadata.push_back(AAInfo.NoAliasAddrSpace);
if (const MDNode *N = MMO->getRanges())
- AST->createMetadataSlot(N);
+ Metadata.push_back(N);
if (const MDNode *N = MMO->getMemCacheHint())
- AST->createMetadataSlot(N);
+ Metadata.push_back(N);
}
}
for (const MachineFunction::VariableDbgInfo &DebugVar :
MF.getVariableDbgInfo()) {
- AST->createMetadataSlot(DebugVar.Var);
- AST->createMetadataSlot(DebugVar.Expr);
- AST->createMetadataSlot(DebugVar.Loc);
+ Metadata.push_back(DebugVar.Var);
+ Metadata.push_back(DebugVar.Expr);
+ Metadata.push_back(DebugVar.Loc);
}
}
-void MachineModuleSlotTracker::processMachineModule(
- AbstractSlotTrackerStorage *AST, const Module *M,
- bool ShouldInitializeAllMetadata) {
- if (ShouldInitializeAllMetadata) {
- for (const Function &F : *M) {
- if (&F != &TheFunction)
- continue;
- MDNStartSlot = AST->getNextMetadataSlot();
- if (TheMF)
- processMachineFunctionMetadata(AST, *TheMF);
- MDNEndSlot = AST->getNextMetadataSlot();
- break;
- }
- }
+void MachineModuleSlotTracker::collectMachineMDNodes(
+ MachineMDNodeListType &L) const {
+ L.insert(L.end(), MachineMDNodes.begin(), MachineMDNodes.end());
}
-void MachineModuleSlotTracker::processMachineFunction(
- AbstractSlotTrackerStorage *AST, const Function *F,
- bool ShouldInitializeAllMetadata) {
- if (!ShouldInitializeAllMetadata && F == &TheFunction) {
- MDNStartSlot = AST->getNextMetadataSlot();
- if (TheMF)
- processMachineFunctionMetadata(AST, *TheMF);
- MDNEndSlot = AST->getNextMetadataSlot();
- }
-}
+void MachineModuleSlotTracker::renumberMetadataForAssembly() {
+ if (!TheMF)
+ return;
-void MachineModuleSlotTracker::collectMachineMDNodes(
- MachineMDNodeListType &L) const {
- collectMDNodes(L, MDNStartSlot, MDNEndSlot);
+ SmallVector<const MDNode *, 16> Metadata;
+ collectMachineFunctionMetadata(Metadata, *TheMF);
+ MachineMDNodes.clear();
+ ModuleSlotTracker::renumberMetadataForAssembly(Metadata, &MachineMDNodes);
}
-MachineModuleSlotTracker::MachineModuleSlotTracker(
- MFGetterFnT Fn, const MachineFunction *MF, bool ShouldInitializeAllMetadata)
- : ModuleSlotTracker(MF->getFunction().getParent(),
- ShouldInitializeAllMetadata),
- TheFunction(MF->getFunction()), TheMF(Fn(MF->getFunction())) {
- setProcessHook([this](AbstractSlotTrackerStorage *AST, const Module *M,
- bool ShouldInitializeAllMetadata) {
- this->processMachineModule(AST, M, ShouldInitializeAllMetadata);
- });
- setProcessHook([this](AbstractSlotTrackerStorage *AST, const Function *F,
- bool ShouldInitializeAllMetadata) {
- this->processMachineFunction(AST, F, ShouldInitializeAllMetadata);
- });
+MachineModuleSlotTracker::MachineModuleSlotTracker(MFGetterFnT Fn,
+ const MachineFunction *MF)
+ : ModuleSlotTracker(MF->getFunction().getParent()),
+ TheMF(Fn(MF->getFunction())) {
+ if (!TheMF)
+ return;
+
+ SmallVector<const MDNode *, 16> Metadata;
+ collectMachineFunctionMetadata(Metadata, *TheMF);
+ collectAdditionalMetadata(Metadata, MachineMDNodes);
}
MachineModuleSlotTracker::~MachineModuleSlotTracker() = default;
diff --git a/llvm/lib/CodeGen/MachineOperand.cpp b/llvm/lib/CodeGen/MachineOperand.cpp
index 3067f6e636130..af1487038de59 100644
--- a/llvm/lib/CodeGen/MachineOperand.cpp
+++ b/llvm/lib/CodeGen/MachineOperand.cpp
@@ -529,7 +529,7 @@ static void printIRBlockReference(raw_ostream &OS, const BasicBlock &BB,
if (F == MST.getCurrentFunction()) {
Slot = MST.getLocalSlot(&BB);
} else if (const Module *M = F->getParent()) {
- ModuleSlotTracker CustomMST(M, /*ShouldInitializeAllMetadata=*/false);
+ ModuleSlotTracker CustomMST(M);
CustomMST.incorporateFunction(*F);
Slot = CustomMST.getLocalSlot(&BB);
}
diff --git a/llvm/lib/IR/AsmWriter.cpp b/llvm/lib/IR/AsmWriter.cpp
index 77b302c24fe31..c4868d7f87476 100644
--- a/llvm/lib/IR/AsmWriter.cpp
+++ b/llvm/lib/IR/AsmWriter.cpp
@@ -15,11 +15,13 @@
//
//===----------------------------------------------------------------------===//
+#include "LLVMContextImpl.h"
#include "llvm/ADT/APFloat.h"
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/STLExtras.h"
+#include "llvm/ADT/STLFunctionalExtras.h"
#include "llvm/ADT/SetVector.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallString.h"
@@ -799,11 +801,11 @@ class llvm::SlotTracker : public AbstractSlotTrackerStorage {
/// TheFunction - The function for which we are holding slot numbers.
const Function* TheFunction = nullptr;
bool FunctionProcessed = false;
- bool ShouldInitializeAllMetadata;
+ bool ShouldTrackMetadataDefinitions;
- std::function<void(AbstractSlotTrackerStorage *, const Module *, bool)>
+ std::function<void(AbstractSlotTrackerStorage *, const Module *)>
ProcessModuleHookFn;
- std::function<void(AbstractSlotTrackerStorage *, const Function *, bool)>
+ std::function<void(AbstractSlotTrackerStorage *, const Function *)>
ProcessFunctionHookFn;
/// The summary index for which we are holding slot numbers.
@@ -818,9 +820,7 @@ class llvm::SlotTracker : public AbstractSlotTrackerStorage {
unsigned fNext = 0;
/// mdnMap - Map for MDNodes.
- DenseMap<const MDNode*, unsigned> mdnMap;
- unsigned mdnNext = 0;
-
+ DenseMap<const MDNode *, unsigned> mdnMap;
/// asMap - The slot map for attribute sets.
DenseMap<AttributeSet, unsigned> asMap;
unsigned asNext = 0;
@@ -845,19 +845,12 @@ class llvm::SlotTracker : public AbstractSlotTrackerStorage {
public:
/// Construct from a module.
///
- /// If \c ShouldInitializeAllMetadata, initializes all metadata in all
- /// functions, giving correct numbering for metadata referenced only from
- /// within a function (even if no functions have been initialized).
explicit SlotTracker(const Module *M,
- bool ShouldInitializeAllMetadata = false);
+ bool ShouldTrackMetadataDefinitions = false);
/// Construct from a function, starting out in incorp state.
///
- /// If \c ShouldInitializeAllMetadata, initializes all metadata in all
- /// functions, giving correct numbering for metadata referenced only from
- /// within a function (even if no functions have been initialized).
- explicit SlotTracker(const Function *F,
- bool ShouldInitializeAllMetadata = false);
+ explicit SlotTracker(const Function *F);
/// Construct from a module summary index.
explicit SlotTracker(const ModuleSummaryIndex *Index);
@@ -868,11 +861,9 @@ class llvm::SlotTracker : public AbstractSlotTrackerStorage {
~SlotTracker() override = default;
void setProcessHook(
- std::function<void(AbstractSlotTrackerStorage *, const Module *, bool)>);
- void setProcessHook(std::function<void(AbstractSlotTrackerStorage *,
- const Function *, bool)>);
-
- unsigned getNextMetadataSlot() override { return mdnNext; }
+ std::function<void(AbstractSlotTrackerStorage *, const Module *)>);
+ void setProcessHook(
+ std::function<void(AbstractSlotTrackerStorage *, const Function *)>);
void createMetadataSlot(const MDNode *N) override;
@@ -929,7 +920,7 @@ class llvm::SlotTracker : public AbstractSlotTrackerStorage {
/// CreateModuleSlot - Insert the specified GlobalValue* into the slot table.
void CreateModuleSlot(const GlobalValue *V);
- /// CreateMetadataSlot - Insert the specified MDNode* into the slot table.
+ /// Record a metadata definition and the metadata nodes referenced by it.
void CreateMetadataSlot(const MDNode *N);
/// CreateFunctionSlot - Insert the specified Value* into the slot table.
@@ -951,28 +942,14 @@ class llvm::SlotTracker : public AbstractSlotTrackerStorage {
/// Add all of the functions arguments, basic blocks, and instructions.
void processFunction();
-
- /// Add the metadata directly attached to a GlobalObject.
- void processGlobalObjectMetadata(const GlobalObject &GO);
-
- /// Add all of the metadata from a function.
- void processFunctionMetadata(const Function &F);
-
- /// Add all of the metadata from an instruction.
- void processInstructionMetadata(const Instruction &I);
-
- /// Add all of the metadata from a DbgRecord.
- void processDbgRecordMetadata(const DbgRecord &DVR);
};
ModuleSlotTracker::ModuleSlotTracker(SlotTracker &Machine, const Module *M,
const Function *F)
: M(M), F(F), Machine(&Machine) {}
-ModuleSlotTracker::ModuleSlotTracker(const Module *M,
- bool ShouldInitializeAllMetadata)
- : ShouldCreateStorage(M),
- ShouldInitializeAllMetadata(ShouldInitializeAllMetadata), M(M) {}
+ModuleSlotTracker::ModuleSlotTracker(const Module *M)
+ : ShouldCreateStorage(M), M(M) {}
ModuleSlotTracker::~ModuleSlotTracker() = default;
@@ -981,8 +958,7 @@ SlotTracker *ModuleSlotTracker::getMachine() {
return Machine;
ShouldCreateStorage = false;
- MachineStorage =
- std::make_unique<SlotTracker>(M, ShouldInitializeAllMetadata);
+ MachineStorage = std::make_unique<SlotTracker>(M);
Machine = MachineStorage.get();
if (ProcessModuleHookFn)
Machine->setProcessHook(ProcessModuleHookFn);
@@ -1011,14 +987,12 @@ int ModuleSlotTracker::getLocalSlot(const Value *V) {
}
void ModuleSlotTracker::setProcessHook(
- std::function<void(AbstractSlotTrackerStorage *, const Module *, bool)>
- Fn) {
+ std::function<void(AbstractSlotTrackerStorage *, const Module *)> Fn) {
ProcessModuleHookFn = std::move(Fn);
}
void ModuleSlotTracker::setProcessHook(
- std::function<void(AbstractSlotTrackerStorage *, const Function *, bool)>
- Fn) {
+ std::function<void(AbstractSlotTrackerStorage *, const Function *)> Fn) {
ProcessFunctionHookFn = std::move(Fn);
}
@@ -1056,17 +1030,19 @@ static SlotTracker *createSlotTracker(const Value *V) {
// Module level constructor. Causes the contents of the Module (sans functions)
// to be added to the slot table.
-SlotTracker::SlotTracker(const Module *M, bool ShouldInitializeAllMetadata)
- : TheModule(M), ShouldInitializeAllMetadata(ShouldInitializeAllMetadata) {}
+SlotTracker::SlotTracker(const Module *M, bool ShouldTrackMetadataDefinitions)
+ : TheModule(M),
+ ShouldTrackMetadataDefinitions(ShouldTrackMetadataDefinitions) {}
// Function level constructor. Causes the contents of the Module and the one
// function provided to be added to the slot table.
-SlotTracker::SlotTracker(const Function *F, bool ShouldInitializeAllMetadata)
+SlotTracker::SlotTracker(const Function *F)
: TheModule(F ? F->getParent() : nullptr), TheFunction(F),
- ShouldInitializeAllMetadata(ShouldInitializeAllMetadata) {}
+ ShouldTrackMetadataDefinitions(false) {}
SlotTracker::SlotTracker(const ModuleSummaryIndex *Index)
- : TheModule(nullptr), ShouldInitializeAllMetadata(false), TheIndex(Index) {}
+ : TheModule(nullptr), ShouldTrackMetadataDefinitions(false),
+ TheIndex(Index) {}
inline void SlotTracker::initializeIfNeeded() {
if (TheModule) {
@@ -1095,7 +1071,6 @@ void SlotTracker::processModule() {
for (const GlobalVariable &Var : TheModule->globals()) {
if (!Var.hasName())
CreateModuleSlot(&Var);
- processGlobalObjectMetadata(Var);
auto Attrs = Var.getAttributes();
if (Attrs.hasAttributes())
CreateAttributeSetSlot(Attrs);
@@ -1109,13 +1084,6 @@ void SlotTracker::processModule() {
for (const GlobalIFunc &I : TheModule->ifuncs()) {
if (!I.hasName())
CreateModuleSlot(&I);
- processGlobalObjectMetadata(I);
- }
-
- // Add metadata used by named metadata.
- for (const NamedMDNode &NMD : TheModule->named_metadata()) {
- for (const MDNode *N : NMD.operands())
- CreateMetadataSlot(N);
}
for (const Function &F : *TheModule) {
@@ -1123,9 +1091,6 @@ void SlotTracker::processModule() {
// Add all the unnamed functions to the table.
CreateModuleSlot(&F);
- if (ShouldInitializeAllMetadata)
- processFunctionMetadata(F);
-
// Add all the function attributes to the table.
// FIXME: Add attributes of other objects?
AttributeSet FnAttrs = F.getAttributes().getFnAttrs();
@@ -1134,7 +1099,7 @@ void SlotTracker::processModule() {
}
if (ProcessModuleHookFn)
- ProcessModuleHookFn(this, TheModule, ShouldInitializeAllMetadata);
+ ProcessModuleHookFn(this, TheModule);
ST_DEBUG("end processModule!\n");
}
@@ -1144,10 +1109,6 @@ void SlotTracker::processFunction() {
ST_DEBUG("begin processFunction!\n");
fNext = 0;
- // Process function metadata if it wasn't hit at the module-level.
- if (!ShouldInitializeAllMetadata)
- processFunctionMetadata(*TheFunction);
-
// Add all the function arguments with no names.
for(Function::const_arg_iterator AI = TheFunction->arg_begin(),
AE = TheFunction->arg_end(); AI != AE; ++AI)
@@ -1177,7 +1138,7 @@ void SlotTracker::processFunction() {
}
if (ProcessFunctionHookFn)
- ProcessFunctionHookFn(this, TheFunction, ShouldInitializeAllMetadata);
+ ProcessFunctionHookFn(this, TheFunction);
FunctionProcessed = true;
@@ -1220,68 +1181,168 @@ int SlotTracker::processIndex() {
return TypeIdNext;
}
-void SlotTracker::processGlobalObjectMetadata(const GlobalObject &GO) {
- SmallVector<std::pair<unsigned, MDNode *>, 4> MDs;
- GO.getAllMetadata(MDs);
- for (auto &MD : MDs)
- CreateMetadataSlot(MD.second);
-}
+namespace {
+class MetadataNodeVisitor {
+ /// Visited MDNodes.
+ SmallPtrSet<const MDNode *, 32> VisitedMDNodes;
+ function_ref<void(const MDNode *)> Visit;
-void SlotTracker::processFunctionMetadata(const Function &F) {
- processGlobalObjectMetadata(F);
- for (auto &BB : F) {
- for (auto &I : BB) {
- for (const DbgRecord &DR : I.getDbgRecordRange())
- processDbgRecordMetadata(DR);
- processInstructionMetadata(I);
- }
+ void visit(const MDNode *N) {
+ if (isa<DIExpression>(N) || !VisitedMDNodes.insert(N).second)
+ return;
+
+ Visit(N);
+ for (const MDOperand &Op : N->operands())
+ if (const auto *OpNode = dyn_cast_or_null<MDNode>(Op.get()))
+ visit(OpNode);
}
-}
-void SlotTracker::processDbgRecordMetadata(const DbgRecord &DR) {
- // Tolerate null metadata pointers: it's a completely illegal debug record,
- // but we can have faulty metadata from debug-intrinsic days being
- // autoupgraded into debug records. This gets caught by the verifier, which
- // then will print the faulty IR, hitting this code path.
- if (const auto *DVR = dyn_cast<const DbgVariableRecord>(&DR)) {
- // Process metadata used by DbgRecords; we only specifically care about the
- // DILocalVariable, DILocation, and DIAssignID fields, as the Value and
- // Expression fields should only be printed inline and so do not use a slot.
- // Note: The above doesn't apply for empty-metadata operands.
- if (auto *Empty = dyn_cast_if_present<MDNode>(DVR->getRawLocation()))
- CreateMetadataSlot(Empty);
- if (DVR->getRawVariable())
- CreateMetadataSlot(DVR->getRawVariable());
- if (DVR->isDbgAssign()) {
- if (auto *AssignID = DVR->getRawAssignID())
- CreateMetadataSlot(cast<MDNode>(AssignID));
- if (auto *Empty = dyn_cast_if_present<MDNode>(DVR->getRawAddress()))
- CreateMetadataSlot(Empty);
+ void visitGlobalObjectMetadata(const GlobalObject &GO) {
+ SmallVector<std::pair<unsigned, MDNode *>, 4> MDs;
+ GO.getAllMetadata(MDs);
+ for (auto &MD : MDs)
+ visit(MD.second);
+ }
+
+ void visitDbgRecordMetadata(const DbgRecord &DR) {
+ if (const auto *DVR = dyn_cast<const DbgVariableRecord>(&DR)) {
+ if (auto *Empty = dyn_cast_if_present<MDNode>(DVR->getRawLocation()))
+ visit(Empty);
+ if (DVR->getRawVariable())
+ visit(DVR->getRawVariable());
+ if (DVR->isDbgAssign()) {
+ if (auto *AssignID = DVR->getRawAssignID())
+ visit(cast<MDNode>(AssignID));
+ if (auto *Empty = dyn_cast_if_present<MDNode>(DVR->getRawAddress()))
+ visit(Empty);
+ }
+ } else if (const auto *DLR = dyn_cast<const DbgLabelRecord>(&DR)) {
+ visit(DLR->getRawLabel());
+ } else {
+ llvm_unreachable("unsupported DbgRecord kind");
}
- } else if (const auto *DLR = dyn_cast<const DbgLabelRecord>(&DR)) {
- CreateMetadataSlot(DLR->getRawLabel());
- } else {
- llvm_unreachable("unsupported DbgRecord kind");
+ if (DR.getDebugLoc())
+ visit(DR.getDebugLoc().getAsMDNode());
+ }
+
+ void visitInstructionMetadata(const Instruction &I) {
+ if (const auto *CI = dyn_cast<CallInst>(&I))
+ if (Function *F = CI->getCalledFunction())
+ if (F->isIntrinsic())
+ for (auto &Op : I.operands())
+ if (auto *V = dyn_cast_or_null<MetadataAsValue>(Op))
+ if (auto *N = dyn_cast<MDNode>(V->getMetadata()))
+ visit(N);
+
+ SmallVector<std::pair<unsigned, MDNode *>, 4> MDs;
+ I.getAllMetadata(MDs);
+ for (auto &MD : MDs)
+ visit(MD.second);
+ }
+
+ void visitFunctionMetadata(const Function &F) {
+ visitGlobalObjectMetadata(F);
+ for (const BasicBlock &BB : F)
+ for (const Instruction &I : BB) {
+ for (const DbgRecord &DR : I.getDbgRecordRange())
+ visitDbgRecordMetadata(DR);
+ visitInstructionMetadata(I);
+ }
}
- if (DR.getDebugLoc())
- CreateMetadataSlot(DR.getDebugLoc().getAsMDNode());
+
+public:
+ MetadataNodeVisitor(function_ref<void(const MDNode *)> Visit)
+ : Visit(Visit) {}
+
+ void visitModuleMetadata(const Module &M) {
+ for (const GlobalVariable &Var : M.globals())
+ visitGlobalObjectMetadata(Var);
+ for (const GlobalIFunc &I : M.ifuncs())
+ visitGlobalObjectMetadata(I);
+ for (const NamedMDNode &NMD : M.named_metadata())
+ for (const MDNode *N : NMD.operands())
+ visit(N);
+ for (const Function &F : M)
+ visitFunctionMetadata(F);
+ }
+
+ void visitMetadata(ArrayRef<const MDNode *> Metadata) {
+ for (const MDNode *N : Metadata)
+ visit(N);
+ }
+
+ bool contains(const MDNode *N) const { return VisitedMDNodes.contains(N); }
+};
+
+class MetadataIDRenumberer {
+ uint32_t NextID = 0;
+
+public:
+ void run(const Module &M, ArrayRef<const MDNode *> AdditionalMetadata,
+ ModuleSlotTracker::MachineMDNodeListType *AdditionalMetadataNodes =
+ nullptr) {
+ bool IsAdditionalMetadata = false;
+ auto Renumber = [&](const MDNode *N) {
+ N->getContext().pImpl->setMetadataPrintID(const_cast<MDNode *>(N),
+ NextID++);
+ if (IsAdditionalMetadata && AdditionalMetadataNodes)
+ AdditionalMetadataNodes->emplace_back(
+ N->getContext().pImpl->getMetadataPrintID(N), N);
+ };
+ MetadataNodeVisitor Visitor(Renumber);
+
+ Visitor.visitModuleMetadata(M);
+
+ IsAdditionalMetadata = true;
+ Visitor.visitMetadata(AdditionalMetadata);
+
+ // Keep IDs unique for nodes outside the canonical output.
+ SmallVector<MDNode *, 32> RemainingNodes;
+ M.getContext().pImpl->getAllMetadataNodes(RemainingNodes);
+ llvm::erase_if(RemainingNodes, [&](const MDNode *N) {
+ return Visitor.contains(N) ||
+ M.getContext().pImpl->getMetadataPrintID(N) >= NextID;
+ });
+ llvm::sort(RemainingNodes, [&](const MDNode *LHS, const MDNode *RHS) {
+ return M.getContext().pImpl->getMetadataPrintID(LHS) <
+ M.getContext().pImpl->getMetadataPrintID(RHS);
+ });
+ for (MDNode *N : RemainingNodes)
+ M.getContext().pImpl->setMetadataPrintID(
+ N, M.getContext().pImpl->allocateMetadataPrintID());
+
+ if (AdditionalMetadataNodes)
+ llvm::sort(*AdditionalMetadataNodes);
+ }
+};
+} // namespace
+
+void Module::renumberMetadataForAssembly() {
+ MetadataIDRenumberer().run(*this, {});
}
-void SlotTracker::processInstructionMetadata(const Instruction &I) {
- // Process metadata used directly by intrinsics.
- if (const auto *CI = dyn_cast<CallInst>(&I))
- if (Function *F = CI->getCalledFunction())
- if (F->isIntrinsic())
- for (auto &Op : I.operands())
- if (auto *V = dyn_cast_or_null<MetadataAsValue>(Op))
- if (auto *N = dyn_cast<MDNode>(V->getMetadata()))
- CreateMetadataSlot(N);
+void ModuleSlotTracker::renumberMetadataForAssembly(
+ ArrayRef<const MDNode *> AdditionalMetadata,
+ MachineMDNodeListType *AdditionalMetadataNodes) const {
+ assert(M && "metadata renumbering requires a module");
+ MetadataIDRenumberer().run(*M, AdditionalMetadata, AdditionalMetadataNodes);
+}
- // Process metadata attached to this instruction.
- SmallVector<std::pair<unsigned, MDNode *>, 4> MDs;
- I.getAllMetadata(MDs);
- for (auto &MD : MDs)
- CreateMetadataSlot(MD.second);
+void ModuleSlotTracker::collectAdditionalMetadata(
+ ArrayRef<const MDNode *> AdditionalMetadata,
+ MachineMDNodeListType &AdditionalMetadataNodes) const {
+ assert(M && "metadata collection requires a module");
+ bool IsAdditionalMetadata = false;
+ auto Collect = [&](const MDNode *N) {
+ if (IsAdditionalMetadata)
+ AdditionalMetadataNodes.emplace_back(
+ N->getContext().pImpl->getMetadataPrintID(N), N);
+ };
+ MetadataNodeVisitor Visitor(Collect);
+ Visitor.visitModuleMetadata(*M);
+ IsAdditionalMetadata = true;
+ Visitor.visitMetadata(AdditionalMetadata);
+ llvm::sort(AdditionalMetadataNodes);
}
/// Clean up after incorporating a function. This is the only way to get out of
@@ -1306,14 +1367,12 @@ int SlotTracker::getGlobalSlot(const GlobalValue *V) {
}
void SlotTracker::setProcessHook(
- std::function<void(AbstractSlotTrackerStorage *, const Module *, bool)>
- Fn) {
+ std::function<void(AbstractSlotTrackerStorage *, const Module *)> Fn) {
ProcessModuleHookFn = std::move(Fn);
}
void SlotTracker::setProcessHook(
- std::function<void(AbstractSlotTrackerStorage *, const Function *, bool)>
- Fn) {
+ std::function<void(AbstractSlotTrackerStorage *, const Function *)> Fn) {
ProcessFunctionHookFn = std::move(Fn);
}
@@ -1325,9 +1384,11 @@ int SlotTracker::getMetadataSlot(const MDNode *N) {
// Check for uninitialized state and do lazy initialization.
initializeIfNeeded();
- // Find the MDNode in the module map
- mdn_iterator MI = mdnMap.find(N);
- return MI == mdnMap.end() ? -1 : (int)MI->second;
+ if (isa<DIExpression>(N))
+ return -1;
+ if (ShouldTrackMetadataDefinitions)
+ CreateMetadataSlot(N);
+ return N->getContext().pImpl->getMetadataPrintID(N);
}
/// getLocalSlot - Get the slot number for a value that is local to a function.
@@ -1420,19 +1481,16 @@ void SlotTracker::CreateFunctionSlot(const Value *V) {
void SlotTracker::CreateMetadataSlot(const MDNode *N) {
assert(N && "Can't insert a null Value into SlotTracker!");
- // Don't make slots for DIExpressions. We just print them inline everywhere.
if (isa<DIExpression>(N))
return;
- unsigned DestSlot = mdnNext;
- if (!mdnMap.insert(std::make_pair(N, DestSlot)).second)
+ unsigned ID = N->getContext().pImpl->getMetadataPrintID(N);
+ if (!mdnMap.try_emplace(N, ID).second)
return;
- ++mdnNext;
- // Recursively add any MDNodes referenced by operands.
- for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
- if (const auto *Op = dyn_cast_or_null<MDNode>(N->getOperand(i)))
- CreateMetadataSlot(Op);
+ for (const MDOperand &Op : N->operands())
+ if (const auto *OpNode = dyn_cast_or_null<MDNode>(Op.get()))
+ CreateMetadataSlot(OpNode);
}
void SlotTracker::CreateAttributeSetSlot(AttributeSet AS) {
@@ -5033,14 +5091,14 @@ void AssemblyWriter::writeMDNode(unsigned Slot, const MDNode *Node) {
}
void AssemblyWriter::writeAllMDNodes() {
- SmallVector<const MDNode *, 16> Nodes;
- Nodes.resize(Machine.mdn_size());
+ SmallVector<std::pair<unsigned, const MDNode *>, 16> Nodes;
+ Nodes.reserve(Machine.mdn_size());
for (auto &I : llvm::make_range(Machine.mdn_begin(), Machine.mdn_end()))
- Nodes[I.second] = cast<MDNode>(I.first);
+ Nodes.emplace_back(I.second, cast<MDNode>(I.first));
+ llvm::sort(Nodes);
- for (unsigned i = 0, e = Nodes.size(); i != e; ++i) {
- writeMDNode(i, Nodes[i]);
- }
+ for (auto [Slot, Node] : Nodes)
+ writeMDNode(Slot, Node);
}
void AssemblyWriter::printMDNodeBody(const MDNode *Node) {
@@ -5111,7 +5169,7 @@ void AssemblyWriter::printUseLists(const Function *F) {
void Function::print(raw_ostream &ROS, AssemblyAnnotationWriter *AAW,
bool ShouldPreserveUseListOrder, bool IsForDebug) const {
- SlotTracker SlotTable(this->getParent());
+ SlotTracker SlotTable(this);
formatted_raw_ostream OS(ROS);
AssemblyWriter W(OS, SlotTable, this->getParent(), AAW, IsForDebug,
ShouldPreserveUseListOrder);
@@ -5123,15 +5181,14 @@ void BasicBlock::print(raw_ostream &ROS, AssemblyAnnotationWriter *AAW,
bool IsForDebug) const {
SlotTracker SlotTable(this->getParent());
formatted_raw_ostream OS(ROS);
- AssemblyWriter W(OS, SlotTable, this->getModule(), AAW,
- IsForDebug,
+ AssemblyWriter W(OS, SlotTable, this->getModule(), AAW, IsForDebug,
ShouldPreserveUseListOrder);
W.printBasicBlock(this);
}
void Module::print(raw_ostream &ROS, AssemblyAnnotationWriter *AAW,
bool ShouldPreserveUseListOrder, bool IsForDebug) const {
- SlotTracker SlotTable(this);
+ SlotTracker SlotTable(this, /*ShouldTrackMetadataDefinitions=*/true);
formatted_raw_ostream OS(ROS);
AssemblyWriter W(OS, SlotTable, this, AAW, IsForDebug,
ShouldPreserveUseListOrder);
@@ -5201,26 +5258,15 @@ void Type::print(raw_ostream &OS, bool /*IsForDebug*/, bool NoDetails) const {
}
}
-static bool isReferencingMDNode(const Instruction &I) {
- if (const auto *CI = dyn_cast<CallInst>(&I))
- if (Function *F = CI->getCalledFunction())
- if (F->isIntrinsic())
- for (auto &Op : I.operands())
- if (auto *V = dyn_cast_or_null<MetadataAsValue>(Op))
- if (isa<MDNode>(V->getMetadata()))
- return true;
- return false;
-}
-
void DbgMarker::print(raw_ostream &ROS, bool IsForDebug) const {
- ModuleSlotTracker MST(getModuleFromDPI(this), true);
+ ModuleSlotTracker MST(getModuleFromDPI(this));
print(ROS, MST, IsForDebug);
}
void DbgVariableRecord::print(raw_ostream &ROS, bool IsForDebug) const {
- ModuleSlotTracker MST(getModuleFromDPI(this), true);
+ ModuleSlotTracker MST(getModuleFromDPI(this));
print(ROS, MST, IsForDebug);
}
@@ -5239,7 +5285,7 @@ void DbgMarker::print(raw_ostream &ROS, ModuleSlotTracker &MST,
void DbgLabelRecord::print(raw_ostream &ROS, bool IsForDebug) const {
- ModuleSlotTracker MST(getModuleFromDPI(this), true);
+ ModuleSlotTracker MST(getModuleFromDPI(this));
print(ROS, MST, IsForDebug);
}
@@ -5274,13 +5320,16 @@ void DbgLabelRecord::print(raw_ostream &ROS, ModuleSlotTracker &MST,
}
void Value::print(raw_ostream &ROS, bool IsForDebug) const {
- bool ShouldInitializeAllMetadata = false;
- if (auto *I = dyn_cast<Instruction>(this))
- ShouldInitializeAllMetadata = isReferencingMDNode(*I);
- else if (isa<Function>(this) || isa<MetadataAsValue>(this))
- ShouldInitializeAllMetadata = true;
+ if (const auto *F = dyn_cast<Function>(this)) {
+ F->print(ROS, nullptr, /*ShouldPreserveUseListOrder=*/false, IsForDebug);
+ return;
+ }
+ if (const auto *BB = dyn_cast<BasicBlock>(this)) {
+ BB->print(ROS, nullptr, /*ShouldPreserveUseListOrder=*/false, IsForDebug);
+ return;
+ }
- ModuleSlotTracker MST(getModuleFromVal(this), ShouldInitializeAllMetadata);
+ ModuleSlotTracker MST(getModuleFromVal(this));
print(ROS, MST, IsForDebug);
}
@@ -5360,8 +5409,7 @@ void Value::printAsOperand(raw_ostream &O, bool PrintType,
if (printWithoutType(*this, O, nullptr, M))
return;
- SlotTracker Machine(
- M, /* ShouldInitializeAllMetadata */ isa<MetadataAsValue>(this));
+ SlotTracker Machine(M);
ModuleSlotTracker MST(Machine, M);
printAsOperandImpl(*this, O, PrintType, MST);
}
@@ -5458,7 +5506,7 @@ static void printMetadataImpl(raw_ostream &ROS, const Metadata &MD,
}
void Metadata::printAsOperand(raw_ostream &OS, const Module *M) const {
- ModuleSlotTracker MST(M, isa<MDNode>(this));
+ ModuleSlotTracker MST(M);
printMetadataImpl(OS, *this, MST, M, /* OnlyAsOperand */ true);
}
@@ -5469,7 +5517,7 @@ void Metadata::printAsOperand(raw_ostream &OS, ModuleSlotTracker &MST,
void Metadata::print(raw_ostream &OS, const Module *M,
bool /*IsForDebug*/) const {
- ModuleSlotTracker MST(M, isa<MDNode>(this));
+ ModuleSlotTracker MST(M);
printMetadataImpl(OS, *this, MST, M, /* OnlyAsOperand */ false);
}
@@ -5479,7 +5527,7 @@ void Metadata::print(raw_ostream &OS, ModuleSlotTracker &MST,
}
void MDNode::printTree(raw_ostream &OS, const Module *M) const {
- ModuleSlotTracker MST(M, true);
+ ModuleSlotTracker MST(M);
printMetadataImpl(OS, *this, MST, M, /* OnlyAsOperand */ false,
/*PrintAsTree=*/true);
}
@@ -5497,15 +5545,13 @@ void ModuleSummaryIndex::print(raw_ostream &ROS, bool IsForDebug) const {
W.printModuleSummaryIndex();
}
-void ModuleSlotTracker::collectMDNodes(MachineMDNodeListType &L, unsigned LB,
- unsigned UB) const {
+void ModuleSlotTracker::collectMDNodes(MachineMDNodeListType &L) const {
SlotTracker *ST = MachineStorage.get();
if (!ST)
return;
for (auto &I : llvm::make_range(ST->mdn_begin(), ST->mdn_end()))
- if (I.second >= LB && I.second < UB)
- L.push_back(std::make_pair(I.second, I.first));
+ L.push_back(std::make_pair(I.second, I.first));
}
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
diff --git a/llvm/lib/IR/Core.cpp b/llvm/lib/IR/Core.cpp
index a7abd3eed31c3..d1ee8411e392c 100644
--- a/llvm/lib/IR/Core.cpp
+++ b/llvm/lib/IR/Core.cpp
@@ -474,6 +474,7 @@ LLVMBool LLVMPrintModuleToFile(LLVMModuleRef M, const char *Filename,
return true;
}
+ unwrap(M)->renumberMetadataForAssembly();
unwrap(M)->print(dest, nullptr);
dest.close();
@@ -491,6 +492,7 @@ char *LLVMPrintModuleToString(LLVMModuleRef M) {
std::string buf;
raw_string_ostream os(buf);
+ unwrap(M)->renumberMetadataForAssembly();
unwrap(M)->print(os, nullptr);
return strdup(buf.c_str());
diff --git a/llvm/lib/IR/IRPrintingPasses.cpp b/llvm/lib/IR/IRPrintingPasses.cpp
index 43671b0b9a1a3..a84f8db98bee4 100644
--- a/llvm/lib/IR/IRPrintingPasses.cpp
+++ b/llvm/lib/IR/IRPrintingPasses.cpp
@@ -26,37 +26,49 @@ using namespace llvm;
namespace {
+static void printModule(raw_ostream &OS, StringRef Banner,
+ bool ShouldPreserveUseListOrder, Module &M) {
+ if (llvm::isFunctionInPrintList("*")) {
+ if (!Banner.empty())
+ OS << Banner << "\n";
+ M.print(OS, nullptr, ShouldPreserveUseListOrder);
+ return;
+ }
+
+ bool BannerPrinted = false;
+ for (const auto &F : M.functions()) {
+ if (!llvm::isFunctionInPrintList(F.getName()))
+ continue;
+ if (!BannerPrinted && !Banner.empty()) {
+ OS << Banner << "\n";
+ BannerPrinted = true;
+ }
+ F.print(OS);
+ }
+}
+
class PrintModulePassWrapper : public ModulePass {
raw_ostream &OS;
std::string Banner;
bool ShouldPreserveUseListOrder;
+ bool ShouldRenumberMetadata;
public:
static char ID;
- PrintModulePassWrapper() : ModulePass(ID), OS(dbgs()) {}
+ PrintModulePassWrapper()
+ : ModulePass(ID), OS(dbgs()), ShouldPreserveUseListOrder(false),
+ ShouldRenumberMetadata(false) {}
PrintModulePassWrapper(raw_ostream &OS, const std::string &Banner,
- bool ShouldPreserveUseListOrder)
+ bool ShouldPreserveUseListOrder,
+ bool ShouldRenumberMetadata)
: ModulePass(ID), OS(OS), Banner(Banner),
- ShouldPreserveUseListOrder(ShouldPreserveUseListOrder) {}
+ ShouldPreserveUseListOrder(ShouldPreserveUseListOrder),
+ ShouldRenumberMetadata(ShouldRenumberMetadata) {}
bool runOnModule(Module &M) override {
- if (llvm::isFunctionInPrintList("*")) {
- if (!Banner.empty())
- OS << Banner << "\n";
- M.print(OS, nullptr, ShouldPreserveUseListOrder);
- } else {
- bool BannerPrinted = false;
- for (const auto &F : M.functions()) {
- if (llvm::isFunctionInPrintList(F.getName())) {
- if (!BannerPrinted && !Banner.empty()) {
- OS << Banner << "\n";
- BannerPrinted = true;
- }
- F.print(OS);
- }
- }
- }
-
+ if (ShouldRenumberMetadata)
+ M.renumberMetadataForAssembly();
+ printModule(OS, Banner, ShouldPreserveUseListOrder, M);
return false;
}
@@ -80,10 +92,10 @@ class PrintFunctionPassWrapper : public FunctionPass {
// This pass just prints a banner followed by the function as it's processed.
bool runOnFunction(Function &F) override {
if (isFunctionInPrintList(F.getName())) {
- if (forcePrintModuleIR())
- OS << Banner << " (function: " << F.getName() << ")\n"
- << *F.getParent();
- else
+ if (forcePrintModuleIR()) {
+ OS << Banner << " (function: " << F.getName() << ")\n";
+ F.getParent()->print(OS, nullptr);
+ } else
OS << Banner << '\n' << static_cast<Value &>(F);
}
@@ -109,7 +121,16 @@ INITIALIZE_PASS(PrintFunctionPassWrapper, "print-function",
ModulePass *llvm::createPrintModulePass(llvm::raw_ostream &OS,
const std::string &Banner,
bool ShouldPreserveUseListOrder) {
- return new PrintModulePassWrapper(OS, Banner, ShouldPreserveUseListOrder);
+ return createPrintModulePass(OS, Banner, ShouldPreserveUseListOrder,
+ /*ShouldRenumberMetadata=*/false);
+}
+
+ModulePass *llvm::createPrintModulePass(llvm::raw_ostream &OS,
+ const std::string &Banner,
+ bool ShouldPreserveUseListOrder,
+ bool ShouldRenumberMetadata) {
+ return new PrintModulePassWrapper(OS, Banner, ShouldPreserveUseListOrder,
+ ShouldRenumberMetadata);
}
FunctionPass *llvm::createPrintFunctionPass(llvm::raw_ostream &OS,
diff --git a/llvm/lib/IR/LLVMContextImpl.cpp b/llvm/lib/IR/LLVMContextImpl.cpp
index 90afa09f73abe..83baaf16b7c8c 100644
--- a/llvm/lib/IR/LLVMContextImpl.cpp
+++ b/llvm/lib/IR/LLVMContextImpl.cpp
@@ -40,6 +40,15 @@ LLVMContextImpl::LLVMContextImpl(LLVMContext &C)
Int64Ty(C, 64), Int128Ty(C, 128), Byte1Ty(C, 1), Byte8Ty(C, 8),
Byte16Ty(C, 16), Byte32Ty(C, 32), Byte64Ty(C, 64), Byte128Ty(C, 128) {}
+void LLVMContextImpl::getAllMetadataNodes(
+ SmallVectorImpl<MDNode *> &Nodes) const {
+ Nodes.append(DistinctMDNodes.begin(), DistinctMDNodes.end());
+#define HANDLE_MDNODE_LEAF_UNIQUABLE(CLASS) \
+ Nodes.append(CLASS##s.begin(), CLASS##s.end());
+#include "llvm/IR/Metadata.def"
+ Nodes.append(TemporaryMDNodes.begin(), TemporaryMDNodes.end());
+}
+
LLVMContextImpl::~LLVMContextImpl() {
#ifndef NDEBUG
// Check that any variable location records that fell off the end of a block
diff --git a/llvm/lib/IR/LLVMContextImpl.h b/llvm/lib/IR/LLVMContextImpl.h
index 2d22484d2ffb7..a6342389d8543 100644
--- a/llvm/lib/IR/LLVMContextImpl.h
+++ b/llvm/lib/IR/LLVMContextImpl.h
@@ -1637,6 +1637,20 @@ class LLVMContextImpl {
DenseMap<Metadata *, MetadataAsValue *> MetadataAsValues;
DenseSet<DIArgList *, DIArgListInfo> DIArgLists;
+ uint32_t NextMetadataPrintID = 0;
+
+ uint32_t allocateMetadataPrintID() { return NextMetadataPrintID++; }
+
+ void getAllMetadataNodes(SmallVectorImpl<MDNode *> &Nodes) const;
+
+ uint32_t getMetadataPrintID(const MDNode *N) const {
+ return N->getHeader().MetadataPrintID;
+ }
+
+ void setMetadataPrintID(MDNode *N, uint32_t ID) {
+ N->getHeader().MetadataPrintID = ID;
+ }
+
#define HANDLE_MDNODE_LEAF_UNIQUABLE(CLASS) \
DenseSet<CLASS *, CLASS##Info> CLASS##s;
#include "llvm/IR/Metadata.def"
@@ -1650,6 +1664,10 @@ class LLVMContextImpl {
// them on context teardown.
std::vector<MDNode *> DistinctMDNodes;
+ // Temporary nodes are caller-owned, but track live ones for persistent
+ // metadata print IDs.
+ DenseSet<MDNode *> TemporaryMDNodes;
+
// ConstantRangeListAttributeImpl is a TrailingObjects/ArrayRef of
// ConstantRange. Since this is a dynamically sized class, it's not
// possible to use SpecificBumpPtrAllocator. Instead, we use normal Alloc
diff --git a/llvm/lib/IR/Metadata.cpp b/llvm/lib/IR/Metadata.cpp
index 0a4141ee2362e..2b1a7bb117308 100644
--- a/llvm/lib/IR/Metadata.cpp
+++ b/llvm/lib/IR/Metadata.cpp
@@ -650,6 +650,8 @@ StringRef MDString::getString() const {
void *MDNode::operator new(size_t Size, size_t NumOps, StorageType Storage) {
// uint64_t is the most aligned type we need support (ensured by static_assert
// above)
+ static_assert(sizeof(Header) == sizeof(size_t) + 2 * sizeof(uint32_t),
+ "MDNode header fields poorly packed");
size_t AllocSize =
alignTo(Header::getAllocSize(Storage, NumOps), alignof(uint64_t));
char *Mem = reinterpret_cast<char *>(::operator new(AllocSize + Size));
@@ -667,6 +669,8 @@ void MDNode::operator delete(void *N) {
MDNode::MDNode(LLVMContext &Context, unsigned ID, StorageType Storage,
ArrayRef<Metadata *> Ops1, ArrayRef<Metadata *> Ops2)
: Metadata(ID, Storage), Context(Context) {
+ getHeader().MetadataPrintID = Context.pImpl->allocateMetadataPrintID();
+
unsigned Op = 0;
for (Metadata *MD : Ops1)
setOperand(Op++, MD);
@@ -781,6 +785,9 @@ void MDNode::countUnresolvedOperands() {
void MDNode::makeUniqued() {
assert(isTemporary() && "Expected this to be temporary");
assert(!isResolved() && "Expected this to be unresolved");
+ bool WasTracked = getContext().pImpl->TemporaryMDNodes.erase(this);
+ assert(WasTracked && "Temporary node not tracked");
+ (void)WasTracked;
// Enable uniquing callbacks.
for (auto &Op : mutable_operands())
@@ -981,6 +988,11 @@ void MDNode::handleChangedOperand(void *Ref, Metadata *New) {
}
void MDNode::deleteAsSubclass() {
+ if (isTemporary()) {
+ bool WasTracked = getContext().pImpl->TemporaryMDNodes.erase(this);
+ assert(WasTracked && "Temporary node not tracked");
+ (void)WasTracked;
+ }
switch (getMetadataID()) {
default:
llvm_unreachable("Invalid subclass of MDNode");
@@ -1066,6 +1078,11 @@ void MDNode::deleteTemporary(MDNode *N) {
void MDNode::storeDistinctInContext() {
assert(!Context.hasReplaceableUses() && "Unexpected replaceable uses");
assert(!getNumUnresolved() && "Unexpected unresolved nodes");
+ if (isTemporary()) {
+ bool WasTracked = getContext().pImpl->TemporaryMDNodes.erase(this);
+ assert(WasTracked && "Temporary node not tracked");
+ (void)WasTracked;
+ }
Storage = Distinct;
assert(isResolved() && "Expected this to be resolved");
diff --git a/llvm/lib/IR/MetadataImpl.h b/llvm/lib/IR/MetadataImpl.h
index b4188dd7d3ee4..0045b7c406f97 100644
--- a/llvm/lib/IR/MetadataImpl.h
+++ b/llvm/lib/IR/MetadataImpl.h
@@ -33,6 +33,7 @@ template <class T> T *MDNode::storeImpl(T *N, StorageType Storage) {
N->storeDistinctInContext();
break;
case Temporary:
+ N->getContext().pImpl->TemporaryMDNodes.insert(N);
break;
}
return N;
@@ -48,6 +49,7 @@ T *MDNode::storeImpl(T *N, StorageType Storage, StoreT &Store) {
N->storeDistinctInContext();
break;
case Temporary:
+ N->getContext().pImpl->TemporaryMDNodes.insert(N);
break;
}
return N;
diff --git a/llvm/lib/IR/SSAContext.cpp b/llvm/lib/IR/SSAContext.cpp
index feb8570d32757..ca093a1e6a76c 100644
--- a/llvm/lib/IR/SSAContext.cpp
+++ b/llvm/lib/IR/SSAContext.cpp
@@ -93,7 +93,7 @@ template <> Printable SSAContext::print(const BasicBlock *BB) const {
return Printable([BB](raw_ostream &Out) { Out << BB->getName(); });
return Printable([BB](raw_ostream &Out) {
- ModuleSlotTracker MST{BB->getParent()->getParent(), false};
+ ModuleSlotTracker MST{BB->getParent()->getParent()};
MST.incorporateFunction(*BB->getParent());
Out << MST.getLocalSlot(BB);
});
diff --git a/llvm/lib/IRPrinter/IRPrintingPasses.cpp b/llvm/lib/IRPrinter/IRPrintingPasses.cpp
index adb192ac4a916..8893e34fdeec2 100644
--- a/llvm/lib/IRPrinter/IRPrintingPasses.cpp
+++ b/llvm/lib/IRPrinter/IRPrintingPasses.cpp
@@ -23,15 +23,22 @@
using namespace llvm;
-PrintModulePass::PrintModulePass() : OS(dbgs()) {}
+PrintModulePass::PrintModulePass()
+ : OS(dbgs()), ShouldPreserveUseListOrder(false), EmitSummaryIndex(false),
+ ShouldRenumberMetadata(false) {}
PrintModulePass::PrintModulePass(raw_ostream &OS, const std::string &Banner,
bool ShouldPreserveUseListOrder,
- bool EmitSummaryIndex)
+ bool EmitSummaryIndex,
+ bool ShouldRenumberMetadata)
: OS(OS), Banner(Banner),
ShouldPreserveUseListOrder(ShouldPreserveUseListOrder),
- EmitSummaryIndex(EmitSummaryIndex) {}
+ EmitSummaryIndex(EmitSummaryIndex),
+ ShouldRenumberMetadata(ShouldRenumberMetadata) {}
PreservedAnalyses PrintModulePass::run(Module &M, ModuleAnalysisManager &AM) {
+ if (ShouldRenumberMetadata)
+ M.renumberMetadataForAssembly();
+
if (llvm::isFunctionInPrintList("*")) {
if (!Banner.empty())
OS << Banner << "\n";
@@ -68,9 +75,10 @@ PrintFunctionPass::PrintFunctionPass(raw_ostream &OS, const std::string &Banner)
PreservedAnalyses PrintFunctionPass::run(Function &F,
FunctionAnalysisManager &) {
if (isFunctionInPrintList(F.getName())) {
- if (forcePrintModuleIR())
- OS << Banner << " (function: " << F.getName() << ")\n" << *F.getParent();
- else
+ if (forcePrintModuleIR()) {
+ OS << Banner << " (function: " << F.getName() << ")\n";
+ F.getParent()->print(OS, nullptr);
+ } else
OS << Banner << '\n' << static_cast<Value &>(F);
}
diff --git a/llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp b/llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp
index 35990848e0e1d..8d8a7812e47f8 100644
--- a/llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp
+++ b/llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp
@@ -9,6 +9,9 @@
#include "DXILPrettyPrinter.h"
#include "DirectX.h"
#include "DirectXIRPasses/DXILDebugInfo.h"
+#include "llvm/ADT/DenseSet.h"
+#include "llvm/ADT/STLExtras.h"
+#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Analysis/DXILResource.h"
#include "llvm/IR/AssemblyAnnotationWriter.h"
@@ -262,17 +265,25 @@ static void prettyPrintResources(raw_ostream &OS, const DXILResourceMap &DRM,
}
namespace {
+class DXILModuleSlotTracker : public ModuleSlotTracker {
+public:
+ using ModuleSlotTracker::ModuleSlotTracker;
+ using ModuleSlotTracker::renumberMetadataForAssembly;
+};
+
class DXILAssemblyAnnotationWriter : public llvm::AssemblyAnnotationWriter {
private:
ModuleSlotTracker &MST;
AbstractSlotTrackerStorage &STS;
const DXILDebugInfoMap &DI;
+ DenseSet<const MDNode *> &EmittedMDNodes;
public:
DXILAssemblyAnnotationWriter(ModuleSlotTracker &MST,
AbstractSlotTrackerStorage &STS,
- const DXILDebugInfoMap &DI)
- : MST(MST), STS(STS), DI(DI) {}
+ const DXILDebugInfoMap &DI,
+ DenseSet<const MDNode *> &EmittedMDNodes)
+ : MST(MST), STS(STS), DI(DI), EmittedMDNodes(EmittedMDNodes) {}
void emitInstructionAnnot(const Instruction *OrigI,
formatted_raw_ostream &os) override {
@@ -284,10 +295,11 @@ class DXILAssemblyAnnotationWriter : public llvm::AssemblyAnnotationWriter {
}
void emitMDNodeAnnot(const MDNode *N, formatted_raw_ostream &os) override {
+ EmittedMDNodes.insert(N);
+
if (const Metadata *NewMD = DI.MDReplace.lookup(N)) {
if (const auto *NewN = dyn_cast<MDNode>(NewMD))
- if (STS.getMetadataSlot(NewN) == -1)
- STS.createMetadataSlot(NewN);
+ STS.createMetadataSlot(NewN);
os << "; DXIL: ";
N->printAsOperand(os, MST);
@@ -299,8 +311,7 @@ class DXILAssemblyAnnotationWriter : public llvm::AssemblyAnnotationWriter {
if (const Metadata *ExtraMD = DI.MDExtra.lookup(N)) {
if (const auto *ExtraN = dyn_cast<MDNode>(ExtraMD))
- if (STS.getMetadataSlot(ExtraN) == -1)
- STS.createMetadataSlot(ExtraN);
+ STS.createMetadataSlot(ExtraN);
os << "; DXIL: ";
N->printAsOperand(os, MST);
@@ -313,6 +324,71 @@ class DXILAssemblyAnnotationWriter : public llvm::AssemblyAnnotationWriter {
};
} // namespace
+static SmallVector<const MDNode *>
+collectAdditionalMetadata(Module &M, const DXILDebugInfoMap &DI) {
+ // Annotation metadata follows module metadata in the order its keys print.
+ // Follow replacement graphs to preserve that order in canonical output.
+ M.renumberMetadataForAssembly();
+
+ ModuleSlotTracker MST(&M);
+ AbstractSlotTrackerStorage *STS = nullptr;
+ MST.setProcessHook(
+ [&](AbstractSlotTrackerStorage *STS_, const Module *) { STS = STS_; });
+ MDNode::get(M.getContext(), {})->print(llvm::nulls(), MST);
+ assert(STS && "Slot tracker storage should have been initialised");
+
+ DenseSet<const Metadata *> ReplacementMetadata;
+ for (auto [_, Replacement] : DI.MDReplace)
+ ReplacementMetadata.insert(Replacement);
+
+ SmallVector<std::pair<unsigned, const MDNode *>> OriginalNodes;
+ DenseSet<const MDNode *> Queued;
+ auto AddOriginal = [&](const Metadata *MD) {
+ const auto *N = dyn_cast<MDNode>(MD);
+ if (!N || ReplacementMetadata.contains(N) || !Queued.insert(N).second)
+ return;
+ OriginalNodes.emplace_back(STS->getMetadataSlot(N), N);
+ };
+ for (auto [Original, _] : DI.MDReplace)
+ AddOriginal(Original);
+ for (auto [Original, _] : DI.MDExtra)
+ AddOriginal(Original);
+ llvm::sort(OriginalNodes);
+
+ SmallVector<const MDNode *> Worklist;
+ for (auto [_, N] : OriginalNodes)
+ Worklist.push_back(N);
+
+ SmallVector<const MDNode *> AdditionalMetadata;
+ auto AddAdditional = [&](const Metadata *MD) {
+ const auto *Root = dyn_cast_or_null<MDNode>(MD);
+ if (!Root || Queued.contains(Root))
+ return;
+
+ AdditionalMetadata.push_back(Root);
+ SmallVector<const MDNode *> Nodes = {Root};
+ while (!Nodes.empty()) {
+ const MDNode *N = Nodes.pop_back_val();
+ if (!Queued.insert(N).second)
+ continue;
+ Worklist.push_back(N);
+ for (const MDOperand &Op : llvm::reverse(N->operands()))
+ if (const auto *OpNode = dyn_cast_or_null<MDNode>(Op.get()))
+ Nodes.push_back(OpNode);
+ }
+ };
+
+ for (size_t I = 0; I != Worklist.size(); ++I) {
+ const MDNode *N = Worklist[I];
+ if (const Metadata *Replacement = DI.MDReplace.lookup(N)) {
+ AddAdditional(Replacement);
+ continue;
+ }
+ AddAdditional(DI.MDExtra.lookup(N));
+ }
+ return AdditionalMetadata;
+}
+
static void prettyPrint(raw_ostream &OS, Module &M, const DXILResourceMap &DRM,
DXILResourceTypeMap &DRTM) {
formatted_raw_ostream FOS(OS);
@@ -321,30 +397,32 @@ static void prettyPrint(raw_ostream &OS, Module &M, const DXILResourceMap &DRM,
DXILDebugInfoMap DI = DXILDebugInfoPass::run(M);
- ModuleSlotTracker MST(&M);
+ SmallVector<const MDNode *> AdditionalMetadata =
+ collectAdditionalMetadata(M, DI);
+ DXILModuleSlotTracker MST(&M);
+ MST.renumberMetadataForAssembly(AdditionalMetadata);
AbstractSlotTrackerStorage *STS = nullptr;
- unsigned NextMetadataSlot = 0;
MST.setProcessHook(
- [&](AbstractSlotTrackerStorage *STS_, const Module *, bool) {
- STS = STS_;
- NextMetadataSlot = STS->getNextMetadataSlot();
- });
+ [&](AbstractSlotTrackerStorage *STS_, const Module *) { STS = STS_; });
// Force initialisation. ModuleSlotTracker does not have a dedicated function
// for this so trigger it through a dummy print.
MDNode::get(M.getContext(), {})->print(llvm::nulls(), MST);
assert(STS && "Slot tracker storage should have been initialised");
- DXILAssemblyAnnotationWriter DAAW(MST, *STS, DI);
+ DenseSet<const MDNode *> EmittedMDNodes;
+ DXILAssemblyAnnotationWriter DAAW(MST, *STS, DI, EmittedMDNodes);
M.print(FOS, &DAAW);
ModuleSlotTracker::MachineMDNodeListType MDNodes;
- MST.collectMDNodes(MDNodes, NextMetadataSlot, ~0u);
+ MST.collectMDNodes(MDNodes);
std::sort(MDNodes.begin(), MDNodes.end(),
[](const std::pair<unsigned, const MDNode *> &A,
const std::pair<unsigned, const MDNode *> &B) {
return A.first < B.first;
});
for (auto [_, MDNode] : MDNodes) {
+ if (EmittedMDNodes.contains(MDNode))
+ continue;
DAAW.emitMDNodeAnnot(MDNode, FOS);
MDNode->print(FOS, MST);
FOS << "\n";
diff --git a/llvm/test/CodeGen/DirectX/DebugInfo/di-globalvariable.ll b/llvm/test/CodeGen/DirectX/DebugInfo/di-globalvariable.ll
index 978c6f6cfb221..fd23adbcd42b5 100644
--- a/llvm/test/CodeGen/DirectX/DebugInfo/di-globalvariable.ll
+++ b/llvm/test/CodeGen/DirectX/DebugInfo/di-globalvariable.ll
@@ -1,4 +1,5 @@
; RUN: llc %s -o - | FileCheck %s
+; RUN: llc %s -o - | FileCheck %s --check-prefix=NO-DUP
target triple = "dxil-unknown-shadermodel6.3-library"
@@ -24,6 +25,12 @@ define void @foo() {
; CHECK-DAG: ![[FILE]] = !DIFile(filename: "cu.cpp", directory: "/tmp")
; CHECK-DAG: ![[TYPE]] = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+; NO-DUP: ![[GVY:[0-9]+]] = !DIGlobalVariable(name: "y"
+; NO-DUP-NOT: ![[GVY]] =
+; NO-DUP: ![[GVX:[0-9]+]] = !DIGlobalVariable(name: "x"
+; NO-DUP-NOT: ![[GVX]] =
+; NO-DUP-NOT: ![[GVY]] =
+
!llvm.dbg.cu = !{!4}
!llvm.module.flags = !{!8, !9}
diff --git a/llvm/test/CodeGen/Hexagon/swp-no-alias.mir b/llvm/test/CodeGen/Hexagon/swp-no-alias.mir
index 38b7212702ff9..c37b9b32f8230 100644
--- a/llvm/test/CodeGen/Hexagon/swp-no-alias.mir
+++ b/llvm/test/CodeGen/Hexagon/swp-no-alias.mir
@@ -27,7 +27,7 @@
# CHECK-DAG: SU(4): Data Latency=0 Reg=%10
# CHECK-DAG: SU(2): Data Latency=0 Reg=%10
# CHECK-DAG: SU(7): Anti Latency=1
-# CHECK-NEXT: SU(2): %12:hvxvr = V6_vL32b_ai %10:intregs, 0 :: (load (s1024) from %ir.iptr.09, !tbaa !4)
+# CHECK-NEXT: SU(2): %12:hvxvr = V6_vL32b_ai %10:intregs, 0 :: (load (s1024) from %ir.iptr.09, !tbaa !10)
# CHECK-NEXT: # preds left
# CHECK-NEXT: # succs left
# CHECK-NEXT: # rdefs left
@@ -38,7 +38,7 @@
# CHECK-NEXT: SU(1): Data Latency=0 Reg=%10
# CHECK-NEXT: Successors:
# CHECK-NEXT: SU(3): Data Latency=0 Reg=%12
-# CHECK-NEXT: SU(3): V6_vS32b_ai %8:intregs, 0, %12:hvxvr :: (store (s1024) into %ir.optr.010, !tbaa !4)
+# CHECK-NEXT: SU(3): V6_vS32b_ai %8:intregs, 0, %12:hvxvr :: (store (s1024) into %ir.optr.010, !tbaa !10)
# CHECK-NEXT: # preds left
# CHECK-NEXT: # succs left
# CHECK-NEXT: # rdefs left
@@ -48,7 +48,7 @@
# CHECK-NEXT: Predecessors:
# CHECK-DAG: SU(2): Data Latency=0 Reg=%12
# CHECK-DAG: SU(0): Data Latency=0 Reg=%8
-# CHECK-NEXT: SU(4): %13:hvxvr = V6_vL32b_ai %10:intregs, 128 :: (load (s1024) from %ir.cgep, !tbaa !4)
+# CHECK-NEXT: SU(4): %13:hvxvr = V6_vL32b_ai %10:intregs, 128 :: (load (s1024) from %ir.cgep, !tbaa !10)
# CHECK-NEXT: # preds left
# CHECK-NEXT: # succs left
# CHECK-NEXT: # rdefs left
@@ -59,7 +59,7 @@
# CHECK-NEXT: SU(1): Data Latency=0 Reg=%10
# CHECK-NEXT: Successors:
# CHECK-NEXT: SU(5): Data Latency=0 Reg=%13
-# CHECK-NEXT: SU(5): V6_vS32b_ai %8:intregs, 128, %13:hvxvr :: (store (s1024) into %ir.cgep3, !tbaa !4)
+# CHECK-NEXT: SU(5): V6_vS32b_ai %8:intregs, 128, %13:hvxvr :: (store (s1024) into %ir.cgep3, !tbaa !10)
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/instr-mmra.mir b/llvm/test/CodeGen/MIR/AMDGPU/instr-mmra.mir
index 62593255ea4ab..7dce5c230df63 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/instr-mmra.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/instr-mmra.mir
@@ -19,7 +19,7 @@ body: |
liveins: $vgpr0, $vgpr1
; CHECK-LABEL: name: test_mmra
- ; CHECK: ATOMIC_FENCE 5, 2, mmra !0
+ ; CHECK: ATOMIC_FENCE 5, 2, mmra !{{[0-9]+}}
ATOMIC_FENCE 5, 2, mmra !0
S_ENDPGM 0
...
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/machine-metadata.mir b/llvm/test/CodeGen/MIR/AMDGPU/machine-metadata.mir
index 9570f8b98c468..45cf5a3fb7f7b 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/machine-metadata.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/machine-metadata.mir
@@ -86,11 +86,11 @@ body: |
; CHECK: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[COPY1]], %subreg.sub1
; CHECK: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY4]], %subreg.sub0, [[COPY3]], %subreg.sub1
; CHECK: [[COPY5:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE1]]
- ; CHECK: [[GLOBAL_LOAD_DWORDX4_:%[0-9]+]]:vreg_128 = GLOBAL_LOAD_DWORDX4 [[COPY5]], 16, 0, implicit $exec :: (load (s128) from %ir.p1, align 4, !alias.scope !5, !noalias !8, addrspace 1)
+ ; CHECK: [[GLOBAL_LOAD_DWORDX4_:%[0-9]+]]:vreg_128 = GLOBAL_LOAD_DWORDX4 [[COPY5]], 16, 0, implicit $exec :: (load (s128) from %ir.p1, align 4, !alias.scope ![[LOAD_SCOPE:[0-9]+]], !noalias ![[LOAD_NOALIAS:[0-9]+]], addrspace 1)
; CHECK: [[COPY6:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE1]]
- ; CHECK: GLOBAL_STORE_DWORDX4 [[COPY6]], killed [[GLOBAL_LOAD_DWORDX4_]], 0, 0, implicit $exec :: (store (s128) into %ir.p0, align 4, !alias.scope !10, !noalias !11, addrspace 1)
+ ; CHECK: GLOBAL_STORE_DWORDX4 [[COPY6]], killed [[GLOBAL_LOAD_DWORDX4_]], 0, 0, implicit $exec :: (store (s128) into %ir.p0, align 4, !alias.scope ![[STORE_SCOPE:[0-9]+]], !noalias ![[STORE_NOALIAS:[0-9]+]], addrspace 1)
; CHECK: [[COPY7:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE]]
- ; CHECK: [[GLOBAL_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = GLOBAL_LOAD_DWORDX2 killed [[COPY7]], 0, 0, implicit $exec :: (load (s64) from %ir.1, align 4, !alias.scope !3, !noalias !0, addrspace 1)
+ ; CHECK: [[GLOBAL_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = GLOBAL_LOAD_DWORDX2 killed [[COPY7]], 0, 0, implicit $exec :: (load (s64) from %ir.1, align 4, !alias.scope ![[IR_SCOPE:[0-9]+]], !noalias ![[IR_NOALIAS:[0-9]+]], addrspace 1)
; CHECK: [[COPY8:%[0-9]+]]:vgpr_32 = COPY [[GLOBAL_LOAD_DWORDX2_]].sub0
; CHECK: [[COPY9:%[0-9]+]]:vgpr_32 = COPY [[GLOBAL_LOAD_DWORDX2_]].sub1
; CHECK: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[COPY8]], killed [[COPY9]], 0, implicit $exec
@@ -137,11 +137,11 @@ body: |
; CHECK: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[COPY1]], %subreg.sub1
; CHECK: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY4]], %subreg.sub0, [[COPY3]], %subreg.sub1
; CHECK: [[COPY5:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE1]]
- ; CHECK: [[GLOBAL_LOAD_DWORDX4_:%[0-9]+]]:vreg_128 = GLOBAL_LOAD_DWORDX4 [[COPY5]], 16, 0, implicit $exec :: (load (s128) from %ir.p1, align 4, !alias.scope !5, !noalias !8, addrspace 1)
+ ; CHECK: [[GLOBAL_LOAD_DWORDX4_:%[0-9]+]]:vreg_128 = GLOBAL_LOAD_DWORDX4 [[COPY5]], 16, 0, implicit $exec :: (load (s128) from %ir.p1, align 4, !alias.scope ![[INLINE_LOAD_SCOPE:[0-9]+]], !noalias ![[INLINE_LOAD_NOALIAS:[0-9]+]], addrspace 1)
; CHECK: [[COPY6:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE1]]
- ; CHECK: GLOBAL_STORE_DWORDX4 [[COPY6]], killed [[GLOBAL_LOAD_DWORDX4_]], 0, 0, implicit $exec :: (store (s128) into %ir.p0, align 4, !alias.scope !10, !noalias !11, addrspace 1)
+ ; CHECK: GLOBAL_STORE_DWORDX4 [[COPY6]], killed [[GLOBAL_LOAD_DWORDX4_]], 0, 0, implicit $exec :: (store (s128) into %ir.p0, align 4, !alias.scope ![[INLINE_STORE_SCOPE:[0-9]+]], !noalias ![[INLINE_STORE_NOALIAS:[0-9]+]], addrspace 1)
; CHECK: [[COPY7:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE]]
- ; CHECK: [[GLOBAL_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = GLOBAL_LOAD_DWORDX2 killed [[COPY7]], 0, 0, implicit $exec :: (load (s64) from %ir.1, align 4, !alias.scope !3, !noalias !0, addrspace 1)
+ ; CHECK: [[GLOBAL_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = GLOBAL_LOAD_DWORDX2 killed [[COPY7]], 0, 0, implicit $exec :: (load (s64) from %ir.1, align 4, !alias.scope ![[IR_SCOPE]], !noalias ![[IR_NOALIAS]], addrspace 1)
; CHECK: [[COPY8:%[0-9]+]]:vgpr_32 = COPY [[GLOBAL_LOAD_DWORDX2_]].sub0
; CHECK: [[COPY9:%[0-9]+]]:vgpr_32 = COPY [[GLOBAL_LOAD_DWORDX2_]].sub1
; CHECK: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[COPY8]], killed [[COPY9]], 0, implicit $exec
diff --git a/llvm/test/CodeGen/MIR/X86/instr-heap-alloc-operands.mir b/llvm/test/CodeGen/MIR/X86/instr-heap-alloc-operands.mir
index ca59e5fe7b8fd..724335cc371dc 100644
--- a/llvm/test/CodeGen/MIR/X86/instr-heap-alloc-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/instr-heap-alloc-operands.mir
@@ -34,7 +34,7 @@ body: |
ADJCALLSTACKDOWN64 32, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
$ecx = COPY %0
CALL64pcrel32 @f, csr_win64, implicit $rsp, implicit $ssp, implicit $ecx, implicit-def $rsp, implicit-def $ssp, implicit-def dead $rax, heap-alloc-marker !2
- ; CHECK: CALL64pcrel32 @f, {{.*}} heap-alloc-marker !2
+ ; CHECK: CALL64pcrel32 @f, {{.*}} heap-alloc-marker !{{[0-9]+}}
ADJCALLSTACKUP64 32, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
$eax = MOV32r0 implicit-def dead $eflags
RET 0, killed $eax
diff --git a/llvm/test/CodeGen/MIR/X86/instr-pcsections.mir b/llvm/test/CodeGen/MIR/X86/instr-pcsections.mir
index 947d93ef35937..4a50838f45444 100644
--- a/llvm/test/CodeGen/MIR/X86/instr-pcsections.mir
+++ b/llvm/test/CodeGen/MIR/X86/instr-pcsections.mir
@@ -27,7 +27,7 @@ body: |
liveins: $rdi
; CHECK-LABEL: name: test
- ; CHECK: MOV{{.*}} pcsections !0
+ ; CHECK: MOV{{.*}} pcsections !{{[0-9]+}}
renamable $al = MOV8rm killed renamable $rdi, 1, $noreg, 0, $noreg, pcsections !0
RET64 implicit killed $al
diff --git a/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir b/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir
index 532c8ac354e71..5e4fa55471f2a 100644
--- a/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir
+++ b/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir
@@ -72,10 +72,10 @@ stack:
body: |
bb.0.entry:
liveins: $edi
- ; CHECK: DBG_VALUE $noreg, 0, !11, !DIExpression(), debug-location !12
- ; CHECK: DBG_VALUE $noreg, 0, !11, !DIExpression(), debug-location !12
- ; CHECK: $eax = COPY %0, debug-location !13
- ; CHECK: RET64 $eax, debug-location !13
+ ; CHECK: DBG_VALUE $noreg, 0, ![[VAR:[0-9]+]], !DIExpression(), debug-location ![[VAR_LOC:[0-9]+]]
+ ; CHECK: DBG_VALUE $noreg, 0, ![[VAR]], !DIExpression(), debug-location ![[VAR_LOC]]
+ ; CHECK: $eax = COPY %0, debug-location ![[RET_LOC:[0-9]+]]
+ ; CHECK: RET64 $eax, debug-location ![[RET_LOC]]
%0 = COPY $edi
DBG_VALUE _, 0, !12, !DIExpression(), debug-location !13
; Test whether debug-use is still recognized for compatibility with old
@@ -99,9 +99,9 @@ body: |
liveins: $edi
%0 = COPY $edi
- ; CHECK: DBG_VALUE $noreg, i32 0, !11, !DIExpression()
- ; CHECK-NEXT: DBG_VALUE $noreg, i64 -22, !11, !DIExpression()
- ; CHECK-NEXT: DBG_VALUE $noreg, i128 123492148938512984928424384934328985928, !11, !DIExpression()
+ ; CHECK: DBG_VALUE $noreg, i32 0, ![[VAR]], !DIExpression()
+ ; CHECK-NEXT: DBG_VALUE $noreg, i64 -22, ![[VAR]], !DIExpression()
+ ; CHECK-NEXT: DBG_VALUE $noreg, i128 123492148938512984928424384934328985928, ![[VAR]], !DIExpression()
DBG_VALUE _, i32 0, !12, !DIExpression(), debug-location !13
DBG_VALUE _, i64 -22, !12, !DIExpression(), debug-location !13
DBG_VALUE _, i128 123492148938512984928424384934328985928, !12, !DIExpression(), debug-location !13
diff --git a/llvm/test/CodeGen/MIR/X86/machine-metadata.mir b/llvm/test/CodeGen/MIR/X86/machine-metadata.mir
index 47929752f1af8..cb782c88b40b4 100644
--- a/llvm/test/CodeGen/MIR/X86/machine-metadata.mir
+++ b/llvm/test/CodeGen/MIR/X86/machine-metadata.mir
@@ -76,12 +76,12 @@ body: |
; CHECK-LABEL: name: test_memcpy
; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rsi
; CHECK: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi
- ; CHECK: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 16, $noreg :: (load (s64) from %ir.p1, align 4, !alias.scope !5, !noalias !8)
- ; CHECK: [[MOV64rm1:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 24, $noreg :: (load (s64) from %ir.p1 + 8, align 4, !alias.scope !5, !noalias !8)
- ; CHECK: MOV64mr [[COPY1]], 1, $noreg, 8, $noreg, killed [[MOV64rm1]] :: (store (s64) into %ir.p0 + 8, align 4, !alias.scope !10, !noalias !11)
- ; CHECK: MOV64mr [[COPY1]], 1, $noreg, 0, $noreg, killed [[MOV64rm]] :: (store (s64) into %ir.p0, align 4, !alias.scope !10, !noalias !11)
- ; CHECK: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.q, !alias.scope !3, !noalias !0)
- ; CHECK: [[ADD32rm:%[0-9]+]]:gr32 = ADD32rm [[MOV32rm]], [[COPY]], 1, $noreg, 4, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.q1, !alias.scope !3, !noalias !0)
+ ; CHECK: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 16, $noreg :: (load (s64) from %ir.p1, align 4, !alias.scope ![[MEMCPY_LOAD_SCOPE:[0-9]+]], !noalias ![[MEMCPY_LOAD_NOALIAS:[0-9]+]])
+ ; CHECK: [[MOV64rm1:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 24, $noreg :: (load (s64) from %ir.p1 + 8, align 4, !alias.scope ![[MEMCPY_LOAD_SCOPE]], !noalias ![[MEMCPY_LOAD_NOALIAS]])
+ ; CHECK: MOV64mr [[COPY1]], 1, $noreg, 8, $noreg, killed [[MOV64rm1]] :: (store (s64) into %ir.p0 + 8, align 4, !alias.scope ![[MEMCPY_STORE_SCOPE:[0-9]+]], !noalias ![[MEMCPY_STORE_NOALIAS:[0-9]+]])
+ ; CHECK: MOV64mr [[COPY1]], 1, $noreg, 0, $noreg, killed [[MOV64rm]] :: (store (s64) into %ir.p0, align 4, !alias.scope ![[MEMCPY_STORE_SCOPE]], !noalias ![[MEMCPY_STORE_NOALIAS]])
+ ; CHECK: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.q, !alias.scope ![[IR_SCOPE:[0-9]+]], !noalias ![[IR_NOALIAS:[0-9]+]])
+ ; CHECK: [[ADD32rm:%[0-9]+]]:gr32 = ADD32rm [[MOV32rm]], [[COPY]], 1, $noreg, 4, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.q1, !alias.scope ![[IR_SCOPE]], !noalias ![[IR_NOALIAS]])
; CHECK: $eax = COPY [[ADD32rm]]
; CHECK: RET 0, $eax
%1:gr64 = COPY $rsi
@@ -113,12 +113,12 @@ body: |
; CHECK-LABEL: name: test_memcpy_inline
; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rsi
; CHECK: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi
- ; CHECK: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 16, $noreg :: (load (s64) from %ir.p1, align 4, !alias.scope !5, !noalias !8)
- ; CHECK: [[MOV64rm1:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 24, $noreg :: (load (s64) from %ir.p1 + 8, align 4, !alias.scope !5, !noalias !8)
- ; CHECK: MOV64mr [[COPY1]], 1, $noreg, 8, $noreg, killed [[MOV64rm1]] :: (store (s64) into %ir.p0 + 8, align 4, !alias.scope !10, !noalias !11)
- ; CHECK: MOV64mr [[COPY1]], 1, $noreg, 0, $noreg, killed [[MOV64rm]] :: (store (s64) into %ir.p0, align 4, !alias.scope !10, !noalias !11)
- ; CHECK: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.q, !alias.scope !3, !noalias !0)
- ; CHECK: [[ADD32rm:%[0-9]+]]:gr32 = ADD32rm [[MOV32rm]], [[COPY]], 1, $noreg, 4, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.q1, !alias.scope !3, !noalias !0)
+ ; CHECK: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 16, $noreg :: (load (s64) from %ir.p1, align 4, !alias.scope ![[INLINE_LOAD_SCOPE:[0-9]+]], !noalias ![[INLINE_LOAD_NOALIAS:[0-9]+]])
+ ; CHECK: [[MOV64rm1:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 24, $noreg :: (load (s64) from %ir.p1 + 8, align 4, !alias.scope ![[INLINE_LOAD_SCOPE]], !noalias ![[INLINE_LOAD_NOALIAS]])
+ ; CHECK: MOV64mr [[COPY1]], 1, $noreg, 8, $noreg, killed [[MOV64rm1]] :: (store (s64) into %ir.p0 + 8, align 4, !alias.scope ![[INLINE_STORE_SCOPE:[0-9]+]], !noalias ![[INLINE_STORE_NOALIAS:[0-9]+]])
+ ; CHECK: MOV64mr [[COPY1]], 1, $noreg, 0, $noreg, killed [[MOV64rm]] :: (store (s64) into %ir.p0, align 4, !alias.scope ![[INLINE_STORE_SCOPE]], !noalias ![[INLINE_STORE_NOALIAS]])
+ ; CHECK: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.q, !alias.scope ![[IR_SCOPE]], !noalias ![[IR_NOALIAS]])
+ ; CHECK: [[ADD32rm:%[0-9]+]]:gr32 = ADD32rm [[MOV32rm]], [[COPY]], 1, $noreg, 4, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.q1, !alias.scope ![[IR_SCOPE]], !noalias ![[IR_NOALIAS]])
; CHECK: $eax = COPY [[ADD32rm]]
; CHECK: RET 0, $eax
%1:gr64 = COPY $rsi
@@ -150,12 +150,12 @@ body: |
; CHECK-LABEL: name: test_mempcpy
; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rsi
; CHECK: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi
- ; CHECK: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 16, $noreg :: (load (s64) from %ir.p1, align 1, !alias.scope !5, !noalias !8)
- ; CHECK: [[MOV64rm1:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 24, $noreg :: (load (s64) from %ir.p1 + 8, align 1, !alias.scope !5, !noalias !8)
- ; CHECK: MOV64mr [[COPY1]], 1, $noreg, 8, $noreg, killed [[MOV64rm1]] :: (store (s64) into %ir.p0 + 8, align 1, !alias.scope !10, !noalias !11)
- ; CHECK: MOV64mr [[COPY1]], 1, $noreg, 0, $noreg, killed [[MOV64rm]] :: (store (s64) into %ir.p0, align 1, !alias.scope !10, !noalias !11)
- ; CHECK: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.q, !alias.scope !3, !noalias !0)
- ; CHECK: [[ADD32rm:%[0-9]+]]:gr32 = ADD32rm [[MOV32rm]], [[COPY]], 1, $noreg, 4, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.q1, !alias.scope !3, !noalias !0)
+ ; CHECK: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 16, $noreg :: (load (s64) from %ir.p1, align 1, !alias.scope ![[MEMPCPY_LOAD_SCOPE:[0-9]+]], !noalias ![[MEMPCPY_LOAD_NOALIAS:[0-9]+]])
+ ; CHECK: [[MOV64rm1:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 24, $noreg :: (load (s64) from %ir.p1 + 8, align 1, !alias.scope ![[MEMPCPY_LOAD_SCOPE]], !noalias ![[MEMPCPY_LOAD_NOALIAS]])
+ ; CHECK: MOV64mr [[COPY1]], 1, $noreg, 8, $noreg, killed [[MOV64rm1]] :: (store (s64) into %ir.p0 + 8, align 1, !alias.scope ![[MEMPCPY_STORE_SCOPE:[0-9]+]], !noalias ![[MEMPCPY_STORE_NOALIAS:[0-9]+]])
+ ; CHECK: MOV64mr [[COPY1]], 1, $noreg, 0, $noreg, killed [[MOV64rm]] :: (store (s64) into %ir.p0, align 1, !alias.scope ![[MEMPCPY_STORE_SCOPE]], !noalias ![[MEMPCPY_STORE_NOALIAS]])
+ ; CHECK: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.q, !alias.scope ![[IR_SCOPE]], !noalias ![[IR_NOALIAS]])
+ ; CHECK: [[ADD32rm:%[0-9]+]]:gr32 = ADD32rm [[MOV32rm]], [[COPY]], 1, $noreg, 4, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.q1, !alias.scope ![[IR_SCOPE]], !noalias ![[IR_NOALIAS]])
; CHECK: $eax = COPY [[ADD32rm]]
; CHECK: RET 0, $eax
%1:gr64 = COPY $rsi
diff --git a/llvm/test/CodeGen/MIR/X86/mem-cache-hint.mir b/llvm/test/CodeGen/MIR/X86/mem-cache-hint.mir
index 196307e14ef1d..f59023de10e77 100644
--- a/llvm/test/CodeGen/MIR/X86/mem-cache-hint.mir
+++ b/llvm/test/CodeGen/MIR/X86/mem-cache-hint.mir
@@ -28,9 +28,9 @@ body: |
; CHECK: liveins: $rdi, $esi
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
- ; CHECK-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.p, !mem.cache_hint !0)
+ ; CHECK-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.p, !mem.cache_hint !{{[0-9]+}})
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
- ; CHECK-NEXT: MOV32mr [[COPY]], 1, $noreg, 0, $noreg, [[COPY1]] :: (store (s32) into %ir.p, !mem.cache_hint !2)
+ ; CHECK-NEXT: MOV32mr [[COPY]], 1, $noreg, 0, $noreg, [[COPY1]] :: (store (s32) into %ir.p, !mem.cache_hint !{{[0-9]+}})
; CHECK-NEXT: $eax = COPY [[MOV32rm]]
; CHECK-NEXT: RET 0, $eax
%0:gr64 = COPY $rdi
diff --git a/llvm/test/CodeGen/MIR/X86/memory-operands.mir b/llvm/test/CodeGen/MIR/X86/memory-operands.mir
index 60a5a4b192aed..b738dd9b12b51 100644
--- a/llvm/test/CodeGen/MIR/X86/memory-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/memory-operands.mir
@@ -459,8 +459,8 @@ body: |
bb.0.entry:
$rax = MOV64rm $rip, 1, _, @a, _ :: (load (s64) from got)
; CHECK-LABEL: name: tbaa_metadata
- ; CHECK: $eax = MOV32rm killed $rax, 1, $noreg, 0, $noreg, implicit-def $rax :: (load (s32) from @a, !tbaa !2)
- ; CHECK-NEXT: $eax = MOV32rm killed $rax, 1, $noreg, 0, $noreg :: (load (s32) from %ir.1, !tbaa !6)
+ ; CHECK: $eax = MOV32rm killed $rax, 1, $noreg, 0, $noreg, implicit-def $rax :: (load (s32) from @a, !tbaa !{{[0-9]+}})
+ ; CHECK-NEXT: $eax = MOV32rm killed $rax, 1, $noreg, 0, $noreg :: (load (s32) from %ir.1, !tbaa !{{[0-9]+}})
$eax = MOV32rm killed $rax, 1, _, 0, _, implicit-def $rax :: (load (s32) from @a, !tbaa !2)
$eax = MOV32rm killed $rax, 1, _, 0, _ :: (load (s32) from %ir.1, !tbaa !6)
RET64 $eax
@@ -475,9 +475,9 @@ body: |
bb.0.entry:
liveins: $rdi, $rsi
; CHECK-LABEL: name: aa_scope
- ; CHECK: $xmm0 = MOVSSrm_alt $rsi, 1, $noreg, 0, $noreg :: (load (s32) from %ir.c, !alias.scope !9)
+ ; CHECK: $xmm0 = MOVSSrm_alt $rsi, 1, $noreg, 0, $noreg :: (load (s32) from %ir.c, !alias.scope ![[AA_SCOPE:[0-9]+]])
$xmm0 = MOVSSrm_alt $rsi, 1, _, 0, _ :: (load (s32) from %ir.c, !alias.scope !9)
- ; CHECK-NEXT: MOVSSmr $rdi, 1, $noreg, 20, $noreg, killed $xmm0 :: (store (s32) into %ir.arrayidx.i, !noalias !9)
+ ; CHECK-NEXT: MOVSSmr $rdi, 1, $noreg, 20, $noreg, killed $xmm0 :: (store (s32) into %ir.arrayidx.i, !noalias ![[AA_SCOPE]])
MOVSSmr $rdi, 1, _, 20, _, killed $xmm0 :: (store (s32) into %ir.arrayidx.i, !noalias !9)
$xmm0 = MOVSSrm_alt killed $rsi, 1, _, 0, _ :: (load (s32) from %ir.c)
MOVSSmr killed $rdi, 1, _, 28, _, killed $xmm0 :: (store (s32) into %ir.arrayidx)
@@ -492,7 +492,7 @@ body: |
bb.0.entry:
liveins: $rdi
; CHECK-LABEL: name: range_metadata
- ; CHECK: $al = MOV8rm killed $rdi, 1, $noreg, 0, $noreg :: (load (s8) from %ir.x, !range !11, !mem.cache_hint !12)
+ ; CHECK: $al = MOV8rm killed $rdi, 1, $noreg, 0, $noreg :: (load (s8) from %ir.x, !range !{{[0-9]+}}, !mem.cache_hint !{{[0-9]+}})
$al = MOV8rm killed $rdi, 1, _, 0, _ :: (load (s8) from %ir.x, !range !11, !mem.cache_hint !12)
RET64 $al
...
diff --git a/llvm/test/CodeGen/MIR/X86/metadata-operands.mir b/llvm/test/CodeGen/MIR/X86/metadata-operands.mir
index c80af7dd6501c..063b04e828b24 100644
--- a/llvm/test/CodeGen/MIR/X86/metadata-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/metadata-operands.mir
@@ -51,7 +51,7 @@ body: |
bb.0.entry:
liveins: $edi
; CHECK: %0:gr32 = COPY $edi
- ; CHECK-NEXT: DBG_VALUE $noreg, 0, !11, !DIExpression()
+ ; CHECK-NEXT: DBG_VALUE $noreg, 0, !{{[0-9]+}}, !DIExpression()
%0 = COPY $edi
DBG_VALUE _, 0, !12, !DIExpression(), debug-location !13
MOV32mr %stack.0.x.addr, 1, _, 0, _, %0
diff --git a/llvm/test/CodeGen/MIR/X86/pr38773.mir b/llvm/test/CodeGen/MIR/X86/pr38773.mir
index 1d4be4b23f400..32b175775f63a 100644
--- a/llvm/test/CodeGen/MIR/X86/pr38773.mir
+++ b/llvm/test/CodeGen/MIR/X86/pr38773.mir
@@ -97,14 +97,14 @@ body: |
IDIV32r killed renamable $ecx, implicit-def $eax, implicit-def dead $edx, implicit-def dead $eflags, implicit $eax, implicit killed $edx
renamable $ecx = COPY $eax
; CHECK: IDIV32r killed renamable $ecx
- ; CHECK-NEXT: DBG_VALUE $eax, $noreg, !12, !DIExpression(), debug-location !13
+ ; CHECK-NEXT: DBG_VALUE $eax, $noreg, ![[VAR:[0-9]+]], !DIExpression(), debug-location ![[LOC:[0-9]+]]
DBG_VALUE $ecx, $noreg, !12, !DIExpression(), debug-location !13
; The following mov and DBG_VALUE have been inserted after the PR was
; resolved to check that MCP will update debug users that are not
; immediately after the dead copy.
; CHECK-NEXT: $edx = MOV32r0
$edx = MOV32r0 implicit-def dead $eflags
- ; CHECK-NEXT: DBG_VALUE $eax, $noreg, !12, !DIExpression(), debug-location !13
+ ; CHECK-NEXT: DBG_VALUE $eax, $noreg, ![[VAR]], !DIExpression(), debug-location ![[LOC]]
DBG_VALUE $ecx, $noreg, !12, !DIExpression(), debug-location !13
$eax = COPY killed renamable $ecx
RET 0, $eax
diff --git a/llvm/test/CodeGen/MIR/X86/stack-object-debug-info.mir b/llvm/test/CodeGen/MIR/X86/stack-object-debug-info.mir
index 416f8cfbaed0a..c34622fe8512a 100644
--- a/llvm/test/CodeGen/MIR/X86/stack-object-debug-info.mir
+++ b/llvm/test/CodeGen/MIR/X86/stack-object-debug-info.mir
@@ -54,8 +54,8 @@ frameInfo:
# CHECK: stack:
# CHECK: - { id: 0, name: y.i, type: default, offset: 0, size: 256, alignment: 16,
# CHECK-NEXT: callee-saved-register: '', callee-saved-restored: true,
-# CHECK-NEXT: debug-info-variable: '!4', debug-info-expression: '!DIExpression()',
-# CHECK-NEXT: debug-info-location: '!12' }
+# CHECK-NEXT: debug-info-variable: '!{{[0-9]+}}', debug-info-expression: '!DIExpression()',
+# CHECK-NEXT: debug-info-location: '!{{[0-9]+}}' }
stack:
- { id: 0, name: y.i, offset: 0, size: 256, alignment: 16,
debug-info-variable: '!4', debug-info-expression: '!DIExpression()',
diff --git a/llvm/test/CodeGen/X86/win64-eh-unwindv2-too-many-instr.mir b/llvm/test/CodeGen/X86/win64-eh-unwindv2-too-many-instr.mir
index f69670c61caf0..2e03b7e01a837 100644
--- a/llvm/test/CodeGen/X86/win64-eh-unwindv2-too-many-instr.mir
+++ b/llvm/test/CodeGen/X86/win64-eh-unwindv2-too-many-instr.mir
@@ -69,6 +69,10 @@ body: |
...
# CHECK-LABEL: too_many_instr
+# CHECK: machineMetadataNodes:
+# CHECK-NEXT: - '![[LOC3:[0-9]+]] = !DILocation(line: 3, column: 1, scope: !6)'
+# CHECK-NEXT: - '![[LOC4:[0-9]+]] = !DILocation(line: 4, column: 1, scope: !6)'
+# CHECK-NEXT: - '![[LOC5:[0-9]+]] = !DILocation(line: 5, column: 1, scope: !6)'
# CHECK-LABEL: bb.0.entry:
# bb.1 + bb.2 have enough instructions that bb.0 has its own info.
# ALLOWLESS: SEH_SplitChainedAtEndOfBlock
@@ -80,17 +84,17 @@ body: |
# bb.2 doesn't fill the current info, so bb.1 gets added as well.
# CHECK-NOT: SEH_SplitChainedAtEndOfBlock
# CHECK: SEH_UnwindV2Start
-# CHECK: RET64 debug-location !{{[0-9]+}}
+# CHECK: RET64 debug-location ![[LOC3]]
# CHECK-LABEL: bb.2
# bb.3 has enough instructions by itself that bb.2 needs to split.
# ALLOWLESS-NEXT: SEH_SplitChainedAtEndOfBlock
# ALLOWMORE-NOT: SEH_SplitChainedAtEndOfBlock
# CHECK: SEH_UnwindV2Start
-# CHECK: RET64 debug-location !{{[0-9]+}}
+# CHECK: RET64 debug-location ![[LOC4]]
# CHECK-LABEL: bb.3
# Never split at the end.
# CHECK-NOT: SEH_SplitChainedAtEndOfBlock
# CHECK: SEH_UnwindV2Start
-# CHECK: RET64 debug-location !{{[0-9]+}}
+# CHECK: RET64 debug-location ![[LOC5]]
diff --git a/llvm/test/DebugInfo/MIR/AArch64/no-dbg-value-after-terminator.mir b/llvm/test/DebugInfo/MIR/AArch64/no-dbg-value-after-terminator.mir
index 34c099f27becb..586e5abc16e8b 100644
--- a/llvm/test/DebugInfo/MIR/AArch64/no-dbg-value-after-terminator.mir
+++ b/llvm/test/DebugInfo/MIR/AArch64/no-dbg-value-after-terminator.mir
@@ -5,7 +5,7 @@
# CHECK-NEXT: - function: f1
# CHECK-NEXT: - basic block: %bb.0
# CHECK-NEXT: - instruction: DBG_VALUE $noreg, $noreg, !"1", !DIExpression(DW_OP_LLVM_entry_value, 1)
-# CHECK-NEXT: First terminator was: RET undef $lr, debug-location !12; /tmp/foo.ll:2:1
+# CHECK-NEXT: First terminator was: RET undef $lr, debug-location !26; /tmp/foo.ll:2:1
--- |
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
diff --git a/llvm/test/DebugInfo/MIR/X86/merge-inline-loc1.mir b/llvm/test/DebugInfo/MIR/X86/merge-inline-loc1.mir
index db373913a70fd..c740d551913ba 100644
--- a/llvm/test/DebugInfo/MIR/X86/merge-inline-loc1.mir
+++ b/llvm/test/DebugInfo/MIR/X86/merge-inline-loc1.mir
@@ -217,8 +217,8 @@ body: |
# CHECK-DAG: [[INLINER:![0-9]+]] = distinct !DISubprogram(name: "multiple_inl_one_loc"
# CHECK-DAG: [[INLINEE:![0-9]+]] = distinct !DISubprogram(name: "inl1"
# CHECK: machineMetadataNodes:
-# CHECK-DAG: - '[[MERGED_AT:![0-9]+]] = !DILocation(line: 0, scope: [[INLINER]])'
-# CHECK-DAG: - '[[MERGED_LOC:![0-9]+]] = !DILocation(line: 6, column: 5, scope: [[INLINEE]], inlinedAt: [[MERGED_AT]])'
+# CHECK-NEXT: - '[[MERGED_LOC:![0-9]+]] = !DILocation(line: 6, column: 5, scope: [[INLINEE]], inlinedAt: [[MERGED_INLINE_AT:![0-9]+]])'
+# CHECK-NEXT: - '[[MERGED_INLINE_AT]] = !DILocation(line: 0, scope: [[INLINER]])'
# CHECK-NOT: CALL64pcrel32
# CHECK: CALL64pcrel32 target-flags(x86-plt) @abort, {{.*}} debug-location [[MERGED_LOC]]
diff --git a/llvm/test/DebugInfo/MIR/X86/merge-inline-loc2.mir b/llvm/test/DebugInfo/MIR/X86/merge-inline-loc2.mir
index 9dde35d982188..d40228bb1d031 100644
--- a/llvm/test/DebugInfo/MIR/X86/merge-inline-loc2.mir
+++ b/llvm/test/DebugInfo/MIR/X86/merge-inline-loc2.mir
@@ -334,8 +334,8 @@ body: |
# CHECK-DAG: [[INLINER:![0-9]+]] = distinct !DISubprogram(name: "multiple_inl_multiple_loc"
# CHECK-DAG: [[INLINEE:![0-9]+]] = distinct !DISubprogram(name: "inl2"
# CHECK: machineMetadataNodes:
-# CHECK-DAG: - '[[MERGED_AT:![0-9]+]] = !DILocation(line: 0, scope: [[INLINER]])'
-# CHECK-DAG: - '[[MERGED_LOC:![0-9]+]] = !DILocation(line: 0, scope: [[INLINEE]], inlinedAt: [[MERGED_AT]])'
+# CHECK-NEXT: - '[[MERGED_LOC:![0-9]+]] = !DILocation(line: 0, scope: [[INLINEE]], inlinedAt: [[MERGED_INLINE_AT:![0-9]+]])'
+# CHECK-NEXT: - '[[MERGED_INLINE_AT]] = !DILocation(line: 0, scope: [[INLINER]])'
# CHECK-NOT: CALL64pcrel32
# CHECK: CALL64pcrel32 target-flags(x86-plt) @abort, {{.*}} debug-location [[MERGED_LOC]]
diff --git a/llvm/test/DebugInfo/X86/branch-folder-dbg-after-end.mir b/llvm/test/DebugInfo/X86/branch-folder-dbg-after-end.mir
index 017e131cbc5a9..7a2c02c49a351 100644
--- a/llvm/test/DebugInfo/X86/branch-folder-dbg-after-end.mir
+++ b/llvm/test/DebugInfo/X86/branch-folder-dbg-after-end.mir
@@ -7,11 +7,12 @@
## Note the MIR doesn't match the IR as it's modified from:
## /home/och/dev/llvm-project/llvm/test/DebugInfo/X86/branch-folder-dbg.mir
-# CHECK: - '[[MERGED_LOC:![0-9]+]] = !DILocation(line: 0,
+# CHECK: machineMetadataNodes:
+# CHECK-NEXT: - '![[MERGED_LOC:[0-9]+]] = !DILocation(line: 0, scope: ![[#]])'
# CHECK: bb.0
# CHECK: CALL64pcrel32 @f, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
## --- Start splice from bb.2.if.else (and debug instructions from bb.1.if.then) ---
-# CHECK-NEXT: $edi = MOV32r0 implicit-def dead $eflags, debug-location [[MERGED_LOC]]
+# CHECK-NEXT: $edi = MOV32r0 implicit-def dead $eflags, debug-location ![[MERGED_LOC]]
# CHECK-NEXT: DBG_VALUE $noreg, $noreg, ![[#]], !DIExpression(), debug-location
# CHECK-NEXT: DBG_VALUE $noreg, $noreg, ![[#]], !DIExpression(), debug-location
## --- End splice ------------------------------------------------------------------
diff --git a/llvm/test/Other/legacy-callgraph-scc-pass-printer.ll b/llvm/test/Other/legacy-callgraph-scc-pass-printer.ll
index fda04f6740575..341584508ea79 100644
--- a/llvm/test/Other/legacy-callgraph-scc-pass-printer.ll
+++ b/llvm/test/Other/legacy-callgraph-scc-pass-printer.ll
@@ -1,11 +1,22 @@
; RUN: llc -mtriple=x86_64-unknown-linux-gnu -enable-ipra \
; RUN: -print-after=DummyCGSCCPass -o - %s 2>&1 | FileCheck %s
+; RUN: llc -mtriple=x86_64-unknown-linux-gnu -enable-ipra \
+; RUN: -print-after=DummyCGSCCPass -print-module-scope -o - %s 2>&1 \
+; RUN: | FileCheck %s --check-prefix=PERSISTENT
; REQUIRES: x86-registered-target
; The legacy CallGraphSCCPass printer should emit the banner as its own line.
; CHECK-LABEL: *** IR Dump After DummyCGSCCPass (DummyCGSCCPass) ***
; CHECK-NEXT: define void @bar() {
+; PERSISTENT-LABEL: *** IR Dump After DummyCGSCCPass (DummyCGSCCPass) ***
+; PERSISTENT: define void @bar() {
+; PERSISTENT: ret void, !annotation ![[USED:[0-9]+]]
+; PERSISTENT: ![[USED]] = !{!"used"}
+
define void @bar() {
- ret void
+ ret void, !annotation !1
}
+
+!0 = !{!"unused"}
+!1 = !{!"used"}
diff --git a/llvm/test/Other/print-changed-persistent-metadata-ids.ll b/llvm/test/Other/print-changed-persistent-metadata-ids.ll
new file mode 100644
index 0000000000000..01cb0eb3fb548
--- /dev/null
+++ b/llvm/test/Other/print-changed-persistent-metadata-ids.ll
@@ -0,0 +1,77 @@
+; RUN: opt -passes=instsimplify -filter-print-funcs=second \
+; RUN: -print-changed=quiet -disable-output < %s 2>&1 | FileCheck %s --check-prefix=CHANGED
+; RUN: opt -passes=instsimplify -filter-print-funcs=second \
+; RUN: -print-before=instsimplify -print-after=instsimplify \
+; RUN: -disable-output < %s 2>&1 | FileCheck %s --check-prefix=STABLE
+; RUN: opt -passes='function(instsimplify),globaldce' -filter-print-funcs=second \
+; RUN: -print-changed=quiet -print-module-scope -disable-output < %s 2>&1 \
+; RUN: | FileCheck %s --check-prefix=CROSS-KIND
+; RUN: opt -passes='function(instsimplify),print' -disable-output < %s 2> %t
+; RUN: FileCheck %s --check-prefix=SPARSE < %t
+; RUN: opt -disable-output < %t
+; RUN: opt -S -passes='function(instsimplify)' < %s \
+; RUN: | FileCheck %s --check-prefix=COMPACT
+
+declare i32 @opaque(i32)
+
+ at dead = internal global i32 0
+
+define i32 @first(i32 %arg) #0 {
+ %keep = call i32 @opaque(i32 %arg)
+ ret i32 %keep
+}
+
+define i32 @second(i32 %arg) #1 {
+ %constant = add i32 2, 3, !annotation !0
+ %keep = call i32 @opaque(i32 %arg), !annotation !1, !other !3
+ %result = add i32 %keep, %constant
+ ret i32 %result
+}
+
+!0 = !{!"removed metadata"}
+!1 = !{!2}
+!2 = !{!"second metadata"}
+!3 = !{!"other metadata"}
+
+attributes #0 = { nounwind }
+attributes #1 = { noinline }
+
+; CHANGED: *** IR Dump After InstSimplifyPass on second ***
+; CHANGED: define i32 @second(i32 %arg) #1 {
+; CHANGED: %keep = call i32 @opaque(i32 %arg)
+; CHANGED-SAME: !annotation ![[ANNOTATION:[0-9]+]], !other ![[OTHER:[0-9]+]]
+
+; STABLE: *** IR Dump Before InstSimplifyPass on second ***
+; STABLE: %constant = add i32 2, 3, !annotation !{{[0-9]+}}
+; STABLE: %keep = call i32 @opaque(i32 %arg)
+; STABLE-SAME: !annotation ![[STABLE_ANNOTATION:[0-9]+]], !other ![[STABLE_OTHER:[0-9]+]]
+; STABLE: *** IR Dump After InstSimplifyPass on second ***
+; STABLE-NOT: %constant
+; STABLE: %keep = call i32 @opaque(i32 %arg)
+; STABLE-SAME: !annotation ![[STABLE_ANNOTATION]], !other ![[STABLE_OTHER]]
+
+; CROSS-KIND: *** IR Dump After InstSimplifyPass on second ***
+; CROSS-KIND: @dead = internal global i32 0
+; CROSS-KIND: define i32 @second(i32 %arg) #1 {
+; CROSS-KIND: %keep = call i32 @opaque(i32 %arg)
+; CROSS-KIND-SAME: !annotation ![[CROSS_ANNOTATION:[0-9]+]], !other ![[CROSS_OTHER:[0-9]+]]
+; CROSS-KIND: *** IR Dump After GlobalDCEPass on [module] ***
+; CROSS-KIND-NOT: @dead
+; CROSS-KIND: define i32 @second(i32 %arg) #1 {
+; CROSS-KIND: %keep = call i32 @opaque(i32 %arg)
+; CROSS-KIND-SAME: !annotation ![[CROSS_ANNOTATION]], !other ![[CROSS_OTHER]]
+
+; SPARSE: define i32 @second(i32 %arg) #1 {
+; SPARSE: %keep = call i32 @opaque(i32 %arg)
+; SPARSE-SAME: !annotation ![[SPARSE_ANNOTATION:[1-9][0-9]*]], !other ![[SPARSE_OTHER:[0-9]+]]
+; SPARSE-NOT: !0 =
+; SPARSE: ![[SPARSE_ANNOTATION]] = !{![[SPARSE_NESTED:[0-9]+]]}
+; SPARSE-DAG: ![[SPARSE_NESTED]] = !{!"second metadata"}
+; SPARSE-DAG: ![[SPARSE_OTHER]] = !{!"other metadata"}
+
+; COMPACT: define i32 @second(i32 %arg) #1 {
+; COMPACT: %keep = call i32 @opaque(i32 %arg)
+; COMPACT-SAME: !annotation !0, !other !2
+; COMPACT: !0 = !{!1}
+; COMPACT: !1 = !{!"second metadata"}
+; COMPACT: !2 = !{!"other metadata"}
diff --git a/llvm/test/Other/print-persistent-metadata-ids.ll b/llvm/test/Other/print-persistent-metadata-ids.ll
new file mode 100644
index 0000000000000..79ae153353d02
--- /dev/null
+++ b/llvm/test/Other/print-persistent-metadata-ids.ll
@@ -0,0 +1,94 @@
+; RUN: opt -S -passes=no-op-module < %s | FileCheck %s --check-prefix=COMPACT
+; RUN: opt -disable-output -passes=print < %s 2>&1 | FileCheck %s --check-prefix=PERSISTENT-MODULE
+; RUN: opt -disable-output -passes=print < %s 2> %t
+; RUN: opt -disable-output < %t
+; RUN: opt -disable-output -passes='function(print)' -filter-print-funcs=second \
+; RUN: < %s 2>&1 | FileCheck %s --check-prefix=PERSISTENT-FUNCTION
+; RUN: opt -disable-output -passes='function(no-op-function)' \
+; RUN: -print-before=no-op-function -filter-print-funcs=second \
+; RUN: < %s 2>&1 | FileCheck %s --check-prefix=PERSISTENT-FUNCTION
+; RUN: opt -disable-output -passes='function(no-op-function)' -print-after-all \
+; RUN: -filter-print-funcs=second < %s 2>&1 | FileCheck %s --check-prefix=PERSISTENT-FUNCTION
+; RUN: opt -disable-output -passes=no-op-module -print-before=no-op-module \
+; RUN: -filter-print-funcs=first,second < %s 2>&1 | FileCheck %s --check-prefix=PERSISTENT-MULTI
+; RUN: opt -disable-output -passes='loop(no-op-loop)' -print-before=no-op-loop \
+; RUN: -filter-print-funcs=loop < %s 2>&1 | FileCheck %s --check-prefix=PERSISTENT-LOOP
+; RUN: opt -disable-output -passes='print,function(print)' < %s 2>&1 | FileCheck %s --check-prefix=SAME-ID
+$group = comdat any
+
+ at named = global ptr @0, comdat($group), !annotation !5
+ at 0 = global i32 0
+ at 1 = global i32 1
+
+declare void @callee(ptr)
+
+define void @first() #0 {
+ call void @callee(ptr @0) #1
+ call void @callee(ptr @1) #1
+ ret void, !annotation !1
+}
+
+define void @second() {
+ call void @callee(ptr @1) #1, !annotation !3
+ ret void, !annotation !3
+}
+
+define void @loop() {
+entry:
+ call void @callee(ptr @0) #1
+ call void @callee(ptr @1) #1
+ br label %loop
+
+loop:
+ call void @callee(ptr @1) #1
+ br i1 false, label %loop, label %exit
+
+exit:
+ ret void
+}
+
+attributes #0 = { noinline }
+attributes #1 = { nounwind }
+
+!named = !{!0}
+!0 = !{!"named metadata"}
+!1 = !{!2}
+!2 = !{!"first metadata"}
+!3 = !{!4}
+!4 = !{!"second metadata"}
+!5 = !{!6}
+!6 = !{!"global metadata"}
+
+; COMPACT: @named = global ptr @0, comdat($group), !annotation !0
+; COMPACT: ret void, !annotation !3
+; COMPACT: call void @callee(ptr @1) #1, !annotation !5
+; COMPACT: ret void, !annotation !5
+; COMPACT: !named = !{!2}
+
+; PERSISTENT-MODULE: @named = global ptr @0, comdat($group), !annotation ![[GLOBAL:[0-9]+]]
+; PERSISTENT-MODULE: ret void, !annotation ![[FIRST:[0-9]+]]
+; PERSISTENT-MODULE: call void @callee(ptr @1) #1, !annotation ![[SECOND:[0-9]+]]
+; PERSISTENT-MODULE: ret void, !annotation ![[SECOND]]
+; PERSISTENT-MODULE: !named = !{![[NAMED:[0-9]+]]}
+
+; PERSISTENT-FUNCTION: define void @second() {
+; PERSISTENT-FUNCTION: call void @callee(ptr @1) #1, !annotation ![[SECOND:[0-9]+]]
+; PERSISTENT-FUNCTION: ret void, !annotation ![[SECOND]]
+
+; PERSISTENT-MULTI: define void @first() #0 {
+; PERSISTENT-MULTI: call void @callee(ptr @0) #1
+; PERSISTENT-MULTI: call void @callee(ptr @1) #1
+; PERSISTENT-MULTI: define void @second() {
+; PERSISTENT-MULTI: call void @callee(ptr @1) #1
+
+; PERSISTENT-LOOP: ; Preheader:
+; PERSISTENT-LOOP: call void @callee(ptr @0) #1
+; PERSISTENT-LOOP: call void @callee(ptr @1) #1
+; PERSISTENT-LOOP: ; Loop:
+; PERSISTENT-LOOP: call void @callee(ptr @1) #1
+
+; SAME-ID: define void @second() {
+; SAME-ID: call void @callee(ptr @1) #1, !annotation ![[SAME_SECOND:[0-9]+]]
+; SAME-ID: ![[SAME_SECOND]] = !{!{{[0-9]+}}}
+; SAME-ID: define void @second() {
+; SAME-ID: call void @callee(ptr @1) #1, !annotation ![[SAME_SECOND]]
diff --git a/llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/loop-distribute.ll.expected b/llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/loop-distribute.ll.expected
index b2cd7cc79a70c..e3e62c44f6ce4 100644
--- a/llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/loop-distribute.ll.expected
+++ b/llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/loop-distribute.ll.expected
@@ -72,12 +72,12 @@ define void @ldist(i1 %cond, ptr %A, ptr %B, ptr %C) {
; CHECK-NEXT: LDist: Partition 0:
; CHECK-NEXT: for.body.ldist1: ; preds = %if.end.ldist1, %for.body.ph.ldist1
; CHECK-NEXT: %iv.ldist1 = phi i16 [ 0, %for.body.ph.ldist1 ], [ %iv.next.ldist1, %if.end.ldist1 ]
-; CHECK-NEXT: %lv.ldist1 = load i16, ptr %A, align 1, !alias.scope !2, !noalias !5
-; CHECK-NEXT: store i16 %lv.ldist1, ptr %A, align 1, !alias.scope !2, !noalias !5
+; CHECK-NEXT: %lv.ldist1 = load i16, ptr %A, align 1, !alias.scope !5, !noalias !4
+; CHECK-NEXT: store i16 %lv.ldist1, ptr %A, align 1, !alias.scope !5, !noalias !4
; CHECK-NEXT: br i1 %cond, label %if.then.ldist1, label %if.end.ldist1
; CHECK-EMPTY:
; CHECK-NEXT: if.then.ldist1: ; preds = %for.body.ldist1
-; CHECK-NEXT: %lv2.ldist1 = load i16, ptr %A, align 1, !alias.scope !2, !noalias !5
+; CHECK-NEXT: %lv2.ldist1 = load i16, ptr %A, align 1, !alias.scope !5, !noalias !4
; CHECK-NEXT: br label %if.end.ldist1
; CHECK-EMPTY:
; CHECK-NEXT: if.end.ldist1: ; preds = %if.then.ldist1, %for.body.ldist1
diff --git a/llvm/test/tools/llvm-debuginfo-analyzer/IR/01-ir-print-basic-details.test b/llvm/test/tools/llvm-debuginfo-analyzer/IR/01-ir-print-basic-details.test
index 51a807942c48e..b11128d164ea7 100644
--- a/llvm/test/tools/llvm-debuginfo-analyzer/IR/01-ir-print-basic-details.test
+++ b/llvm/test/tools/llvm-debuginfo-analyzer/IR/01-ir-print-basic-details.test
@@ -40,11 +40,11 @@
; ONE-NEXT: [003] {Block}
; ONE-NEXT: [004] 5 {Variable} 'CONSTANT' -> 'const INTEGER'
; ONE-NEXT: [004] 5 {Line}
-; ONE-NEXT: [004] {Code} 'store i32 7, ptr %CONSTANT, align 4, !dbg !32'
+; ONE-NEXT: [004] {Code} 'store i32 7, ptr %CONSTANT, align 4, !dbg !{{[0-9]+}}'
; ONE-NEXT: [004] 6 {Line}
-; ONE-NEXT: [004] {Code} 'store i32 7, ptr %retval, align 4, !dbg !33'
+; ONE-NEXT: [004] {Code} 'store i32 7, ptr %retval, align 4, !dbg !{{[0-9]+}}'
; ONE-NEXT: [004] 6 {Line}
-; ONE-NEXT: [004] {Code} 'br label %return, !dbg !33'
+; ONE-NEXT: [004] {Code} 'br label %return, !dbg !{{[0-9]+}}'
; ONE-NEXT: [003] 2 {Parameter} 'ParamPtr' -> 'INTPTR'
; ONE-NEXT: [003] 2 {Parameter} 'ParamUnsigned' -> 'unsigned int'
; ONE-NEXT: [003] 2 {Parameter} 'ParamBool' -> 'bool'
@@ -60,19 +60,19 @@
; ONE-NEXT: [003] {Code} '%storedv = zext i1 %ParamBool to i8'
; ONE-NEXT: [003] {Code} 'store i8 %storedv, ptr %ParamBool.addr, align 1'
; ONE-NEXT: [003] 8 {Line}
-; ONE-NEXT: [003] {Code} '%1 = load i32, ptr %ParamUnsigned.addr, align 4, !dbg !34'
+; ONE-NEXT: [003] {Code} '%1 = load i32, ptr %ParamUnsigned.addr, align 4, !dbg !{{[0-9]+}}'
; ONE-NEXT: [003] 8 {Line}
-; ONE-NEXT: [003] {Code} 'store i32 %1, ptr %retval, align 4, !dbg !35'
+; ONE-NEXT: [003] {Code} 'store i32 %1, ptr %retval, align 4, !dbg !{{[0-9]+}}'
; ONE-NEXT: [003] 8 {Line}
-; ONE-NEXT: [003] {Code} 'br label %return, !dbg !35'
+; ONE-NEXT: [003] {Code} 'br label %return, !dbg !{{[0-9]+}}'
; ONE-NEXT: [003] 9 {Line}
-; ONE-NEXT: [003] {Code} '%2 = load i32, ptr %retval, align 4, !dbg !36'
+; ONE-NEXT: [003] {Code} '%2 = load i32, ptr %retval, align 4, !dbg !{{[0-9]+}}'
; ONE-NEXT: [003] 9 {Line}
-; ONE-NEXT: [003] {Code} 'ret i32 %2, !dbg !36'
+; ONE-NEXT: [003] {Code} 'ret i32 %2, !dbg !{{[0-9]+}}'
; ONE-NEXT: [003] 3 {Line}
-; ONE-NEXT: [003] {Code} '%0 = load i8, ptr %ParamBool.addr, align 1, !dbg !26'
+; ONE-NEXT: [003] {Code} '%0 = load i8, ptr %ParamBool.addr, align 1, !dbg !{{[0-9]+}}'
; ONE-NEXT: [003] 3 {Line}
-; ONE-NEXT: [003] {Code} '%loadedv = trunc i8 %0 to i1, !dbg !26'
+; ONE-NEXT: [003] {Code} '%loadedv = trunc i8 %0 to i1, !dbg !{{[0-9]+}}'
; ONE-NEXT: [003] 3 {Line}
-; ONE-NEXT: [003] {Code} 'br i1 %loadedv, label %if.then, label %if.end, !dbg !26'
+; ONE-NEXT: [003] {Code} 'br i1 %loadedv, label %if.then, label %if.end, !dbg !{{[0-9]+}}'
; ONE-NEXT: [002] 1 {TypeAlias} 'INTPTR' -> '* const int'
diff --git a/llvm/test/tools/llvm-debuginfo-analyzer/IR/01-ir-select-logical-elements.test b/llvm/test/tools/llvm-debuginfo-analyzer/IR/01-ir-select-logical-elements.test
index 51bbb30c1d97e..cae4183e7253f 100644
--- a/llvm/test/tools/llvm-debuginfo-analyzer/IR/01-ir-select-logical-elements.test
+++ b/llvm/test/tools/llvm-debuginfo-analyzer/IR/01-ir-select-logical-elements.test
@@ -30,16 +30,16 @@
; ONE-NEXT: [000] {File} 'test-clang.ll'
; ONE-EMPTY:
; ONE-NEXT: [001] {CompileUnit} 'test.cpp'
-; ONE-NEXT: [003] {Code} '%0 = load i8, ptr %ParamBool.addr, align 1, !dbg !26'
-; ONE-NEXT: [003] {Code} '%1 = load i32, ptr %ParamUnsigned.addr, align 4, !dbg !34'
-; ONE-NEXT: [003] {Code} '%2 = load i32, ptr %retval, align 4, !dbg !36'
-; ONE-NEXT: [003] {Code} '%loadedv = trunc i8 %0 to i1, !dbg !26'
+; ONE-NEXT: [003] {Code} '%0 = load i8, ptr %ParamBool.addr, align 1, !dbg !{{[0-9]+}}'
+; ONE-NEXT: [003] {Code} '%1 = load i32, ptr %ParamUnsigned.addr, align 4, !dbg !{{[0-9]+}}'
+; ONE-NEXT: [003] {Code} '%2 = load i32, ptr %retval, align 4, !dbg !{{[0-9]+}}'
+; ONE-NEXT: [003] {Code} '%loadedv = trunc i8 %0 to i1, !dbg !{{[0-9]+}}'
; ONE-NEXT: [003] {Code} '%storedv = zext i1 %ParamBool to i8'
-; ONE-NEXT: [003] {Code} 'br i1 %loadedv, label %if.then, label %if.end, !dbg !26'
-; ONE-NEXT: [003] {Code} 'store i32 %1, ptr %retval, align 4, !dbg !35'
+; ONE-NEXT: [003] {Code} 'br i1 %loadedv, label %if.then, label %if.end, !dbg !{{[0-9]+}}'
+; ONE-NEXT: [003] {Code} 'store i32 %1, ptr %retval, align 4, !dbg !{{[0-9]+}}'
; ONE-NEXT: [003] {Code} 'store i32 %ParamUnsigned, ptr %ParamUnsigned.addr, align 4'
-; ONE-NEXT: [004] {Code} 'store i32 7, ptr %CONSTANT, align 4, !dbg !32'
-; ONE-NEXT: [004] {Code} 'store i32 7, ptr %retval, align 4, !dbg !33'
+; ONE-NEXT: [004] {Code} 'store i32 7, ptr %CONSTANT, align 4, !dbg !{{[0-9]+}}'
+; ONE-NEXT: [004] {Code} 'store i32 7, ptr %retval, align 4, !dbg !{{[0-9]+}}'
; ONE-NEXT: [003] {Code} 'store i8 %storedv, ptr %ParamBool.addr, align 1'
; ONE-NEXT: [003] {Code} 'store ptr %ParamPtr, ptr %ParamPtr.addr, align 8'
; ONE-EMPTY:
diff --git a/llvm/test/tools/llvm-debuginfo-analyzer/IR/02-ir-logical-lines.test b/llvm/test/tools/llvm-debuginfo-analyzer/IR/02-ir-logical-lines.test
index 76272e3f677ea..8280d0f41ff6d 100644
--- a/llvm/test/tools/llvm-debuginfo-analyzer/IR/02-ir-logical-lines.test
+++ b/llvm/test/tools/llvm-debuginfo-analyzer/IR/02-ir-logical-lines.test
@@ -33,9 +33,9 @@
; ONE-NEXT: [003] {Code} '%retval = alloca i32, align 4'
; ONE-NEXT: [003] {Code} 'store i32 0, ptr %retval, align 4'
; ONE-NEXT: [003] 5 {Line}
-; ONE-NEXT: [003] {Code} '%call = call noundef i32 (ptr, ...) @_Z6printfPKcz(ptr noundef @.str), !dbg !22'
+; ONE-NEXT: [003] {Code} '%call = call noundef i32 (ptr, ...) @_Z6printfPKcz(ptr noundef @.str), !dbg !{{[0-9]+}}'
; ONE-NEXT: [003] 6 {Line}
-; ONE-NEXT: [003] {Code} 'ret i32 0, !dbg !23'
+; ONE-NEXT: [003] {Code} 'ret i32 0, !dbg !{{[0-9]+}}'
; ONE-EMPTY:
; ONE-NEXT: Logical View:
; ONE-NEXT: [000] {File} 'hello-world-dwarf-clang.o' -> elf64-x86-64
diff --git a/llvm/test/tools/llvm-debuginfo-analyzer/IR/06-ir-full-logical-view.test b/llvm/test/tools/llvm-debuginfo-analyzer/IR/06-ir-full-logical-view.test
index 3f6db431a676c..29fc246b27a21 100644
--- a/llvm/test/tools/llvm-debuginfo-analyzer/IR/06-ir-full-logical-view.test
+++ b/llvm/test/tools/llvm-debuginfo-analyzer/IR/06-ir-full-logical-view.test
@@ -51,11 +51,11 @@
; ONE-NEXT: [0x0000000000][006] {Location}
; ONE-NEXT: [0x0000000000][007] {Entry} bregx 3 ptr %CONSTANT+0
; ONE-NEXT: [0x0000000030][004] 5 {Line} '{{.*}}/general/test.cpp'
-; ONE-NEXT: [0x0000000030][004] {Code} 'store i32 7, ptr %CONSTANT, align 4, !dbg !32'
+; ONE-NEXT: [0x0000000030][004] {Code} 'store i32 7, ptr %CONSTANT, align 4, !dbg !{{[0-9]+}}'
; ONE-NEXT: [0x0000000034][004] 6 {Line} '{{.*}}/general/test.cpp'
-; ONE-NEXT: [0x0000000034][004] {Code} 'store i32 7, ptr %retval, align 4, !dbg !33'
+; ONE-NEXT: [0x0000000034][004] {Code} 'store i32 7, ptr %retval, align 4, !dbg !{{[0-9]+}}'
; ONE-NEXT: [0x0000000038][004] 6 {Line} '{{.*}}/general/test.cpp'
-; ONE-NEXT: [0x0000000038][004] {Code} 'br label %return, !dbg !33'
+; ONE-NEXT: [0x0000000038][004] {Code} 'br label %return, !dbg !{{[0-9]+}}'
; ONE-NEXT: [0x0000000014][003] 2 {Parameter} 'ParamPtr' -> [0x0000000028]'INTPTR'
; ONE-NEXT: [0x0000000014][004] {Coverage} 100.00%
; ONE-NEXT: [0x0000000000][004] {Location}
@@ -80,21 +80,21 @@
; ONE-NEXT: [0x000000001c][003] {Code} '%storedv = zext i1 %ParamBool to i8'
; ONE-NEXT: [0x0000000020][003] {Code} 'store i8 %storedv, ptr %ParamBool.addr, align 1'
; ONE-NEXT: [0x000000003c][003] 8 {Line} '{{.*}}/general/test.cpp'
-; ONE-NEXT: [0x000000003c][003] {Code} '%1 = load i32, ptr %ParamUnsigned.addr, align 4, !dbg !34'
+; ONE-NEXT: [0x000000003c][003] {Code} '%1 = load i32, ptr %ParamUnsigned.addr, align 4, !dbg !{{[0-9]+}}'
; ONE-NEXT: [0x0000000040][003] 8 {Line} '{{.*}}/general/test.cpp'
-; ONE-NEXT: [0x0000000040][003] {Code} 'store i32 %1, ptr %retval, align 4, !dbg !35'
+; ONE-NEXT: [0x0000000040][003] {Code} 'store i32 %1, ptr %retval, align 4, !dbg !{{[0-9]+}}'
; ONE-NEXT: [0x0000000044][003] 8 {Line} '{{.*}}/general/test.cpp'
-; ONE-NEXT: [0x0000000044][003] {Code} 'br label %return, !dbg !35'
+; ONE-NEXT: [0x0000000044][003] {Code} 'br label %return, !dbg !{{[0-9]+}}'
; ONE-NEXT: [0x0000000048][003] 9 {Line} '{{.*}}/general/test.cpp'
-; ONE-NEXT: [0x0000000048][003] {Code} '%2 = load i32, ptr %retval, align 4, !dbg !36'
+; ONE-NEXT: [0x0000000048][003] {Code} '%2 = load i32, ptr %retval, align 4, !dbg !{{[0-9]+}}'
; ONE-NEXT: [0x000000004c][003] 9 {Line} '{{.*}}/general/test.cpp'
-; ONE-NEXT: [0x000000004c][003] {Code} 'ret i32 %2, !dbg !36'
+; ONE-NEXT: [0x000000004c][003] {Code} 'ret i32 %2, !dbg !{{[0-9]+}}'
; ONE-NEXT: [0x0000000024][003] 3 {Line} '{{.*}}/general/test.cpp'
-; ONE-NEXT: [0x0000000024][003] {Code} '%0 = load i8, ptr %ParamBool.addr, align 1, !dbg !26'
+; ONE-NEXT: [0x0000000024][003] {Code} '%0 = load i8, ptr %ParamBool.addr, align 1, !dbg !{{[0-9]+}}'
; ONE-NEXT: [0x0000000028][003] 3 {Line} '{{.*}}/general/test.cpp'
-; ONE-NEXT: [0x0000000028][003] {Code} '%loadedv = trunc i8 %0 to i1, !dbg !26'
+; ONE-NEXT: [0x0000000028][003] {Code} '%loadedv = trunc i8 %0 to i1, !dbg !{{[0-9]+}}'
; ONE-NEXT: [0x000000002c][003] 3 {Line} '{{.*}}/general/test.cpp'
-; ONE-NEXT: [0x000000002c][003] {Code} 'br i1 %loadedv, label %if.then, label %if.end, !dbg !26'
+; ONE-NEXT: [0x000000002c][003] {Code} 'br i1 %loadedv, label %if.then, label %if.end, !dbg !{{[0-9]+}}'
; ONE-NEXT: [0x0000000024][002] {BaseType} 'int'
; ONE-NEXT: [0x0000000028][002] 1 {TypeAlias} 'INTPTR' -> [0x000000002c]'* const int'
; ONE-NEXT: [0x0000000034][002] {BaseType} 'unsigned int'
diff --git a/llvm/tools/llvm-dis/llvm-dis.cpp b/llvm/tools/llvm-dis/llvm-dis.cpp
index a961f9cb0f7dd..2a986fc145fbf 100644
--- a/llvm/tools/llvm-dis/llvm-dis.cpp
+++ b/llvm/tools/llvm-dis/llvm-dis.cpp
@@ -263,6 +263,7 @@ int main(int argc, char **argv) {
// All that llvm-dis does is write the assembly to a file.
if (!DontPrint) {
if (M) {
+ M->renumberMetadataForAssembly();
M->print(Out->os(), Annotator.get(),
/* ShouldPreserveUseListOrder */ false);
}
diff --git a/llvm/tools/llvm-extract/llvm-extract.cpp b/llvm/tools/llvm-extract/llvm-extract.cpp
index 439a4a48b350a..17ce664a64ba2 100644
--- a/llvm/tools/llvm-extract/llvm-extract.cpp
+++ b/llvm/tools/llvm-extract/llvm-extract.cpp
@@ -411,8 +411,10 @@ int main(int argc, char **argv) {
}
if (OutputAssembly)
- PM.addPass(
- PrintModulePass(Out.os(), "", /* ShouldPreserveUseListOrder */ false));
+ PM.addPass(PrintModulePass(Out.os(), "",
+ /*ShouldPreserveUseListOrder=*/false,
+ /*EmitSummaryIndex=*/false,
+ /*ShouldRenumberMetadata=*/true));
else if (Force || !CheckBitcodeOutputToConsole(Out.os()))
PM.addPass(
BitcodeWriterPass(Out.os(), /* ShouldPreserveUseListOrder */ true));
diff --git a/llvm/tools/llvm-link/llvm-link.cpp b/llvm/tools/llvm-link/llvm-link.cpp
index e49082f2d7bfb..9390301f1b75a 100644
--- a/llvm/tools/llvm-link/llvm-link.cpp
+++ b/llvm/tools/llvm-link/llvm-link.cpp
@@ -518,6 +518,7 @@ int main(int argc, char **argv) {
if (Verbose)
errs() << "Writing bitcode...\n";
if (OutputAssembly) {
+ Composite->renumberMetadataForAssembly();
Composite->print(Out.os(), nullptr, /* ShouldPreserveUseListOrder */ false);
} else if (Force || !CheckBitcodeOutputToConsole(Out.os())) {
WriteBitcodeToFile(*Composite, Out.os(),
diff --git a/llvm/tools/llvm-reduce/ReducerWorkItem.cpp b/llvm/tools/llvm-reduce/ReducerWorkItem.cpp
index fa4da7a073f1e..c483a7ef893e0 100644
--- a/llvm/tools/llvm-reduce/ReducerWorkItem.cpp
+++ b/llvm/tools/llvm-reduce/ReducerWorkItem.cpp
@@ -20,6 +20,7 @@
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineJumpTableInfo.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
+#include "llvm/CodeGen/MachineModuleSlotTracker.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/PseudoSourceValueManager.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
@@ -443,12 +444,18 @@ static std::unique_ptr<MachineFunction> cloneMF(MachineFunction *SrcMF,
void ReducerWorkItem::print(raw_ostream &ROS, void *p) const {
if (MMI) {
+ M->renumberMetadataForAssembly();
printMIR(ROS, *M);
for (Function &F : *M) {
- if (auto *MF = MMI->getMachineFunction(F))
+ if (auto *MF = MMI->getMachineFunction(F)) {
+ MachineModuleSlotTracker MST(
+ [&](const Function &F) { return MMI->getMachineFunction(F); }, MF);
+ MST.renumberMetadataForAssembly();
printMIR(ROS, *MMI, *MF);
+ }
}
} else {
+ M->renumberMetadataForAssembly();
M->print(ROS, /*AssemblyAnnotationWriter=*/nullptr,
/*ShouldPreserveUseListOrder=*/true);
}
diff --git a/llvm/tools/llvm-split/llvm-split.cpp b/llvm/tools/llvm-split/llvm-split.cpp
index e7c9d52127274..4ead6fd4b88be 100644
--- a/llvm/tools/llvm-split/llvm-split.cpp
+++ b/llvm/tools/llvm-split/llvm-split.cpp
@@ -116,7 +116,7 @@ void writeStringToFile(StringRef Content, StringRef Path) {
OS << Content << "\n";
}
-void writeModuleToFile(const Module &M, StringRef Path, bool OutputAssembly) {
+void writeModuleToFile(Module &M, StringRef Path, bool OutputAssembly) {
int FD = -1;
if (std::error_code EC = sys::fs::openFileForWrite(Path, FD)) {
errs() << formatv("error opening file: {0}, error: {1}", Path, EC.message())
@@ -125,9 +125,10 @@ void writeModuleToFile(const Module &M, StringRef Path, bool OutputAssembly) {
}
raw_fd_ostream OS(FD, /*ShouldClose*/ true);
- if (OutputAssembly)
+ if (OutputAssembly) {
+ M.renumberMetadataForAssembly();
M.print(OS, /*AssemblyAnnotationWriter*/ nullptr);
- else
+ } else
WriteBitcodeToFile(M, OS);
}
diff --git a/llvm/tools/llvm-stress/llvm-stress.cpp b/llvm/tools/llvm-stress/llvm-stress.cpp
index e3c8a5c3d51ab..e99c83c2b9bac 100644
--- a/llvm/tools/llvm-stress/llvm-stress.cpp
+++ b/llvm/tools/llvm-stress/llvm-stress.cpp
@@ -754,6 +754,7 @@ int main(int argc, char **argv) {
report_fatal_error("Broken module found, compilation aborted!");
// Output textual IR.
+ M->renumberMetadataForAssembly();
M->print(Out->os(), nullptr);
Out->keep();
diff --git a/llvm/tools/opt/NewPMDriver.cpp b/llvm/tools/opt/NewPMDriver.cpp
index 04c7b99e08cbc..4fbaf02526a87 100644
--- a/llvm/tools/opt/NewPMDriver.cpp
+++ b/llvm/tools/opt/NewPMDriver.cpp
@@ -529,7 +529,8 @@ bool llvm::runPassPipeline(
MPM.addPass(AssignGUIDPass());
}
MPM.addPass(PrintModulePass(
- Out->os(), "", ShouldPreserveAssemblyUseListOrder, EmitSummaryIndex));
+ Out->os(), "", ShouldPreserveAssemblyUseListOrder, EmitSummaryIndex,
+ /*ShouldRenumberMetadata=*/true));
break;
case OK_OutputBitcode:
if (EmitSummaryIndex) {
diff --git a/llvm/tools/opt/optdriver.cpp b/llvm/tools/opt/optdriver.cpp
index 2db4502aa449b..5333825629a27 100644
--- a/llvm/tools/opt/optdriver.cpp
+++ b/llvm/tools/opt/optdriver.cpp
@@ -930,10 +930,11 @@ optMain(int argc, char **argv,
BOS = std::make_unique<raw_svector_ostream>(Buffer);
OS = BOS.get();
}
- if (OutputAssembly)
+ if (OutputAssembly) {
Passes.add(createPrintModulePass(
- *OS, "", /* ShouldPreserveAssemblyUseListOrder */ false));
- else
+ *OS, "", /*ShouldPreserveAssemblyUseListOrder=*/false,
+ /*ShouldRenumberMetadata=*/true));
+ } else
Passes.add(createBitcodeWriterPass(
*OS, /* ShouldPreserveBitcodeUseListOrder */ true));
}
diff --git a/llvm/tools/verify-uselistorder/verify-uselistorder.cpp b/llvm/tools/verify-uselistorder/verify-uselistorder.cpp
index 8f58cc00a3dd1..95edf41e84ce4 100644
--- a/llvm/tools/verify-uselistorder/verify-uselistorder.cpp
+++ b/llvm/tools/verify-uselistorder/verify-uselistorder.cpp
@@ -75,7 +75,7 @@ struct TempFile {
FileRemover Remover;
bool init(const std::string &Ext, bool IsText = false);
bool writeBitcode(const Module &M) const;
- bool writeAssembly(const Module &M) const;
+ bool writeAssembly(Module &M) const;
std::unique_ptr<Module> readBitcode(LLVMContext &Context) const;
std::unique_ptr<Module> readAssembly(LLVMContext &Context) const;
};
@@ -137,7 +137,7 @@ bool TempFile::writeBitcode(const Module &M) const {
return false;
}
-bool TempFile::writeAssembly(const Module &M) const {
+bool TempFile::writeAssembly(Module &M) const {
LLVM_DEBUG(dbgs() << " - write assembly\n");
std::error_code EC;
raw_fd_ostream OS(Filename, EC, sys::fs::OF_TextWithCRLF);
@@ -146,6 +146,7 @@ bool TempFile::writeAssembly(const Module &M) const {
return true;
}
+ M.renumberMetadataForAssembly();
M.print(OS, nullptr, /* ShouldPreserveUseListOrder */ true);
return false;
}
@@ -379,7 +380,7 @@ static void verifyBitcodeUseListOrder(const Module &M) {
verifyAfterRoundTrip(M, F.readBitcode(Context));
}
-static void verifyAssemblyUseListOrder(const Module &M) {
+static void verifyAssemblyUseListOrder(Module &M) {
TempFile F;
if (F.init("ll", /*IsText=*/true))
report_fatal_error("failed to initialize assembly file");
@@ -391,7 +392,7 @@ static void verifyAssemblyUseListOrder(const Module &M) {
verifyAfterRoundTrip(M, F.readAssembly(Context));
}
-static void verifyUseListOrder(const Module &M) {
+static void verifyUseListOrder(Module &M) {
outs() << "verify bitcode\n";
verifyBitcodeUseListOrder(M);
outs() << "verify assembly\n";
diff --git a/llvm/unittests/AsmParser/AsmParserTest.cpp b/llvm/unittests/AsmParser/AsmParserTest.cpp
index bdfd91dbec269..631cbe5c56464 100644
--- a/llvm/unittests/AsmParser/AsmParserTest.cpp
+++ b/llvm/unittests/AsmParser/AsmParserTest.cpp
@@ -16,10 +16,12 @@
#include "llvm/IR/DebugInfoMetadata.h"
#include "llvm/IR/LLVMContext.h"
#include "llvm/IR/Module.h"
+#include "llvm/IR/ModuleSummaryIndex.h"
#include "llvm/IR/Value.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/SourceMgr.h"
+#include "llvm/Support/raw_ostream.h"
#include "gtest/gtest.h"
#define DEBUG_TYPE "unittest-asm-parser-tests"
@@ -73,6 +75,37 @@ TEST(AsmParserTest, SlotMappingTest) {
EXPECT_EQ(Mapping.MetadataNodes.count(1), 0u);
}
+TEST(AsmParserTest, ParsingPreservesMetadataIDsInOtherModules) {
+ StringRef Source = "!named = !{!0}\n!0 = distinct !{}\n";
+
+ for (bool WithIndex : {false, true}) {
+ SCOPED_TRACE(WithIndex ? "parseAssemblyWithIndex" : "parseAssembly");
+ LLVMContext Ctx;
+ SMDiagnostic Error;
+ auto Mod1 = parseAssemblyString(Source, Error, Ctx);
+ ASSERT_TRUE(Mod1) << Error.getMessage().str();
+ MDNode *Node = Mod1->getNamedMetadata("named")->getOperand(0);
+
+ auto PrintMetadataID = [&] {
+ std::string ID;
+ raw_string_ostream OS(ID);
+ Node->printAsOperand(OS, Mod1.get());
+ return ID;
+ };
+ std::string ID = PrintMetadataID();
+
+ std::unique_ptr<Module> Mod2;
+ if (WithIndex)
+ Mod2 = parseAssemblyWithIndex(MemoryBufferRef(Source, "<string>"), Error,
+ Ctx)
+ .Mod;
+ else
+ Mod2 = parseAssemblyString(Source, Error, Ctx);
+ ASSERT_TRUE(Mod2) << Error.getMessage().str();
+ EXPECT_EQ(ID, PrintMetadataID());
+ }
+}
+
TEST(AsmParserTest, TypeAndConstantValueParsing) {
LLVMContext Ctx;
SMDiagnostic Error;
diff --git a/llvm/unittests/IR/AsmWriterTest.cpp b/llvm/unittests/IR/AsmWriterTest.cpp
index 75305f4e2dea4..6c04309af810e 100644
--- a/llvm/unittests/IR/AsmWriterTest.cpp
+++ b/llvm/unittests/IR/AsmWriterTest.cpp
@@ -5,6 +5,7 @@
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
+#include "llvm/AsmParser/Parser.h"
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/IR/DebugInfoMetadata.h"
#include "llvm/IR/Function.h"
@@ -12,6 +13,7 @@
#include "llvm/IR/LLVMContext.h"
#include "llvm/IR/MDBuilder.h"
#include "llvm/IR/Module.h"
+#include "llvm/Support/SourceMgr.h"
#include "gmock/gmock.h"
#include "gtest/gtest.h"
@@ -62,6 +64,128 @@ TEST(AsmWriterTest, DumpDIExpression) {
EXPECT_EQ("!DIExpression(DW_OP_constu, 4, DW_OP_minus, DW_OP_deref)", S);
}
+TEST(AsmWriterTest, PersistentBasicBlockPrint) {
+ LLVMContext Ctx;
+ SMDiagnostic Err;
+ std::unique_ptr<Module> M = parseAssemblyString(R"(
+ @0 = global i32 0
+
+ declare void @use(ptr)
+
+ define void @f() !dbg !6 {
+ call void @use(ptr @0), !annotation !12
+ #dbg_value(i32 0, !9, !DIExpression(DW_OP_constu, 4), !11)
+ ret void, !annotation !12
+ }
+
+ define void @g() {
+ ret void
+ }
+
+ !llvm.dbg.cu = !{!0}
+ !llvm.module.flags = !{!5}
+
+ !0 = distinct !DICompileUnit(language: DW_LANG_C, file: !1, producer: "test", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
+ !1 = !DIFile(filename: "t.ll", directory: "/")
+ !2 = !{}
+ !5 = !{i32 2, !"Debug Info Version", i32 3}
+ !6 = distinct !DISubprogram(name: "f", scope: null, file: !1, line: 1, type: !7, scopeLine: 1, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !8)
+ !7 = !DISubroutineType(types: !2)
+ !8 = !{!9}
+ !9 = !DILocalVariable(name: "x", scope: !6, file: !1, line: 1, type: !10)
+ !10 = !DIBasicType(name: "i32", size: 32, encoding: DW_ATE_unsigned)
+ !11 = !DILocation(line: 1, column: 1, scope: !6)
+ !12 = !{!"annotation"}
+ )",
+ Err, Ctx);
+ ASSERT_NE(M, nullptr);
+
+ std::string First;
+ raw_string_ostream FirstOS(First);
+ M->getFunction("f")->getEntryBlock().print(FirstOS);
+
+ std::string Second;
+ raw_string_ostream SecondOS(Second);
+ M->getFunction("f")->getEntryBlock().print(SecondOS);
+
+ EXPECT_EQ(First, Second);
+ EXPECT_THAT(First, HasSubstr("call void @use(ptr @0), !annotation !"));
+ EXPECT_THAT(First, HasSubstr("#dbg_value(i32 0, !"));
+ EXPECT_THAT(First, HasSubstr("!DIExpression(DW_OP_constu, 4)"));
+ EXPECT_THAT(First, HasSubstr("ret void, !annotation !"));
+
+ MDNode *Earlier = MDNode::getDistinct(Ctx, MDString::get(Ctx, "earlier"));
+ M->getFunction("f")->getEntryBlock().getTerminator()->setMetadata("order",
+ Earlier);
+ MDNode *Later = MDNode::getDistinct(Ctx, MDString::get(Ctx, "later"));
+ M->getFunction("g")->getEntryBlock().getTerminator()->setMetadata("order",
+ Later);
+
+ std::string LaterOutput;
+ raw_string_ostream LaterOS(LaterOutput);
+ M->getFunction("g")->getEntryBlock().print(LaterOS);
+
+ std::string EarlierOutput;
+ raw_string_ostream EarlierOS(EarlierOutput);
+ M->getFunction("f")->getEntryBlock().print(EarlierOS);
+
+ StringRef MetadataPrefix = "!order !";
+ size_t EarlierPos = EarlierOutput.find(MetadataPrefix);
+ size_t LaterPos = LaterOutput.find(MetadataPrefix);
+ ASSERT_NE(EarlierPos, StringRef::npos);
+ ASSERT_NE(LaterPos, StringRef::npos);
+ StringRef EarlierIDText =
+ StringRef(EarlierOutput).drop_front(EarlierPos + MetadataPrefix.size());
+ StringRef LaterIDText =
+ StringRef(LaterOutput).drop_front(LaterPos + MetadataPrefix.size());
+ unsigned EarlierID;
+ unsigned LaterID;
+ ASSERT_FALSE(EarlierIDText.consumeInteger(10, EarlierID));
+ ASSERT_FALSE(LaterIDText.consumeInteger(10, LaterID));
+ EXPECT_LT(EarlierID, LaterID);
+}
+
+TEST(AsmWriterTest, PersistentPrintTemporaryMetadata) {
+ LLVMContext Ctx;
+ Module M("test", Ctx);
+ Function *F = Function::Create(
+ FunctionType::get(Type::getVoidTy(Ctx), /*isVarArg=*/false),
+ Function::ExternalLinkage, "f", M);
+ BasicBlock *BB = BasicBlock::Create(Ctx, "entry", F);
+ ReturnInst *Ret = ReturnInst::Create(Ctx, BB);
+
+ MDNode *Permanent = MDNode::getDistinct(Ctx, MDString::get(Ctx, "permanent"));
+ TempMDNode Temporary = MDNode::getTemporary(Ctx, Permanent);
+ Ret->setMetadata("permanent", Permanent);
+ Ret->setMetadata("temporary", Temporary.get());
+
+ std::string FunctionText;
+ raw_string_ostream FunctionOS(FunctionText);
+ F->print(FunctionOS);
+ EXPECT_THAT(FunctionText, HasSubstr("!permanent !0"));
+ EXPECT_THAT(FunctionText, HasSubstr("!temporary !1"));
+
+ std::string BasicBlockText;
+ raw_string_ostream BasicBlockOS(BasicBlockText);
+ BB->print(BasicBlockOS);
+ EXPECT_THAT(BasicBlockText, HasSubstr("!permanent !0"));
+ EXPECT_THAT(BasicBlockText, HasSubstr("!temporary !1"));
+
+ std::string ModuleText;
+ raw_string_ostream ModuleOS(ModuleText);
+ M.print(ModuleOS, nullptr);
+ EXPECT_THAT(ModuleText, HasSubstr("!0 = distinct !{!\"permanent\"}"));
+ EXPECT_THAT(ModuleText, HasSubstr("!1 = <temporary!> !{!0}"));
+
+ MDNode *Later = MDNode::getDistinct(Ctx, MDString::get(Ctx, "later"));
+ Ret->setMetadata("later", Later);
+ std::string LaterText;
+ raw_string_ostream LaterOS(LaterText);
+ F->print(LaterOS);
+ EXPECT_THAT(LaterText, HasSubstr("!later !2"));
+ EXPECT_THAT(LaterText, HasSubstr("!temporary !1"));
+}
+
TEST(AsmWriterTest, PrintAddrspaceWithNullOperand) {
LLVMContext Ctx;
Module M("test module", Ctx);
diff --git a/llvm/unittests/IR/MetadataTest.cpp b/llvm/unittests/IR/MetadataTest.cpp
index f2c55c0f2a534..5f6feb5bd87bb 100644
--- a/llvm/unittests/IR/MetadataTest.cpp
+++ b/llvm/unittests/IR/MetadataTest.cpp
@@ -282,15 +282,11 @@ TEST_F(MDNodeTest, Print) {
std::string Expected;
{
raw_string_ostream OS(Expected);
- OS << "<" << (void *)N << "> = !{";
+ OS << "!3 = !{";
C->printAsOperand(OS);
OS << ", ";
S->printAsOperand(OS);
- OS << ", null";
- MDNode *Nodes[] = {N0, N1, N2};
- for (auto *Node : Nodes)
- OS << ", <" << (void *)Node << ">";
- OS << "}";
+ OS << ", null, !0, !1, !2}";
}
std::string Actual;
@@ -319,9 +315,9 @@ TEST_F(MDNodeTest, PrintTemporary) {
NamedMDNode *NMD = M.getOrInsertNamedMetadata("named");
NMD->addOperand(N);
- EXPECT_PRINTER_EQ("!0 = !{!1}", N->print(OS, &M));
- EXPECT_PRINTER_EQ("!1 = <temporary!> !{!2}", Temp->print(OS, &M));
- EXPECT_PRINTER_EQ("!2 = !{}", Arg->print(OS, &M));
+ EXPECT_PRINTER_EQ("!2 = !{!1}", N->print(OS, &M));
+ EXPECT_PRINTER_EQ("!1 = <temporary!> !{!0}", Temp->print(OS, &M));
+ EXPECT_PRINTER_EQ("!0 = !{}", Arg->print(OS, &M));
// Cleanup.
Temp->replaceAllUsesWith(Arg);
@@ -343,11 +339,11 @@ TEST_F(MDNodeTest, PrintFromModule) {
std::string Expected;
{
raw_string_ostream OS(Expected);
- OS << "!0 = !{";
+ OS << "!3 = !{";
C->printAsOperand(OS);
OS << ", ";
S->printAsOperand(OS);
- OS << ", null, !1, !2, !3}";
+ OS << ", null, !0, !1, !2}";
}
EXPECT_PRINTER_EQ(Expected, N->print(OS, &M));
diff --git a/llvm/unittests/IR/ModuleTest.cpp b/llvm/unittests/IR/ModuleTest.cpp
index e8c2ecfb9f3a8..82e652aadc013 100644
--- a/llvm/unittests/IR/ModuleTest.cpp
+++ b/llvm/unittests/IR/ModuleTest.cpp
@@ -438,6 +438,7 @@ define void @Foo2() {
ASSERT_EQ(NMD.getParent(), &*M1);
}
+ M1->renumberMetadataForAssembly();
std::string M1Print;
{
llvm::raw_string_ostream Os(M1Print);
@@ -446,6 +447,60 @@ define void @Foo2() {
ASSERT_EQ(M2Str, M1Print);
}
+TEST(ModuleTest, RenumberMetadataPreservesContextWideUniqueIDs) {
+ LLVMContext Context;
+ Module M("M", Context);
+ MDNode *Detached =
+ MDNode::getDistinct(Context, MDString::get(Context, "detached"));
+ MDNode *Attached =
+ MDNode::getDistinct(Context, MDString::get(Context, "attached"));
+ NamedMDNode *NMD = M.getOrInsertNamedMetadata("n");
+ NMD->addOperand(Attached);
+
+ M.renumberMetadataForAssembly();
+ NMD->addOperand(Detached);
+
+ std::string Assembly;
+ raw_string_ostream OS(Assembly);
+ M.print(OS, nullptr);
+ EXPECT_NE(Assembly.find("!n = !{!0, !2}"), std::string::npos);
+
+ LLVMContext ParsedContext;
+ SMDiagnostic Err;
+ EXPECT_TRUE(parseAssemblyString(Assembly, Err, ParsedContext))
+ << Err.getMessage().str();
+}
+
+TEST(ModuleTest, RenumberMetadataPreservesUniqueTemporaryIDs) {
+ LLVMContext Context;
+ Module M("M", Context);
+ TempMDTuple DetachedA =
+ MDTuple::getTemporary(Context, MDString::get(Context, "detached-a"));
+ TempMDTuple DetachedB =
+ MDTuple::getTemporary(Context, MDString::get(Context, "detached-b"));
+ MDNode *AttachedA =
+ MDNode::getDistinct(Context, MDString::get(Context, "attached-a"));
+ MDNode *AttachedB =
+ MDNode::getDistinct(Context, MDString::get(Context, "attached-b"));
+ NamedMDNode *NMD = M.getOrInsertNamedMetadata("n");
+ NMD->addOperand(AttachedA);
+ NMD->addOperand(AttachedB);
+
+ M.renumberMetadataForAssembly();
+ NMD->addOperand(MDNode::replaceWithDistinct(std::move(DetachedA)));
+ NMD->addOperand(MDNode::replaceWithDistinct(std::move(DetachedB)));
+
+ std::string Assembly;
+ raw_string_ostream OS(Assembly);
+ M.print(OS, nullptr);
+ EXPECT_NE(Assembly.find("!n = !{!0, !1, !4, !5}"), std::string::npos);
+
+ LLVMContext ParsedContext;
+ SMDiagnostic Err;
+ EXPECT_TRUE(parseAssemblyString(Assembly, Err, ParsedContext))
+ << Err.getMessage().str();
+}
+
TEST(ModuleTest, FunctionDefinitions) {
// Test getFunctionDefs() method which returns only functions with bodies
LLVMContext Context;
diff --git a/llvm/unittests/MIR/MachineMetadata.cpp b/llvm/unittests/MIR/MachineMetadata.cpp
index f58a3cac1bb0f..11a9a9934128c 100644
--- a/llvm/unittests/MIR/MachineMetadata.cpp
+++ b/llvm/unittests/MIR/MachineMetadata.cpp
@@ -19,6 +19,7 @@
#include "llvm/CodeGen/TargetLowering.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/FileCheck/FileCheck.h"
+#include "llvm/IR/DebugInfoMetadata.h"
#include "llvm/IR/MDBuilder.h"
#include "llvm/IR/Module.h"
#include "llvm/IR/ModuleSlotTracker.h"
@@ -49,20 +50,9 @@ class MachineMetadataTest : public testing::Test {
void SetUp() override { M = std::make_unique<Module>("Dummy", Context); }
void addHooks(ModuleSlotTracker &MST, const MachineOperand &MO) {
- // Setup hooks to assign slot numbers for the specified machine metadata.
- MST.setProcessHook([&MO](AbstractSlotTrackerStorage *AST, const Module *M,
- bool ShouldInitializeAllMetadata) {
- if (ShouldInitializeAllMetadata) {
- if (MO.isMetadata())
- AST->createMetadataSlot(MO.getMetadata());
- }
- });
- MST.setProcessHook([&MO](AbstractSlotTrackerStorage *AST, const Function *F,
- bool ShouldInitializeAllMetadata) {
- if (!ShouldInitializeAllMetadata) {
- if (MO.isMetadata())
- AST->createMetadataSlot(MO.getMetadata());
- }
+ MST.setProcessHook([&MO](AbstractSlotTrackerStorage *AST, const Module *) {
+ if (MO.isMetadata())
+ AST->createMetadataSlot(MO.getMetadata());
});
}
@@ -140,9 +130,7 @@ TEST_F(MachineMetadataTest, TrivialHook) {
}
TEST_F(MachineMetadataTest, BasicHook) {
- // Verify that post-process hook is invoked to assign slot numbers for
- // machine metadata. When both LLVM IR and machine IR contain metadata,
- // ensure that machine metadata is always assigned after LLVM IR.
+ // Verify that the post-process hook records machine metadata.
ASSERT_TRUE(M);
// Create a MachineOperand with a metadata and print it.
@@ -165,16 +153,16 @@ TEST_F(MachineMetadataTest, BasicHook) {
addHooks(MST, MO);
// Print a MachineOperand containing a metadata node.
- EXPECT_EQ("!1", print([&](raw_ostream &OS) {
+ EXPECT_EQ("!0", print([&](raw_ostream &OS) {
MO.print(OS, MST, LLT{}, /*OpIdx*/ ~0U, /*PrintDef=*/false,
/*IsStandalone=*/false,
/*ShouldPrintRegisterTies=*/false, /*TiedOperandIdx=*/0,
/*TRI=*/nullptr);
}));
// Print the definition of these unnamed metadata nodes.
- EXPECT_EQ("!0 = !{!\"bar\"}",
+ EXPECT_EQ("!1 = !{!\"bar\"}",
print([&](raw_ostream &OS) { Node->print(OS, MST); }));
- EXPECT_EQ("!1 = !{!\"foo\"}",
+ EXPECT_EQ("!0 = !{!\"foo\"}",
print([&](raw_ostream &OS) { MachineNode->print(OS, MST); }));
}
@@ -252,10 +240,9 @@ body: |
MachineModuleSlotTracker MST(
[&](const Function &F) { return MMI.getMachineFunction(F); }, MF);
- // Print that MI with new machine metadata, which slot numbers should be
- // assigned.
+ // Print the MI using the stored IDs of the new machine metadata.
EXPECT_EQ("%1:gpr32 = LDRWui %0, 0 :: (load (s32) from %ir.p, "
- "!alias.scope !0, !noalias !3)",
+ "!alias.scope !3, !noalias !4)",
print([&](raw_ostream &OS) {
MI.print(OS, MST, /*IsStandalone=*/false, /*SkipOpers=*/false,
/*SkipDebugLoc=*/false, /*AddNewLine=*/false);
@@ -342,10 +329,59 @@ body: |
auto *MF = MMI.getMachineFunction(*M->getFunction("test0"));
auto *MBB = MF->getBlockNumbered(0);
+ MachineInstr *DbgValue = nullptr;
for (auto It = MBB->begin(); It != MBB->end(); ++It) {
MachineInstr &MI = *It;
ASSERT_TRUE(MI.isMetaInstruction());
+ if (MI.isDebugValue())
+ DbgValue = &MI;
}
+
+ ASSERT_NE(DbgValue, nullptr);
+ auto *IRVar = cast<DILocalVariable>(DbgValue->getOperand(2).getMetadata());
+ M->getOrInsertNamedMetadata("test.ir.variable")
+ ->addOperand(const_cast<DILocalVariable *>(IRVar));
+ // Leave gaps between reachable nodes to exercise sparse metadata IDs.
+ auto *UnusedModuleNode = MDNode::getDistinct(Context, {});
+ (void)UnusedModuleNode;
+ auto *ModuleNode =
+ MDNode::getDistinct(Context, MDString::get(Context, "module metadata"));
+ M->getOrInsertNamedMetadata("test.module.metadata")->addOperand(ModuleNode);
+ auto PrintMetadataID = [&](const MDNode *N) {
+ return print([&](raw_ostream &OS) { N->printAsOperand(OS, M.get()); });
+ };
+ std::string ModuleNodeID = PrintMetadataID(ModuleNode);
+ print([&](raw_ostream &OS) { printMIR(OS, *M); });
+ EXPECT_EQ(ModuleNodeID, PrintMetadataID(ModuleNode));
+
+ auto *UnusedMachineNode = MDNode::getDistinct(Context, {});
+ (void)UnusedMachineNode;
+ auto *MachineNode = MDNode::get(Context, MDString::get(Context, "machine"));
+ MBB->front().addOperand(*MF, MachineOperand::CreateMetadata(MachineNode));
+ auto *MachineLoc =
+ DILocation::get(Context, 2, 1, DbgValue->getDebugLoc()->getScope());
+ DbgValue->setDebugLoc(DebugLoc(MachineLoc));
+
+ MachineModuleSlotTracker MST(
+ [&](const Function &F) { return MMI.getMachineFunction(F); }, MF);
+ MachineModuleSlotTracker::MachineMDNodeListType MDList;
+ MST.collectMachineMDNodes(MDList);
+ EXPECT_TRUE(llvm::any_of(
+ MDList, [&](const auto &MD) { return MD.second == MachineNode; }));
+ EXPECT_TRUE(llvm::any_of(
+ MDList, [&](const auto &MD) { return MD.second == MachineLoc; }));
+ EXPECT_FALSE(
+ llvm::any_of(MDList, [&](const auto &MD) { return MD.second == IRVar; }));
+
+ std::string MachineNodeID = PrintMetadataID(MachineNode);
+ std::string Output = print([&](raw_ostream &OS) {
+ printMIR(OS, *M);
+ printMIR(OS, MMI, *MF);
+ });
+ EXPECT_EQ(ModuleNodeID, PrintMetadataID(ModuleNode));
+ EXPECT_EQ(MachineNodeID, PrintMetadataID(MachineNode));
+ MachineModuleInfo RoundTripMMI(TM.get());
+ EXPECT_TRUE(parseMIR(*TM, Output, RoundTripMMI)) << Output;
}
TEST_F(MachineMetadataTest, MMSlotTrackerX64) {
@@ -403,14 +439,19 @@ body: |
MachineModuleSlotTracker MST(
[&](const Function &F) { return MMI.getMachineFunction(F); }, MF);
- // Print that MI with new machine metadata, which slot numbers should be
- // assigned.
- EXPECT_EQ("%1:gr32 = MOV32rm %0, 1, $noreg, 0, $noreg :: (load (s32) from %ir.p, "
- "!alias.scope !0, !noalias !3)",
- print([&](raw_ostream &OS) {
- MI.print(OS, MST, /*IsStandalone=*/false, /*SkipOpers=*/false,
- /*SkipDebugLoc=*/false, /*AddNewLine=*/false);
- }));
+ // Print the MI using the stored IDs of the new machine metadata.
+ std::string Set0ID =
+ print([&](raw_ostream &OS) { Set0->printAsOperand(OS, M.get()); });
+ std::string Set1ID =
+ print([&](raw_ostream &OS) { Set1->printAsOperand(OS, M.get()); });
+ EXPECT_EQ(
+ "%1:gr32 = MOV32rm %0, 1, $noreg, 0, $noreg :: (load (s32) from %ir.p, "
+ "!alias.scope " +
+ Set0ID + ", !noalias " + Set1ID + ")",
+ print([&](raw_ostream &OS) {
+ MI.print(OS, MST, /*IsStandalone=*/false, /*SkipOpers=*/false,
+ /*SkipDebugLoc=*/false, /*AddNewLine=*/false);
+ }));
std::vector<const MDNode *> Generated{Domain, Scope0, Scope1, Set0, Set1};
// Examine machine metadata collected. They should match ones
@@ -502,11 +543,15 @@ body: |
MachineModuleSlotTracker MST(
[&](const Function &F) { return MMI.getMachineFunction(F); }, MF);
- // Print that MI with new machine metadata, which slot numbers should be
- // assigned.
+ // Print the MI using the stored IDs of the new machine metadata.
+ std::string Set0ID =
+ print([&](raw_ostream &OS) { Set0->printAsOperand(OS, M.get()); });
+ std::string Set1ID =
+ print([&](raw_ostream &OS) { Set1->printAsOperand(OS, M.get()); });
EXPECT_EQ(
"%5:vgpr_32 = FLAT_LOAD_DWORD killed %4, 0, 0, implicit $exec, implicit "
- "$flat_scr :: (load (s32) from %ir.p, !alias.scope !0, !noalias !3)",
+ "$flat_scr :: (load (s32) from %ir.p, !alias.scope " +
+ Set0ID + ", !noalias " + Set1ID + ")",
print([&](raw_ostream &OS) {
MI.print(OS, MST, /*IsStandalone=*/false, /*SkipOpers=*/false,
/*SkipDebugLoc=*/false, /*AddNewLine=*/false);
diff --git a/mlir/lib/Target/LLVMIR/ConvertToLLVMIR.cpp b/mlir/lib/Target/LLVMIR/ConvertToLLVMIR.cpp
index fef191a302ac8..1797efec0252f 100644
--- a/mlir/lib/Target/LLVMIR/ConvertToLLVMIR.cpp
+++ b/mlir/lib/Target/LLVMIR/ConvertToLLVMIR.cpp
@@ -31,6 +31,7 @@ void registerToLLVMIRTranslation() {
if (!llvmModule)
return failure();
+ llvmModule->renumberMetadataForAssembly();
llvmModule->print(output, nullptr);
return success();
},
diff --git a/mlir/test/Target/LLVMIR/Import/import-failure.ll b/mlir/test/Target/LLVMIR/Import/import-failure.ll
index 7b59f91497120..ba854d8616144 100644
--- a/mlir/test/Target/LLVMIR/Import/import-failure.ll
+++ b/mlir/test/Target/LLVMIR/Import/import-failure.ll
@@ -65,7 +65,7 @@ define void @access_group(ptr %arg1) {
; CHECK: <unknown>
; CHECK-SAME: warning: expected all loop properties to be either debug locations or metadata nodes
; CHECK: <unknown>
-; CHECK-SAME: warning: unhandled metadata: !0 = distinct !{!0, i32 42}
+; CHECK-SAME: warning: unhandled metadata: ![[LOOP_ID:[0-9]+]] = distinct !{![[LOOP_ID]], i32 42}
define void @invalid_loop_node(i64 %n, ptr %A) {
entry:
br label %end, !llvm.loop !0
@@ -80,7 +80,7 @@ end:
; CHECK: <unknown>
; CHECK-SAME: warning: cannot import empty loop property
; CHECK: <unknown>
-; CHECK-SAME: warning: unhandled metadata: !0 = distinct !{!0, !1}
+; CHECK-SAME: warning: unhandled metadata: ![[EMPTY_LOOP:[0-9]+]] = distinct !{![[EMPTY_LOOP]], ![[EMPTY_PROP:[0-9]+]]}
define void @invalid_loop_node(i64 %n, ptr %A) {
entry:
br label %end, !llvm.loop !0
@@ -96,7 +96,7 @@ end:
; CHECK: <unknown>
; CHECK-SAME: warning: cannot import loop property without a name
; CHECK: <unknown>
-; CHECK-SAME: warning: unhandled metadata: !0 = distinct !{!0, !1}
+; CHECK-SAME: warning: unhandled metadata: ![[UNNAMED_LOOP:[0-9]+]] = distinct !{![[UNNAMED_LOOP]], ![[UNNAMED_PROP:[0-9]+]]}
define void @invalid_loop_node(i64 %n, ptr %A) {
entry:
br label %end, !llvm.loop !0
@@ -112,7 +112,7 @@ end:
; CHECK: <unknown>
; CHECK-SAME: warning: cannot import loop properties with duplicated names llvm.loop.disable_nonforced
; CHECK: <unknown>
-; CHECK-SAME: warning: unhandled metadata: !0 = distinct !{!0, !1, !1}
+; CHECK-SAME: warning: unhandled metadata: ![[DUP_LOOP:[0-9]+]] = distinct !{![[DUP_LOOP]], ![[DUP_PROP:[0-9]+]], ![[DUP_PROP]]}
define void @unsupported_loop_annotation(i64 %n, ptr %A) {
entry:
br label %end, !llvm.loop !0
@@ -128,7 +128,7 @@ end:
; CHECK: <unknown>
; CHECK-SAME: warning: expected metadata node llvm.loop.disable_nonforced to hold no value
; CHECK: <unknown>
-; CHECK-SAME: warning: unhandled metadata: !0 = distinct !{!0, !1}
+; CHECK-SAME: warning: unhandled metadata: ![[VALUE_LOOP:[0-9]+]] = distinct !{![[VALUE_LOOP]], ![[VALUE_PROP:[0-9]+]]}
define void @unsupported_loop_annotation(i64 %n, ptr %A) {
entry:
br label %end, !llvm.loop !0
@@ -144,7 +144,7 @@ end:
; CHECK: <unknown>
; CHECK-SAME: warning: expected metadata nodes llvm.loop.unroll.enable and llvm.loop.unroll.disable to be mutually exclusive
; CHECK: <unknown>
-; CHECK-SAME: warning: unhandled metadata: !0 = distinct !{!0, !1, !2}
+; CHECK-SAME: warning: unhandled metadata: ![[EXCLUSIVE_LOOP:[0-9]+]] = distinct !{![[EXCLUSIVE_LOOP]], ![[ENABLE_PROP:[0-9]+]], ![[DISABLE_PROP:[0-9]+]]}
define void @unsupported_loop_annotation(i64 %n, ptr %A) {
entry:
br label %end, !llvm.loop !0
@@ -161,7 +161,7 @@ end:
; CHECK: <unknown>
; CHECK-SAME: warning: expected metadata node llvm.loop.vectorize.width to hold an i32 value
; CHECK: <unknown>
-; CHECK-SAME: warning: unhandled metadata: !0 = distinct !{!0, !1}
+; CHECK-SAME: warning: unhandled metadata: ![[WIDTH_LOOP:[0-9]+]] = distinct !{![[WIDTH_LOOP]], ![[WIDTH_PROP:[0-9]+]]}
define void @unsupported_loop_annotation(i64 %n, ptr %A) {
entry:
br label %end, !llvm.loop !0
@@ -177,7 +177,7 @@ end:
; CHECK: <unknown>
; CHECK-SAME: warning: expected metadata node llvm.loop.vectorize.followup_all to hold an MDNode
; CHECK: <unknown>
-; CHECK-SAME: warning: unhandled metadata: !0 = distinct !{!0, !1}
+; CHECK-SAME: warning: unhandled metadata: ![[FOLLOWUP_LOOP:[0-9]+]] = distinct !{![[FOLLOWUP_LOOP]], ![[FOLLOWUP_PROP:[0-9]+]]}
define void @unsupported_loop_annotation(i64 %n, ptr %A) {
entry:
br label %end, !llvm.loop !0
@@ -193,7 +193,7 @@ end:
; CHECK: <unknown>
; CHECK-SAME: warning: expected metadata node llvm.loop.parallel_accesses to hold one or multiple MDNodes
; CHECK: <unknown>
-; CHECK-SAME: warning: unhandled metadata: !0 = distinct !{!0, !1}
+; CHECK-SAME: warning: unhandled metadata: ![[PARALLEL_LOOP:[0-9]+]] = distinct !{![[PARALLEL_LOOP]], ![[PARALLEL_PROP:[0-9]+]]}
define void @unsupported_loop_annotation(i64 %n, ptr %A) {
entry:
br label %end, !llvm.loop !0
@@ -209,7 +209,7 @@ end:
; CHECK: <unknown>
; CHECK-SAME: warning: unknown loop annotation llvm.loop.typo
; CHECK: <unknown>
-; CHECK-SAME: warning: unhandled metadata: !0 = distinct !{!0, !1, !2}
+; CHECK-SAME: warning: unhandled metadata: ![[UNKNOWN_LOOP:[0-9]+]] = distinct !{![[UNKNOWN_LOOP]], ![[KNOWN_PROP:[0-9]+]], ![[UNKNOWN_PROP:[0-9]+]]}
define void @unsupported_loop_annotation(i64 %n, ptr %A) {
entry:
br label %end, !llvm.loop !0
@@ -241,7 +241,7 @@ end:
; // -----
; CHECK: <unknown>
-; CHECK-SAME: warning: dropped instruction: call void @llvm.experimental.noalias.scope.decl(metadata !0)
+; CHECK-SAME: warning: dropped instruction: call void @llvm.experimental.noalias.scope.decl(metadata ![[SCOPE_LIST:[0-9]+]])
define void @unused_scope() {
call void @llvm.experimental.noalias.scope.decl(metadata !0)
ret void
@@ -320,7 +320,7 @@ bb1:
!10 = !{ i32 1, !"foo", i32 1 }
!11 = !{ i32 4, !"bar", i32 37 }
!12 = !{ i32 2, !"qux", i32 42 }
-; CHECK: unsupported module flag value for key 'qux' : !4 = !{!"foo", i32 1}
+; CHECK: unsupported module flag value for key 'qux' : ![[FLAG_VALUE:[0-9]+]] = !{!"foo", i32 1}
!13 = !{ i32 3, !"qux", !{ !"foo", i32 1 }}
!llvm.module.flags = !{ !10, !11, !12, !13 }
diff --git a/polly/test/ForwardOpTree/atax.ll b/polly/test/ForwardOpTree/atax.ll
index 3dfe3fa0aa8e6..3d3a44b763aa3 100644
--- a/polly/test/ForwardOpTree/atax.ll
+++ b/polly/test/ForwardOpTree/atax.ll
@@ -87,7 +87,7 @@ declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i32, i1)
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_for_body3[i0] -> MemRef1__phi[] };
; CHECK-NEXT: Instructions {
-; CHECK-NEXT: store double 0.000000e+00, ptr %arrayidx5, align 8, !tbaa !2
+; CHECK-NEXT: store double 0.000000e+00, ptr %arrayidx5, align 8, !tbaa !13
; CHECK-NEXT: }
; CHECK-NEXT: Stmt_for_body8
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
@@ -105,11 +105,11 @@ declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i32, i1)
; CHECK-NEXT: { Stmt_for_body8[i0, i1] -> MemRef_add[] };
; CHECK-NEXT: Instructions {
; CHECK-NEXT: %0 = phi double [ 0.000000e+00, %for.body3 ], [ %add, %for.body8 ]
-; CHECK-NEXT: %1 = load double, ptr %arrayidx14, align 8, !tbaa !2
-; CHECK-NEXT: %2 = load double, ptr %arrayidx16, align 8, !tbaa !2
+; CHECK-NEXT: %1 = load double, ptr %arrayidx14, align 8, !tbaa !13
+; CHECK-NEXT: %2 = load double, ptr %arrayidx16, align 8, !tbaa !13
; CHECK-NEXT: %mul = fmul double %1, %2
; CHECK-NEXT: %add = fadd double %0, %mul
-; CHECK-NEXT: store double %add, ptr %arrayidx5, align 8, !tbaa !2
+; CHECK-NEXT: store double %add, ptr %arrayidx5, align 8, !tbaa !13
; CHECK-NEXT: %exitcond = icmp eq i64 %indvars.iv.next, 2
; CHECK-NEXT: }
; CHECK-NEXT: Stmt_for_end21
@@ -131,11 +131,11 @@ declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i32, i1)
; CHECK-NEXT: { Stmt_for_body24[i0, i1] -> MemRef_y[i1] };
; CHECK-NEXT: Instructions {
; CHECK-NEXT: %3 = phi double [ %add, %for.end21 ], [ %.pre, %for.body24.for.body24_crit_edge ]
-; CHECK-NEXT: %4 = load double, ptr %arrayidx26, align 8, !tbaa !2
-; CHECK-NEXT: %5 = load double, ptr %arrayidx30, align 8, !tbaa !2
+; CHECK-NEXT: %4 = load double, ptr %arrayidx26, align 8, !tbaa !13
+; CHECK-NEXT: %5 = load double, ptr %arrayidx30, align 8, !tbaa !13
; CHECK-NEXT: %mul33 = fmul double %5, %3
; CHECK-NEXT: %add34 = fadd double %4, %mul33
-; CHECK-NEXT: store double %add34, ptr %arrayidx26, align 8, !tbaa !2
+; CHECK-NEXT: store double %add34, ptr %arrayidx26, align 8, !tbaa !13
; CHECK-NEXT: %exitcond7 = icmp eq i64 %indvars.iv.next6, 2
; CHECK-NEXT: }
; CHECK-NEXT: Stmt_for_body24_for_body24_crit_edge
@@ -144,6 +144,6 @@ declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i32, i1)
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_for_body24_for_body24_crit_edge[i0, i1] -> MemRef_tmp[i0] };
; CHECK-NEXT: Instructions {
-; CHECK-NEXT: %.pre = load double, ptr %arrayidx5, align 8, !tbaa !2
+; CHECK-NEXT: %.pre = load double, ptr %arrayidx5, align 8, !tbaa !13
; CHECK-NEXT: }
; CHECK-NEXT: }
diff --git a/polly/test/ForwardOpTree/jacobi-1d.ll b/polly/test/ForwardOpTree/jacobi-1d.ll
index 3bc504d88c0eb..fbae4c7bc227b 100644
--- a/polly/test/ForwardOpTree/jacobi-1d.ll
+++ b/polly/test/ForwardOpTree/jacobi-1d.ll
@@ -74,8 +74,8 @@ for.end35: ; preds = %for.inc33
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_for_body[i0] -> MemRef2__phi[] };
; CHECK-NEXT: Instructions {
-; CHECK-NEXT: %.pre = load double, ptr %A, align 8, !tbaa !2
-; CHECK-NEXT: %.pre10 = load double, ptr %arrayidx6.phi.trans.insert, align 8, !tbaa !2
+; CHECK-NEXT: %.pre = load double, ptr %A, align 8, !tbaa !13
+; CHECK-NEXT: %.pre10 = load double, ptr %arrayidx6.phi.trans.insert, align 8, !tbaa !13
; CHECK-NEXT: }
; CHECK-NEXT: Stmt_for_body3
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
@@ -96,10 +96,10 @@ for.end35: ; preds = %for.inc33
; CHECK-NEXT: %0 = phi double [ %.pre10, %for.body ], [ %2, %for.body3 ]
; CHECK-NEXT: %1 = phi double [ %.pre, %for.body ], [ %0, %for.body3 ]
; CHECK-NEXT: %add = fadd double %1, %0
-; CHECK-NEXT: %2 = load double, ptr %arrayidx9, align 8, !tbaa !2
+; CHECK-NEXT: %2 = load double, ptr %arrayidx9, align 8, !tbaa !13
; CHECK-NEXT: %add10 = fadd double %add, %2
; CHECK-NEXT: %mul = fmul double %add10, 3.333300e-01
-; CHECK-NEXT: store double %mul, ptr %arrayidx12, align 8, !tbaa !2
+; CHECK-NEXT: store double %mul, ptr %arrayidx12, align 8, !tbaa !13
; CHECK-NEXT: %exitcond = icmp eq i64 %indvars.iv.next, 3
; CHECK-NEXT: }
; CHECK-NEXT: }
diff --git a/polly/test/ScopInfo/preserve-equiv-class-order-in-basic_block.ll b/polly/test/ScopInfo/preserve-equiv-class-order-in-basic_block.ll
index 800b0339a1422..adcd95a277e62 100644
--- a/polly/test/ScopInfo/preserve-equiv-class-order-in-basic_block.ll
+++ b/polly/test/ScopInfo/preserve-equiv-class-order-in-basic_block.ll
@@ -77,7 +77,7 @@ for.end13: ; preds = %for.inc11
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_for_end_a[] -> MemRef_conv[] };
; CHECK-NEXT: Instructions {
-; CHECK-NEXT: %1 = load i32, ptr @e, align 4, !tbaa !0
+; CHECK-NEXT: %1 = load i32, ptr @e, align 4, !tbaa !4
; CHECK-NEXT: %2 = trunc i32 %1 to i16
; CHECK-NEXT: %conv = and i16 %2, 1
; CHECK-NEXT: %tobool = icmp eq i16 %conv, 0
@@ -90,5 +90,5 @@ for.end13: ; preds = %for.inc11
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_for_end[] -> MemRef_e[0] };
; CHECK-NEXT: Instructions {
-; CHECK-NEXT: store i32 2, ptr @e, align 4, !tbaa !0
+; CHECK-NEXT: store i32 2, ptr @e, align 4, !tbaa !4
; CHECK-NEXT: }
diff --git a/polly/test/ScopInfo/stmt_split_exit_of_region_stmt.ll b/polly/test/ScopInfo/stmt_split_exit_of_region_stmt.ll
index 54832607f11d5..8a160c299172b 100644
--- a/polly/test/ScopInfo/stmt_split_exit_of_region_stmt.ll
+++ b/polly/test/ScopInfo/stmt_split_exit_of_region_stmt.ll
@@ -19,7 +19,7 @@
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_Stmt[i0] -> MemRef_A[i0] };
; CHECK-NEXT: Instructions {
-; CHECK-NEXT: store i32 %i.0, ptr %arrayidx, align 4, !polly_split_after !0
+; CHECK-NEXT: store i32 %i.0, ptr %arrayidx, align 4, !polly_split_after !1
; CHECK-NEXT: }
; CHECK-NEXT: Stmt_Stmt_b
; CHECK-NEXT: Domain :=
diff --git a/polly/test/ScopInfo/stmt_split_no_after_split.ll b/polly/test/ScopInfo/stmt_split_no_after_split.ll
index 0a4284bdd34f5..b0dffa98c7e79 100644
--- a/polly/test/ScopInfo/stmt_split_no_after_split.ll
+++ b/polly/test/ScopInfo/stmt_split_no_after_split.ll
@@ -9,7 +9,7 @@
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_Stmt[i0] -> MemRef_A[i0] };
; CHECK-NEXT: Instructions {
-; CHECK-NEXT: store i32 %i.0, ptr %arrayidx, align 4, !polly_split_after !0
+; CHECK-NEXT: store i32 %i.0, ptr %arrayidx, align 4, !polly_split_after !1
; CHECK-NEXT: }
; CHECK-NEXT: }
;
diff --git a/polly/test/ScopInfo/stmt_split_no_dependence.ll b/polly/test/ScopInfo/stmt_split_no_dependence.ll
index ed2180407c68d..d129e58c11204 100644
--- a/polly/test/ScopInfo/stmt_split_no_dependence.ll
+++ b/polly/test/ScopInfo/stmt_split_no_dependence.ll
@@ -17,7 +17,7 @@
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_Stmt[i0] -> MemRef_A[i0] };
; CHECK-NEXT: Instructions {
-; CHECK-NEXT: store i32 %i.0, ptr %arrayidx, align 4, !polly_split_after !0
+; CHECK-NEXT: store i32 %i.0, ptr %arrayidx, align 4, !polly_split_after !1
; CHECK-NEXT: }
; CHECK-NEXT: Stmt_Stmt_b
; CHECK-NEXT: Domain :=
diff --git a/polly/test/ScopInfo/stmt_split_phi_in_beginning_bb.ll b/polly/test/ScopInfo/stmt_split_phi_in_beginning_bb.ll
index 0521525e272b3..1150c5ead3065 100644
--- a/polly/test/ScopInfo/stmt_split_phi_in_beginning_bb.ll
+++ b/polly/test/ScopInfo/stmt_split_phi_in_beginning_bb.ll
@@ -9,7 +9,7 @@
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_Stmt[i0] -> MemRef_A[i0] };
; CHECK-NEXT: Instructions {
-; CHECK-NEXT: store i32 %phi, ptr %arrayidx, align 4, !polly_split_after !0
+; CHECK-NEXT: store i32 %phi, ptr %arrayidx, align 4, !polly_split_after !1
; CHECK-NEXT: }
; CHECK-NEXT: Stmt_Stmt_b
; CHECK-NEXT: Domain :=
diff --git a/polly/test/ScopInfo/stmt_split_phi_in_stmt.ll b/polly/test/ScopInfo/stmt_split_phi_in_stmt.ll
index 82a85aa5f0099..2ba38dc7b3a4b 100644
--- a/polly/test/ScopInfo/stmt_split_phi_in_stmt.ll
+++ b/polly/test/ScopInfo/stmt_split_phi_in_stmt.ll
@@ -9,7 +9,7 @@
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_Stmt[i0] -> MemRef_A[i0] };
; CHECK-NEXT: Instructions {
-; CHECK-NEXT: store i32 %i.0, ptr %arrayidx, align 4, !polly_split_after !0
+; CHECK-NEXT: store i32 %i.0, ptr %arrayidx, align 4, !polly_split_after !1
; CHECK-NEXT: }
; CHECK-NEXT: Stmt_Stmt_b
; CHECK-NEXT: Domain :=
diff --git a/polly/test/ScopInfo/stmt_split_scalar_dependence.ll b/polly/test/ScopInfo/stmt_split_scalar_dependence.ll
index 1f21c0ce7225f..a98a0538fb3a5 100644
--- a/polly/test/ScopInfo/stmt_split_scalar_dependence.ll
+++ b/polly/test/ScopInfo/stmt_split_scalar_dependence.ll
@@ -12,7 +12,7 @@
; CHECK-NEXT: { Stmt_Stmt[i0] -> MemRef_a[] };
; CHECK-NEXT: Instructions {
; CHECK-NEXT: %a = fadd double 2.100000e+01, 2.100000e+01
-; CHECK-NEXT: store i32 %i.0, ptr %arrayidx, align 4, !polly_split_after !0
+; CHECK-NEXT: store i32 %i.0, ptr %arrayidx, align 4, !polly_split_after !1
; CHECK-NEXT: }
; CHECK-NEXT: Stmt_Stmt_b
; CHECK-NEXT: Domain :=
diff --git a/polly/test/ScopInfo/stmt_split_within_loop.ll b/polly/test/ScopInfo/stmt_split_within_loop.ll
index 580ffab567846..6164cce2de7fd 100644
--- a/polly/test/ScopInfo/stmt_split_within_loop.ll
+++ b/polly/test/ScopInfo/stmt_split_within_loop.ll
@@ -9,7 +9,7 @@
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_Stmt[i0, i1] -> MemRef_A[i0] };
; CHECK-NEXT: Instructions {
-; CHECK-NEXT: store i32 %i.0, ptr %arrayidx, align 4, !polly_split_after !0
+; CHECK-NEXT: store i32 %i.0, ptr %arrayidx, align 4, !polly_split_after !1
; CHECK-NEXT: }
; CHECK-NEXT: Stmt_Stmt_b
; CHECK-NEXT: Domain :=
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