[flang-commits] [compiler-rt] [flang] [llvm] [AArch64] fix trampoline implementation: use X15 (PR #126743)

[via flang-commits]

github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

<details>
<summary>
You can test this locally with the following command:
</summary>

``````````bash
git-clang-format --diff 94f9d5d1a8257710f0483ce025e19a6326ca6e4b 546fed81109e575b5b44693c3940e08ea0231ebc --extensions c,cpp -- compiler-rt/lib/builtins/trampoline_setup.c compiler-rt/test/builtins/Unit/trampoline_setup_test.c flang/lib/Optimizer/CodeGen/BoxedProcedure.cpp llvm/lib/Target/AArch64/AArch64FrameLowering.cpp llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
``````````

</details>

<details>
<summary>
View the diff from clang-format here.
</summary>

``````````diff
diff --git a/flang/lib/Optimizer/CodeGen/BoxedProcedure.cpp b/flang/lib/Optimizer/CodeGen/BoxedProcedure.cpp
index f402404121..27efd27cc0 100644
--- a/flang/lib/Optimizer/CodeGen/BoxedProcedure.cpp
+++ b/flang/lib/Optimizer/CodeGen/BoxedProcedure.cpp
@@ -277,9 +277,9 @@ public:
             // For PPC32 and PPC64, the thunk is populated by a call to
             // __trampoline_setup, which is defined in
             // compiler-rt/lib/builtins/trampoline_setup.c and requires the
-            // thunk size greater than 32 bytes.  For Aarch64, RISCV and x86_64, the
-            // thunk setup doesn't go through __trampoline_setup and fits in 32
-            // bytes.
+            // thunk size greater than 32 bytes.  For Aarch64, RISCV and x86_64,
+            // the thunk setup doesn't go through __trampoline_setup and fits in
+            // 32 bytes.
             fir::SequenceType::Extent thunkSize = triple.getTrampolineSize();
             mlir::Type buffTy = SequenceType::get({thunkSize}, i8Ty);
             auto buffer = builder.create<AllocaOp>(loc, buffTy);
diff --git a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
index ced3ff7b74..f9b7706885 100644
--- a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
@@ -2047,12 +2047,12 @@ void AArch64FrameLowering::emitPrologue(MachineFunction &MF,
     // Find an available register to store value of VG to.
     unsigned X15Scratch = AArch64::NoRegister;
     if (LiveRegs.contains(AArch64::X15)) {
-        // if (llvm::any_of(
-        //         MBB.liveins(),
-        //         [&STI](const MachineBasicBlock::RegisterMaskPair &LiveIn) {
-        //           return STI.getRegisterInfo()->isSuperOrSubRegisterEq(
-        //               AArch64::X15, LiveIn.PhysReg);
-        //         }))
+      // if (llvm::any_of(
+      //         MBB.liveins(),
+      //         [&STI](const MachineBasicBlock::RegisterMaskPair &LiveIn) {
+      //           return STI.getRegisterInfo()->isSuperOrSubRegisterEq(
+      //               AArch64::X15, LiveIn.PhysReg);
+      //         }))
       X15Scratch = findScratchNonCalleeSaveRegister(&MBB);
       assert(X15Scratch != AArch64::NoRegister);
       LiveRegs.removeReg(AArch64::X15); // ignore X15 since we restore it
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 1404077446..8d6d2c41ee 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -7317,14 +7317,14 @@ SDValue AArch64TargetLowering::LowerINIT_TRAMPOLINE(SDValue Op,
 
   SDLoc dl(Op);
   OutChains[0] =
-      DAG.getStore(Chain, dl, DAG.getConstant(0x58000080u | X15, dl, MVT::i32), Addr,
-                   MachinePointerInfo(TrmpAddr));
+      DAG.getStore(Chain, dl, DAG.getConstant(0x58000080u | X15, dl, MVT::i32),
+                   Addr, MachinePointerInfo(TrmpAddr));
 
   Addr = DAG.getNode(ISD::ADD, dl, MVT::i64, Trmp,
                      DAG.getConstant(4, dl, MVT::i64));
   OutChains[1] =
-      DAG.getStore(Chain, dl, DAG.getConstant(0x580000b0u | X17, dl, MVT::i32), Addr,
-                   MachinePointerInfo(TrmpAddr, 4));
+      DAG.getStore(Chain, dl, DAG.getConstant(0x580000b0u | X17, dl, MVT::i32),
+                   Addr, MachinePointerInfo(TrmpAddr, 4));
 
   Addr = DAG.getNode(ISD::ADD, dl, MVT::i64, Trmp,
                      DAG.getConstant(8, dl, MVT::i64));
@@ -7345,11 +7345,11 @@ SDValue AArch64TargetLowering::LowerINIT_TRAMPOLINE(SDValue Op,
   SDValue StoreToken = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
 
   SDValue EndOfTrmp = DAG.getNode(ISD::ADD, dl, MVT::i64, Trmp,
-                     DAG.getConstant(12, dl, MVT::i64));
+                                  DAG.getConstant(12, dl, MVT::i64));
 
   // Call clear cache on the trampoline instructions.
-  return DAG.getNode(ISD::CLEAR_CACHE, dl, MVT::Other, StoreToken,
-                              Trmp, EndOfTrmp);
+  return DAG.getNode(ISD::CLEAR_CACHE, dl, MVT::Other, StoreToken, Trmp,
+                     EndOfTrmp);
 }
 
 SDValue AArch64TargetLowering::LowerOperation(SDValue Op,

``````````

</details>


https://github.com/llvm/llvm-project/pull/126743