[flang-commits] [clang] [clang-tools-extra] [flang] [llvm] [mlir] [polly] [test]: fix filecheck annotation typos (PR #91854)
via flang-commits
flang-commits at lists.llvm.org
Mon May 13 01:03:16 PDT 2024
https://github.com/klensy updated https://github.com/llvm/llvm-project/pull/91854
>From 9a7f93e9f07a0e207f053c545812ec97f67cde68 Mon Sep 17 00:00:00 2001
From: klensy <klensy at users.noreply.github.com>
Date: Sat, 11 May 2024 14:26:52 +0300
Subject: [PATCH 1/6] llvm: fix few typos in filecheck tests
clang: fix few typos in filecheck tests
flang: fix few typos in filecheck tests
and few more
---
.../checkers/modernize/redundant-void-arg.cpp | 4 +-
.../Analysis/analyzer-checker-option-help.c | 40 +++++++++----------
.../vtable-assume-load-address-space.cpp | 2 +-
clang/test/CodeGenCXX/vtable-assume-load.cpp | 2 +-
.../standard_conversion_sequences.hlsl | 6 +--
flang/test/Lower/HLFIR/maxloc.f90 | 2 +-
flang/test/Lower/HLFIR/maxval.f90 | 2 +-
flang/test/Lower/HLFIR/minloc.f90 | 2 +-
flang/test/Lower/HLFIR/minval.f90 | 2 +-
flang/test/Lower/HLFIR/sum.f90 | 2 +-
flang/test/Lower/Intrinsics/adjustl.f90 | 2 +-
flang/test/Lower/Intrinsics/adjustr.f90 | 2 +-
flang/test/Lower/Intrinsics/fraction.f90 | 2 +-
flang/test/Lower/polymorphic.f90 | 2 +-
.../AArch64/sve-shuffle-broadcast.ll | 2 +-
.../irreducible/diverged-entry-headers.ll | 2 +-
.../CodeGen/AArch64/aarch64_tree_tests.ll | 4 +-
llvm/test/CodeGen/AArch64/arm64_32-atomics.ll | 20 +++++-----
...tliner-retaddr-sign-diff-scope-same-key.ll | 2 +-
.../stp-opt-with-renaming-undef-assert.mir | 2 +-
llvm/test/CodeGen/AMDGPU/addrspacecast.ll | 4 +-
llvm/test/CodeGen/ARM/dsp-loop-indexing.ll | 2 +-
.../test/CodeGen/Mips/optimizeAndPlusShift.ll | 18 ++++-----
.../intel-usm-addrspaces.ll | 2 +-
llvm/test/CodeGen/SystemZ/prefetch-04.ll | 2 +-
llvm/test/CodeGen/X86/global-sections.ll | 4 +-
.../X86/stack-folding-fp-avx512fp16.ll | 1 -
.../CodeGen/X86/stack-frame-layout-remarks.ll | 2 +-
llvm/test/CodeGen/X86/tailregccpic.ll | 4 +-
.../InstrRef/livedebugvalues_illegal_locs.mir | 2 +-
llvm/test/MC/ARM/coff-relocations.s | 2 +-
llvm/test/MC/Mips/expansion-jal-sym-pic.s | 12 +++---
llvm/test/Transforms/Inline/AArch64/binop.ll | 16 ++++----
.../Transforms/Inline/update_invoke_prof.ll | 2 +-
.../InstCombine/lifetime-sanitizer.ll | 2 +-
...imal-epilog-vectorization-profitability.ll | 8 ++--
.../first-order-recurrence-complex.ll | 2 +-
llvm/test/Transforms/LoopVectorize/memdep.ll | 2 +-
...wrapping-pointer-non-integral-addrspace.ll | 2 +-
.../X86/good-prototype.ll | 2 +-
.../PhaseOrdering/lifetime-sanitizer.ll | 2 +-
llvm/test/Verifier/AMDGPU/intrinsic-immarg.ll | 2 +-
.../test/tools/dsymutil/ARM/dwarf5-macho.test | 26 ++++++------
llvm/test/tools/llvm-ar/replace-update.test | 2 +-
mlir/test/Dialect/GPU/outlining.mlir | 2 +-
45 files changed, 114 insertions(+), 115 deletions(-)
diff --git a/clang-tools-extra/test/clang-tidy/checkers/modernize/redundant-void-arg.cpp b/clang-tools-extra/test/clang-tidy/checkers/modernize/redundant-void-arg.cpp
index 89bf7f04f5576..6cf59f91016df 100644
--- a/clang-tools-extra/test/clang-tidy/checkers/modernize/redundant-void-arg.cpp
+++ b/clang-tools-extra/test/clang-tidy/checkers/modernize/redundant-void-arg.cpp
@@ -306,8 +306,8 @@ void gronk::bar(void) {
// CHECK-MESSAGES: :[[@LINE-2]]:11: warning: {{.*}} in variable declaration
// CHECK-FIXES: {{^ }}void (gronk::*p5){{$}}
// CHECK-FIXES-NEXT: {{^ \($}}
- // CHECK-FIXES-NExT: {{^ $}}
- // CHECK-FIXES-NExT: {{^ \);$}}
+ // CHECK-FIXES-NEXT: {{^ $}}
+ // CHECK-FIXES-NEXT: {{^ \);$}}
}
// intentionally not LLVM style to check preservation of whitespace
diff --git a/clang/test/Analysis/analyzer-checker-option-help.c b/clang/test/Analysis/analyzer-checker-option-help.c
index 5f95569e58498..5e7531314f3ba 100644
--- a/clang/test/Analysis/analyzer-checker-option-help.c
+++ b/clang/test/Analysis/analyzer-checker-option-help.c
@@ -35,26 +35,26 @@
//
// CHECK-STABLE: cplusplus.Move:WarnOn
// CHECK-STABLE-SAME: (string) In non-aggressive mode, only warn
-// CHECK-STABLLE: on use-after-move of local variables (or
-// CHECK-STABLLE: local rvalue references) and of STL objects.
-// CHECK-STABLLE: The former is possible because local variables
-// CHECK-STABLLE: (or local rvalue references) are not tempting
-// CHECK-STABLLE: their user to re-use the storage. The latter
-// CHECK-STABLLE: is possible because STL objects are known
-// CHECK-STABLLE: to end up in a valid but unspecified state
-// CHECK-STABLLE: after the move and their state-reset methods
-// CHECK-STABLLE: are also known, which allows us to predict
-// CHECK-STABLLE: precisely when use-after-move is invalid.
-// CHECK-STABLLE: Some STL objects are known to conform to
-// CHECK-STABLLE: additional contracts after move, so they
-// CHECK-STABLLE: are not tracked. However, smart pointers
-// CHECK-STABLLE: specifically are tracked because we can
-// CHECK-STABLLE: perform extra checking over them. In aggressive
-// CHECK-STABLLE: mode, warn on any use-after-move because
-// CHECK-STABLLE: the user has intentionally asked us to completely
-// CHECK-STABLLE: eliminate use-after-move in his code. Values:
-// CHECK-STABLLE: "KnownsOnly", "KnownsAndLocals", "All".
-// CHECK-STABLLE: (default: KnownsAndLocals)
+// CHECK-STABLE: on use-after-move of local variables (or
+// CHECK-STABLE: local rvalue references) and of STL objects.
+// CHECK-STABLE: The former is possible because local variables
+// CHECK-STABLE: (or local rvalue references) are not tempting
+// CHECK-STABLE: their user to re-use the storage. The latter
+// CHECK-STABLE: is possible because STL objects are known
+// CHECK-STABLE: to end up in a valid but unspecified state
+// CHECK-STABLE: after the move and their state-reset methods
+// CHECK-STABLE: are also known, which allows us to predict
+// CHECK-STABLE: precisely when use-after-move is invalid.
+// CHECK-STABLE: Some STL objects are known to conform to
+// CHECK-STABLE: additional contracts after move, so they
+// CHECK-STABLE: are not tracked. However, smart pointers
+// CHECK-STABLE: specifically are tracked because we can
+// CHECK-STABLE: perform extra checking over them. In aggressive
+// CHECK-STABLE: mode, warn on any use-after-move because
+// CHECK-STABLE: the user has intentionally asked us to completely
+// CHECK-STABLE: eliminate use-after-move in his code. Values:
+// CHECK-STABLE: "KnownsOnly", "KnownsAndLocals", "All".
+// CHECK-STABLE: (default: KnownsAndLocals)
// CHECK-STABLE-NOT: debug.AnalysisOrder:*
// CHECK-DEVELOPER: debug.AnalysisOrder:*
diff --git a/clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp b/clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp
index d765fe94d9b08..00afc7e1862eb 100644
--- a/clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp
+++ b/clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp
@@ -109,7 +109,7 @@ void g(B *a) { a->foo(); }
// CHECK3: call void @_ZN5test31CC1Ev(ptr
// CHECK3: %[[CMP:.*]] = icmp eq ptr addrspace(1) %{{.*}}, getelementptr inbounds inrange(-24, 8) ({ [4 x ptr addrspace(1)] }, ptr addrspace(1) @_ZTVN5test31CE, i32 0, i32 0, i32 3)
// CHECK3: call void @llvm.assume(i1 %[[CMP]])
-// CHECK3-LABLEL: }
+// CHECK3-LABEL: }
void test() {
C c;
g(&c);
diff --git a/clang/test/CodeGenCXX/vtable-assume-load.cpp b/clang/test/CodeGenCXX/vtable-assume-load.cpp
index 6ce07d0db1b15..21ed9233a74fa 100644
--- a/clang/test/CodeGenCXX/vtable-assume-load.cpp
+++ b/clang/test/CodeGenCXX/vtable-assume-load.cpp
@@ -111,7 +111,7 @@ void g(B *a) { a->foo(); }
// CHECK3: call void @_ZN5test31CC1Ev(ptr
// CHECK3: %[[CMP:.*]] = icmp eq ptr %{{.*}}, getelementptr inbounds inrange(-24, 8) ({ [4 x ptr] }, ptr @_ZTVN5test31CE, i32 0, i32 0, i32 3)
// CHECK3: call void @llvm.assume(i1 %[[CMP]])
-// CHECK3-LABLEL: }
+// CHECK3-LABEL: }
void test() {
C c;
g(&c);
diff --git a/clang/test/SemaHLSL/standard_conversion_sequences.hlsl b/clang/test/SemaHLSL/standard_conversion_sequences.hlsl
index a0d398105f15d..693dc1a4a2dc7 100644
--- a/clang/test/SemaHLSL/standard_conversion_sequences.hlsl
+++ b/clang/test/SemaHLSL/standard_conversion_sequences.hlsl
@@ -4,9 +4,9 @@
void test() {
// CHECK: VarDecl {{.*}} used f3 'vector<float, 3>':'float __attribute__((ext_vector_type(3)))' cinit
- // CHECK-NEXt: ImplicitCastExpr {{.*}} 'vector<float, 3>':'float __attribute__((ext_vector_type(3)))' <VectorSplat>
- // CHECK-NEXt: ImplicitCastExpr {{.*}} 'float' <FloatingCast>
- // CHECK-NEXt: FloatingLiteral {{.*}} 'double' 1.000000e+00
+ // CHECK-NEXT: ImplicitCastExpr {{.*}} 'vector<float, 3>':'float __attribute__((ext_vector_type(3)))' <VectorSplat>
+ // CHECK-NEXT: ImplicitCastExpr {{.*}} 'float' <FloatingCast>
+ // CHECK-NEXT: FloatingLiteral {{.*}} 'double' 1.000000e+00
vector<float,3> f3 = 1.0; // No warning for splatting to a vector from a literal.
diff --git a/flang/test/Lower/HLFIR/maxloc.f90 b/flang/test/Lower/HLFIR/maxloc.f90
index 166a1b9db1724..dbcac8ccb1d28 100644
--- a/flang/test/Lower/HLFIR/maxloc.f90
+++ b/flang/test/Lower/HLFIR/maxloc.f90
@@ -86,7 +86,7 @@ subroutine maxloc5(s)
! CHECK-NEXT: hlfir.assign %[[EXPR]] to %[[OUT]]#0 : !hlfir.expr<2xi32>, !fir.ref<!fir.array<2xi32>>
! CHECK-NEXT: hlfir.destroy %[[EXPR]] : !hlfir.expr<2xi32>
! CHECK-NEXT: return
-! CHECK-nEXT: }
+! CHECK-NEXT: }
! back argument as .true.
subroutine maxloc_back(a, s)
diff --git a/flang/test/Lower/HLFIR/maxval.f90 b/flang/test/Lower/HLFIR/maxval.f90
index 5adad286a77d2..7a4f52fc1c0d4 100644
--- a/flang/test/Lower/HLFIR/maxval.f90
+++ b/flang/test/Lower/HLFIR/maxval.f90
@@ -83,7 +83,7 @@ subroutine maxval5(s)
! CHECK-NEXT: hlfir.assign %[[EXPR]] to %[[OUT]]#0 : !hlfir.expr<2xi32>, !fir.ref<!fir.array<2xi32>>
! CHECK-NEXT: hlfir.destroy %[[EXPR]] : !hlfir.expr<2xi32>
! CHECK-NEXT: return
-! CHECK-nEXT: }
+! CHECK-NEXT: }
subroutine maxval6(a, s, d)
integer, pointer :: d
diff --git a/flang/test/Lower/HLFIR/minloc.f90 b/flang/test/Lower/HLFIR/minloc.f90
index f835cf54b2a73..45f2ef2d7f3b7 100644
--- a/flang/test/Lower/HLFIR/minloc.f90
+++ b/flang/test/Lower/HLFIR/minloc.f90
@@ -86,7 +86,7 @@ subroutine minloc5(s)
! CHECK-NEXT: hlfir.assign %[[EXPR]] to %[[OUT]]#0 : !hlfir.expr<2xi32>, !fir.ref<!fir.array<2xi32>>
! CHECK-NEXT: hlfir.destroy %[[EXPR]] : !hlfir.expr<2xi32>
! CHECK-NEXT: return
-! CHECK-nEXT: }
+! CHECK-NEXT: }
! back argument as .true.
subroutine minloc_back(a, s)
diff --git a/flang/test/Lower/HLFIR/minval.f90 b/flang/test/Lower/HLFIR/minval.f90
index 01b0ce77e2d30..3382bd20b6652 100644
--- a/flang/test/Lower/HLFIR/minval.f90
+++ b/flang/test/Lower/HLFIR/minval.f90
@@ -83,7 +83,7 @@ subroutine minval5(s)
! CHECK-NEXT: hlfir.assign %[[EXPR]] to %[[OUT]]#0 : !hlfir.expr<2xi32>, !fir.ref<!fir.array<2xi32>>
! CHECK-NEXT: hlfir.destroy %[[EXPR]] : !hlfir.expr<2xi32>
! CHECK-NEXT: return
-! CHECK-nEXT: }
+! CHECK-NEXT: }
subroutine minval6(a, s, d)
integer, pointer :: d
diff --git a/flang/test/Lower/HLFIR/sum.f90 b/flang/test/Lower/HLFIR/sum.f90
index 339582088b032..aed567f73b6b1 100644
--- a/flang/test/Lower/HLFIR/sum.f90
+++ b/flang/test/Lower/HLFIR/sum.f90
@@ -83,7 +83,7 @@ subroutine sum5(s)
! CHECK-NEXT: hlfir.assign %[[EXPR]] to %[[OUT]]#0 : !hlfir.expr<2xi32>, !fir.ref<!fir.array<2xi32>>
! CHECK-NEXT: hlfir.destroy %[[EXPR]] : !hlfir.expr<2xi32>
! CHECK-NEXT: return
-! CHECK-nEXT: }
+! CHECK-NEXT: }
subroutine sum6(a, s, d)
integer, pointer :: d
diff --git a/flang/test/Lower/Intrinsics/adjustl.f90 b/flang/test/Lower/Intrinsics/adjustl.f90
index a8d004cd52665..4f5161b467298 100644
--- a/flang/test/Lower/Intrinsics/adjustl.f90
+++ b/flang/test/Lower/Intrinsics/adjustl.f90
@@ -1,6 +1,6 @@
! RUN: bbc -emit-fir -hlfir=false %s -o - | FileCheck %s
-! CHECK-LABLE: adjustl_test
+! CHECK-LABEL: adjustl_test
subroutine adjustl_test
character(len=12) :: adjust_str = ' 0123456789'
! CHECK: %[[strBox:.*]] = fir.alloca !fir.box<!fir.heap<!fir.char<1,?>>>
diff --git a/flang/test/Lower/Intrinsics/adjustr.f90 b/flang/test/Lower/Intrinsics/adjustr.f90
index 07aa08c994586..92ebf313b6848 100644
--- a/flang/test/Lower/Intrinsics/adjustr.f90
+++ b/flang/test/Lower/Intrinsics/adjustr.f90
@@ -1,6 +1,6 @@
! RUN: bbc -emit-fir -hlfir=false %s -o - | FileCheck %s
-! CHECK-LABLE: adjustr_test
+! CHECK-LABEL: adjustr_test
subroutine adjustr_test
character(len=12) :: adjust_str = '0123456789 '
! CHECK: %[[strBox:.*]] = fir.alloca !fir.box<!fir.heap<!fir.char<1,?>>>
diff --git a/flang/test/Lower/Intrinsics/fraction.f90 b/flang/test/Lower/Intrinsics/fraction.f90
index f9fff725eb27a..3120e6f232ecb 100644
--- a/flang/test/Lower/Intrinsics/fraction.f90
+++ b/flang/test/Lower/Intrinsics/fraction.f90
@@ -1,7 +1,7 @@
! RUN: bbc -emit-fir %s -o - | FileCheck %s
! FRACTION
-! CHECK-LABE: fraction_test
+! CHECK-LABEL: fraction_test
subroutine fraction_test
real(kind=4) :: x1 = 178.1387e-4
diff --git a/flang/test/Lower/polymorphic.f90 b/flang/test/Lower/polymorphic.f90
index 14ec8a06a964f..0f148947fea57 100644
--- a/flang/test/Lower/polymorphic.f90
+++ b/flang/test/Lower/polymorphic.f90
@@ -151,7 +151,7 @@ subroutine call_fct()
! CHECK-LABEL: func.func @_QMpolymorphic_testPtest_fct_ret_class() -> !fir.class<!fir.ptr<!fir.type<_QMpolymorphic_testTp1{a:i32,b:i32}>>>
! CHECK: return %{{.*}} : !fir.class<!fir.ptr<!fir.type<_QMpolymorphic_testTp1{a:i32,b:i32}>>>
-! CHECK-lABEL: func.func @_QMpolymorphic_testPcall_fct()
+! CHECK-LABEL: func.func @_QMpolymorphic_testPcall_fct()
! CHECK: %[[RESULT:.*]] = fir.alloca !fir.class<!fir.ptr<!fir.type<_QMpolymorphic_testTp1{a:i32,b:i32}>>> {bindc_name = ".result"}
! CHECK: %[[CALL_RES:.*]] = fir.call @_QMpolymorphic_testPtest_fct_ret_class() {{.*}}: () -> !fir.class<!fir.ptr<!fir.type<_QMpolymorphic_testTp1{a:i32,b:i32}>>>
! CHECK: fir.save_result %[[CALL_RES]] to %[[RESULT]] : !fir.class<!fir.ptr<!fir.type<_QMpolymorphic_testTp1{a:i32,b:i32}>>>, !fir.ref<!fir.class<!fir.ptr<!fir.type<_QMpolymorphic_testTp1{a:i32,b:i32}>>>>
diff --git a/llvm/test/Analysis/CostModel/AArch64/sve-shuffle-broadcast.ll b/llvm/test/Analysis/CostModel/AArch64/sve-shuffle-broadcast.ll
index a2526d9f5591a..c2aab35194831 100644
--- a/llvm/test/Analysis/CostModel/AArch64/sve-shuffle-broadcast.ll
+++ b/llvm/test/Analysis/CostModel/AArch64/sve-shuffle-broadcast.ll
@@ -31,7 +31,7 @@ define void @broadcast() #0{
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %22 = shufflevector <vscale x 8 x i1> undef, <vscale x 8 x i1> undef, <vscale x 8 x i32> zeroinitializer
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %23 = shufflevector <vscale x 4 x i1> undef, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %24 = shufflevector <vscale x 2 x i1> undef, <vscale x 2 x i1> undef, <vscale x 2 x i32> zeroinitializer
-; CHECK-NETX: Cost Model: Found an estimated cost of 0 for instruction: ret void
+; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
%zero = shufflevector <vscale x 16 x i8> undef, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer
%1 = shufflevector <vscale x 32 x i8> undef, <vscale x 32 x i8> undef, <vscale x 32 x i32> zeroinitializer
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/diverged-entry-headers.ll b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/diverged-entry-headers.ll
index 335026dc9b62b..efad77b684a75 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/diverged-entry-headers.ll
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/diverged-entry-headers.ll
@@ -90,7 +90,7 @@ S:
br i1 %cond.uni, label %exit, label %T
T:
-; CHECK-NIT: DIVERGENT: %tt.phi = phi i32
+; CHECK-NOT: DIVERGENT: %tt.phi = phi i32
%tt.phi = phi i32 [ %ss, %S ], [ %a, %entry ]
%tt = add i32 %b, 1
br label %P
diff --git a/llvm/test/CodeGen/AArch64/aarch64_tree_tests.ll b/llvm/test/CodeGen/AArch64/aarch64_tree_tests.ll
index 0a06765a8f75b..37cd3929be338 100644
--- a/llvm/test/CodeGen/AArch64/aarch64_tree_tests.ll
+++ b/llvm/test/CodeGen/AArch64/aarch64_tree_tests.ll
@@ -5,7 +5,7 @@ target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
target triple = "arm64--linux-gnu"
; FIXME: Misspelled CHECK-LABEL
-; CHECK-LABLE: @aarch64_tree_tests_and
+; CHECK-LABEL: @aarch64_tree_tests_and
; CHECK: .hword 32768
; CHECK: .hword 32767
; CHECK: .hword 4664
@@ -24,7 +24,7 @@ entry:
}
; FIXME: Misspelled CHECK-LABEL
-; CHECK-LABLE: @aarch64_tree_tests_or
+; CHECK-LABEL: @aarch64_tree_tests_or
; CHECK: .hword 32768
; CHECK: .hword 32766
; CHECK: .hword 4664
diff --git a/llvm/test/CodeGen/AArch64/arm64_32-atomics.ll b/llvm/test/CodeGen/AArch64/arm64_32-atomics.ll
index 0000262e833da..19b9205dc1786 100644
--- a/llvm/test/CodeGen/AArch64/arm64_32-atomics.ll
+++ b/llvm/test/CodeGen/AArch64/arm64_32-atomics.ll
@@ -2,70 +2,70 @@
; RUN: llc -mtriple=arm64_32-apple-ios7.0 -mattr=+outline-atomics -o - %s | FileCheck %s -check-prefix=OUTLINE-ATOMICS
define i8 @test_load_8(ptr %addr) {
-; CHECK-LABAL: test_load_8:
+; CHECK-LABEL: test_load_8:
; CHECK: ldarb w0, [x0]
%val = load atomic i8, ptr %addr seq_cst, align 1
ret i8 %val
}
define i16 @test_load_16(ptr %addr) {
-; CHECK-LABAL: test_load_16:
+; CHECK-LABEL: test_load_16:
; CHECK: ldarh w0, [x0]
%val = load atomic i16, ptr %addr acquire, align 2
ret i16 %val
}
define i32 @test_load_32(ptr %addr) {
-; CHECK-LABAL: test_load_32:
+; CHECK-LABEL: test_load_32:
; CHECK: ldar w0, [x0]
%val = load atomic i32, ptr %addr seq_cst, align 4
ret i32 %val
}
define i64 @test_load_64(ptr %addr) {
-; CHECK-LABAL: test_load_64:
+; CHECK-LABEL: test_load_64:
; CHECK: ldar x0, [x0]
%val = load atomic i64, ptr %addr seq_cst, align 8
ret i64 %val
}
define ptr @test_load_ptr(ptr %addr) {
-; CHECK-LABAL: test_load_ptr:
+; CHECK-LABEL: test_load_ptr:
; CHECK: ldar w0, [x0]
%val = load atomic ptr, ptr %addr seq_cst, align 8
ret ptr %val
}
define void @test_store_8(ptr %addr) {
-; CHECK-LABAL: test_store_8:
+; CHECK-LABEL: test_store_8:
; CHECK: stlrb wzr, [x0]
store atomic i8 0, ptr %addr seq_cst, align 1
ret void
}
define void @test_store_16(ptr %addr) {
-; CHECK-LABAL: test_store_16:
+; CHECK-LABEL: test_store_16:
; CHECK: stlrh wzr, [x0]
store atomic i16 0, ptr %addr seq_cst, align 2
ret void
}
define void @test_store_32(ptr %addr) {
-; CHECK-LABAL: test_store_32:
+; CHECK-LABEL: test_store_32:
; CHECK: stlr wzr, [x0]
store atomic i32 0, ptr %addr seq_cst, align 4
ret void
}
define void @test_store_64(ptr %addr) {
-; CHECK-LABAL: test_store_64:
+; CHECK-LABEL: test_store_64:
; CHECK: stlr xzr, [x0]
store atomic i64 0, ptr %addr seq_cst, align 8
ret void
}
define void @test_store_ptr(ptr %addr) {
-; CHECK-LABAL: test_store_ptr:
+; CHECK-LABEL: test_store_ptr:
; CHECK: stlr wzr, [x0]
store atomic ptr null, ptr %addr seq_cst, align 8
ret void
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll
index a5757a70843a9..fa63df35ac857 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll
@@ -28,7 +28,7 @@ define void @a() "sign-return-address"="all" {
}
define void @b() "sign-return-address"="non-leaf" {
-; CHECK-LABE: b: // @b
+; CHECK-LABEL: b: // @b
; V8A-NOT: hint #25
; V83A-NOT: paciasp
; CHECK-NOT: .cfi_negate_ra_state
diff --git a/llvm/test/CodeGen/AArch64/stp-opt-with-renaming-undef-assert.mir b/llvm/test/CodeGen/AArch64/stp-opt-with-renaming-undef-assert.mir
index 66d2067b531a3..bfdb1763776b4 100644
--- a/llvm/test/CodeGen/AArch64/stp-opt-with-renaming-undef-assert.mir
+++ b/llvm/test/CodeGen/AArch64/stp-opt-with-renaming-undef-assert.mir
@@ -12,7 +12,7 @@
# This test also checks that pairwise store STP is generated.
-# CHECK-LABLE: test
+# CHECK-LABEL: test
# CHECK: bb.0:
# CHECK-NEXT: liveins: $x0, $x17, $x18
# CHECK: renamable $q13_q14_q15 = LD3Threev16b undef renamable $x17 :: (load (s384) from `ptr undef`, align 64)
diff --git a/llvm/test/CodeGen/AMDGPU/addrspacecast.ll b/llvm/test/CodeGen/AMDGPU/addrspacecast.ll
index 50423c59eabe9..526d5c946ec7f 100644
--- a/llvm/test/CodeGen/AMDGPU/addrspacecast.ll
+++ b/llvm/test/CodeGen/AMDGPU/addrspacecast.ll
@@ -108,7 +108,7 @@ define amdgpu_kernel void @use_global_to_flat_addrspacecast(ptr addrspace(1) %pt
}
; no-op
-; HSA-LABEl: {{^}}use_constant_to_flat_addrspacecast:
+; HSA-LABEL: {{^}}use_constant_to_flat_addrspacecast:
; HSA: s_load_dwordx2 s[[[PTRLO:[0-9]+]]:[[PTRHI:[0-9]+]]]
; HSA-DAG: v_mov_b32_e32 v[[VPTRLO:[0-9]+]], s[[PTRLO]]
; HSA-DAG: v_mov_b32_e32 v[[VPTRHI:[0-9]+]], s[[PTRHI]]
@@ -119,7 +119,7 @@ define amdgpu_kernel void @use_constant_to_flat_addrspacecast(ptr addrspace(4) %
ret void
}
-; HSA-LABEl: {{^}}use_constant_to_global_addrspacecast:
+; HSA-LABEL: {{^}}use_constant_to_global_addrspacecast:
; HSA: s_load_dwordx2 s[[[PTRLO:[0-9]+]]:[[PTRHI:[0-9]+]]]
; CI-DAG: v_mov_b32_e32 v[[VPTRLO:[0-9]+]], s[[PTRLO]]
; CI-DAG: v_mov_b32_e32 v[[VPTRHI:[0-9]+]], s[[PTRHI]]
diff --git a/llvm/test/CodeGen/ARM/dsp-loop-indexing.ll b/llvm/test/CodeGen/ARM/dsp-loop-indexing.ll
index 9fb64471e9881..892e66aed4e5f 100644
--- a/llvm/test/CodeGen/ARM/dsp-loop-indexing.ll
+++ b/llvm/test/CodeGen/ARM/dsp-loop-indexing.ll
@@ -22,7 +22,7 @@
; CHECK-DEFAULT: ldr{{.*}}, #4]
; CHECK-DEFAULT: str{{.*}}, #4]
; CHECK-DEFAULT: ldr{{.*}}, #8]!
-; CHECK-DEAFULT: ldr{{.*}}, #8]!
+; CHECK-DEFAULT: ldr{{.*}}, #8]!
; CHECK-DEFAULT: str{{.*}}, #8]!
; CHECK-COMPLEX: ldr{{.*}}, #8]!
diff --git a/llvm/test/CodeGen/Mips/optimizeAndPlusShift.ll b/llvm/test/CodeGen/Mips/optimizeAndPlusShift.ll
index bf69adf6702f0..58920483e24bf 100644
--- a/llvm/test/CodeGen/Mips/optimizeAndPlusShift.ll
+++ b/llvm/test/CodeGen/Mips/optimizeAndPlusShift.ll
@@ -3,11 +3,11 @@
; RUN: llc < %s -mtriple=mips64el-unknown-linux-gnuabi64 | FileCheck %s --check-prefixes=MIPS64
define i32 @shl_32(i32 %a, i32 %b) {
-; MIPS32-LABLE: shl_32:
+; MIPS32-LABEL: shl_32:
; MIPS32: # %bb.0:
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: sllv $2, $4, $5
-; MIPS64-LABLE: shl_32:
+; MIPS64-LABEL: shl_32:
; MIPS64: # %bb.0:
; MIPS64-NEXT: sll $1, $5, 0
; MIPS64-NEXT: sll $2, $4, 0
@@ -19,11 +19,11 @@ define i32 @shl_32(i32 %a, i32 %b) {
}
define i32 @lshr_32(i32 %a, i32 %b) {
-; MIPS32-LABLE: lshr_32:
+; MIPS32-LABEL: lshr_32:
; MIPS32: # %bb.0:
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: srlv $2, $4, $5
-; MIPS64-LABLE: lshr_32:
+; MIPS64-LABEL: lshr_32:
; MIPS64: # %bb.0:
; MIPS64-NEXT: sll $1, $5, 0
; MIPS64-NEXT: sll $2, $4, 0
@@ -35,11 +35,11 @@ define i32 @lshr_32(i32 %a, i32 %b) {
}
define i32 @ashr_32(i32 %a, i32 %b) {
-; MIPS32-LABLE: ashr_32:
+; MIPS32-LABEL: ashr_32:
; MIPS32: # %bb.0:
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: srav $2, $4, $5
-; MIPS64-LABLE: ashr_32:
+; MIPS64-LABEL: ashr_32:
; MIPS64: # %bb.0:
; MIPS64-NEXT: sll $1, $5, 0
; MIPS64-NEXT: sll $2, $4, 0
@@ -51,7 +51,7 @@ define i32 @ashr_32(i32 %a, i32 %b) {
}
define i64 @shl_64(i64 %a, i64 %b) {
-; MIPS64-LABLE: shl_64:
+; MIPS64-LABEL: shl_64:
; MIPS64: # %bb.0:
; MIPS64-NEXT: sll $1, $5, 0
; MIPS64-NEXT: jr $ra
@@ -62,7 +62,7 @@ define i64 @shl_64(i64 %a, i64 %b) {
}
define i64 @lshr_64(i64 %a, i64 %b) {
-; MIPS64-LABLE: lshr_64:
+; MIPS64-LABEL: lshr_64:
; MIPS64: # %bb.0:
; MIPS64-NEXT: sll $1, $5, 0
; MIPS64-NEXT: jr $ra
@@ -73,7 +73,7 @@ define i64 @lshr_64(i64 %a, i64 %b) {
}
define i64 @ashr_64(i64 %a, i64 %b) {
-; MIPS64-LABLE: ashr_64:
+; MIPS64-LABEL: ashr_64:
; MIPS64: # %bb.0:
; MIPS64-NEXT: sll $1, $5, 0
; MIPS64-NEXT: jr $ra
diff --git a/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_usm_storage_classes/intel-usm-addrspaces.ll b/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_usm_storage_classes/intel-usm-addrspaces.ll
index b5df462bd8fa9..f5f1382a35fca 100644
--- a/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_usm_storage_classes/intel-usm-addrspaces.ll
+++ b/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_usm_storage_classes/intel-usm-addrspaces.ll
@@ -6,7 +6,7 @@
; TODO: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
; CHECK-: Capability USMStorageClassesINTEL
-; CHECK-SPIRV-WITHOUT-NO: Capability USMStorageClassesINTEL
+; CHECK-SPIRV-WITHOUT-NOT: Capability USMStorageClassesINTEL
; CHECK-SPIRV-EXT-DAG: %[[DevTy:[0-9]+]] = OpTypePointer DeviceOnlyINTEL %[[#]]
; CHECK-SPIRV-EXT-DAG: %[[HostTy:[0-9]+]] = OpTypePointer HostOnlyINTEL %[[#]]
; CHECK-SPIRV-DAG: %[[CrsWrkTy:[0-9]+]] = OpTypePointer CrossWorkgroup %[[#]]
diff --git a/llvm/test/CodeGen/SystemZ/prefetch-04.ll b/llvm/test/CodeGen/SystemZ/prefetch-04.ll
index 61a2a1460c583..10755bdb66eb5 100644
--- a/llvm/test/CodeGen/SystemZ/prefetch-04.ll
+++ b/llvm/test/CodeGen/SystemZ/prefetch-04.ll
@@ -6,7 +6,7 @@
;
; CHECK-LABEL: for.body
; CHECK: call void @llvm.prefetch.p0(ptr %scevgep, i32 1, i32 3, i32 1
-; CHECK-not: call void @llvm.prefetch
+; CHECK-NOT: call void @llvm.prefetch
define void @fun(ptr nocapture %Src, ptr nocapture readonly %Dst) {
entry:
diff --git a/llvm/test/CodeGen/X86/global-sections.ll b/llvm/test/CodeGen/X86/global-sections.ll
index b300fc87e38ab..0175eb23ce080 100644
--- a/llvm/test/CodeGen/X86/global-sections.ll
+++ b/llvm/test/CodeGen/X86/global-sections.ll
@@ -36,8 +36,8 @@ bb5:
}
; LINUX: .size F2,
-; LINUX-NEX: .cfi_endproc
-; LINUX-NEX: .section .rodata,"a", at progbits
+; LINUX-NEXT: .cfi_endproc
+; LINUX-NEXT: .section .rodata,"a", at progbits
; LINUX-SECTIONS: .section .text.F2,"ax", at progbits
; LINUX-SECTIONS: .size F2,
diff --git a/llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16.ll b/llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16.ll
index e4eca6b744af9..ed7109c416e7f 100644
--- a/llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16.ll
@@ -265,7 +265,6 @@ define i32 @stack_fold_fpclassph_mask(<32 x half> %a0, ptr %p) {
}
define i8 @stack_fold_fpclasssh(<8 x half> %a0) {
- ;CHECK-LABEl: stack_fold_fpclasssh:
; CHECK-LABEL: stack_fold_fpclasssh:
; CHECK: # %bb.0:
; CHECK-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
diff --git a/llvm/test/CodeGen/X86/stack-frame-layout-remarks.ll b/llvm/test/CodeGen/X86/stack-frame-layout-remarks.ll
index d32a37efcb5a4..cd5edcf2ae502 100644
--- a/llvm/test/CodeGen/X86/stack-frame-layout-remarks.ll
+++ b/llvm/test/CodeGen/X86/stack-frame-layout-remarks.ll
@@ -35,7 +35,7 @@ entry:
declare void @llvm.dbg.declare(metadata, metadata, metadata) #0
; BOTH: Function: cleanup_array
-; BOTH-Next: Offset: [SP+4], Type: Protector, Align: 16, Size: 4
+; BOTH-NEXT: Offset: [SP+4], Type: Protector, Align: 16, Size: 4
; DEBUG: a @ dot.c:13
; STRIPPED-NOT: a @ dot.c:13
; BOTH: Offset: [SP-4], Type: Spill, Align: 8, Size: 4
diff --git a/llvm/test/CodeGen/X86/tailregccpic.ll b/llvm/test/CodeGen/X86/tailregccpic.ll
index f89c4ac4df599..a3a17d3b05397 100644
--- a/llvm/test/CodeGen/X86/tailregccpic.ll
+++ b/llvm/test/CodeGen/X86/tailregccpic.ll
@@ -13,12 +13,12 @@ entry:
ret void
}
-;CHECK-LABLE: tail_call_regcall:
+;CHECK-LABEL: tail_call_regcall:
;CHECK: # %bb.0:
;CHECK-NEXT: jmp __regcall3__func # TAILCALL
;CHECK-NEXT: .Lfunc_end0:
-;CHECK-LABLE: __regcall3__func:
+;CHECK-LABEL: __regcall3__func:
;CHECK: addl $_GLOBAL_OFFSET_TABLE_+({{.*}}), %ecx
;CHECK-NEXT: movl a0 at GOT(%ecx), %ecx
;CHECK-NEXT: movl %eax, (%ecx)
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_illegal_locs.mir b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_illegal_locs.mir
index d4ed0fba2d7cd..d5fa1f1375ca0 100644
--- a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_illegal_locs.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_illegal_locs.mir
@@ -43,7 +43,7 @@ debugValueSubstitutions:
body: |
bb.0.entry:
successors: %bb.1, %bb.2
- ; CHECK-LABE: bb.0.entry:
+ ; CHECK-LABEL: bb.0.entry:
$rax = MOV64ri 1, debug-instr-number 1, debug-location !17
DBG_INSTR_REF !16, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !17
diff --git a/llvm/test/MC/ARM/coff-relocations.s b/llvm/test/MC/ARM/coff-relocations.s
index 5225b5e656762..16993cf7a8588 100644
--- a/llvm/test/MC/ARM/coff-relocations.s
+++ b/llvm/test/MC/ARM/coff-relocations.s
@@ -25,7 +25,7 @@ branch24t_1:
bl target
@ CHECK-ENCODING-LABEL: <branch24t_1>:
-@ CHECK-ENCODING-NEXR: bl {{.+}} @ imm = #0
+@ CHECK-ENCODING-NEXT: bl {{.+}} @ imm = #0
.thumb_func
branch20t:
diff --git a/llvm/test/MC/Mips/expansion-jal-sym-pic.s b/llvm/test/MC/Mips/expansion-jal-sym-pic.s
index c7b5ccc1880bd..1279de10d2503 100644
--- a/llvm/test/MC/Mips/expansion-jal-sym-pic.s
+++ b/llvm/test/MC/Mips/expansion-jal-sym-pic.s
@@ -227,12 +227,12 @@ local_label:
# XO32-NEXT: .reloc ($tmp1), R_MIPS_JALR, weak_label
# ELF-XO32: 3c 19 00 00 lui $25, 0
-# ELF-XO32-MEXT: R_MIPS_CALL_HI16 weak_label
-# ELF-XO32-MEXT: 03 3c c8 21 addu $25, $25, $gp
-# ELF-XO32-MEXT: 8f 39 00 00 lw $25, 0($25)
-# ELF-XO32-MEXT: R_MIPS_CALL_LO16 weak_label
-# ELF-XO32-MEXT: 03 20 f8 09 jalr $25
-# ELF-XO32-MEXT: R_MIPS_JALR weak_label
+# ELF-XO32-NEXT: R_MIPS_CALL_HI16 weak_label
+# ELF-XO32-NEXT: 03 3c c8 21 addu $25, $25, $gp
+# ELF-XO32-NEXT: 8f 39 00 00 lw $25, 0($25)
+# ELF-XO32-NEXT: R_MIPS_CALL_LO16 weak_label
+# ELF-XO32-NEXT: 03 20 f8 09 jalr $25
+# ELF-XO32-NEXT: R_MIPS_JALR weak_label
# N32: lw $25, %call16(weak_label)($gp) # encoding: [0x8f,0x99,A,A]
# N32: # fixup A - offset: 0, value: %call16(weak_label), kind: fixup_Mips_CALL16
diff --git a/llvm/test/Transforms/Inline/AArch64/binop.ll b/llvm/test/Transforms/Inline/AArch64/binop.ll
index eb882282820b8..86f4c045b5687 100644
--- a/llvm/test/Transforms/Inline/AArch64/binop.ll
+++ b/llvm/test/Transforms/Inline/AArch64/binop.ll
@@ -190,14 +190,14 @@ define i32 @shr(i32 %a, i32 %b) {
define i1 @outer_and1(i1 %a) {
; check-label: @outer_and1(
-; check-not: call i1 @and1
+; check-NOT: call i1 @and1
%c = call i1 @and1(i1 %a, i1 false)
ret i1 %c
}
define i1 @outer_and2(i1 %a) {
; check-label: @outer_and2(
-; check-not: call i1 @and1
+; check-NOT: call i1 @and1
%c = call i1 @and1(i1 %a, i1 true)
ret i1 %c
}
@@ -212,7 +212,7 @@ define i1 @and1(i1 %a, i1 %b) {
define i1 @outer_and3(i1 %a) {
; check-label: @outer_and3(
-; check-not: call i1 @and2
+; check-NOT: call i1 @and2
%c = call i1 @and2(i1 %a)
ret i1 %c
}
@@ -227,14 +227,14 @@ define i1 @and2(i1 %a) {
define i1 @outer_or1(i1 %a) {
; check-label: @outer_or1(
-; check-not: call i1 @or1
+; check-NOT: call i1 @or1
%c = call i1 @or1(i1 %a, i1 false)
ret i1 %c
}
define i1 @outer_or2(i1 %a) {
; check-label: @outer_or2(
-; check-not: call i1 @or1
+; check-NOT: call i1 @or1
%c = call i1 @or1(i1 %a, i1 true)
ret i1 %c
}
@@ -249,7 +249,7 @@ define i1 @or1(i1 %a, i1 %b) {
define i1 @outer_or3(i1 %a) {
; check-label: @outer_or3(
-; check-not: call i1 @or2
+; check-NOT: call i1 @or2
%c = call i1 @or2(i1 %a)
ret i1 %c
}
@@ -264,7 +264,7 @@ define i1 @or2(i1 %a) {
define i1 @outer_xor1(i1 %a) {
; check-label: @outer_xor1(
-; check-not: call i1 @xor
+; check-NOT: call i1 @xor
%c = call i1 @xor1(i1 %a, i1 false)
ret i1 %c
}
@@ -279,7 +279,7 @@ define i1 @xor1(i1 %a, i1 %b) {
define i1 @outer_xor3(i1 %a) {
; check-label: @outer_xor3(
-; check-not: call i1 @xor
+; check-NOT: call i1 @xor
%c = call i1 @xor2(i1 %a)
ret i1 %c
}
diff --git a/llvm/test/Transforms/Inline/update_invoke_prof.ll b/llvm/test/Transforms/Inline/update_invoke_prof.ll
index f6b86dfe5bb1b..b5fb669c93cbd 100644
--- a/llvm/test/Transforms/Inline/update_invoke_prof.ll
+++ b/llvm/test/Transforms/Inline/update_invoke_prof.ll
@@ -66,7 +66,7 @@ ret:
; CHECK: invoke void @callee2(
; CHECK-NEXT: {{.*}} !prof ![[PROF3:[0-9]+]]
-; CHECK-LABL: @callee(
+; CHECK-LABEL: @callee(
; CHECK: invoke void %func(
; CHECK-NEXT: {{.*}} !prof ![[PROF4:[0-9]+]]
; CHECK: invoke void @callee1(
diff --git a/llvm/test/Transforms/InstCombine/lifetime-sanitizer.ll b/llvm/test/Transforms/InstCombine/lifetime-sanitizer.ll
index e379b32b45734..62573398fc16a 100644
--- a/llvm/test/Transforms/InstCombine/lifetime-sanitizer.ll
+++ b/llvm/test/Transforms/InstCombine/lifetime-sanitizer.ll
@@ -56,7 +56,7 @@ entry:
call void @llvm.lifetime.start.p0(i64 1, ptr %text)
call void @llvm.lifetime.end.p0(i64 1, ptr %text)
- ; CHECK-NO: call void @llvm.lifetime
+ ; CHECK-NOT: call void @llvm.lifetime
call void @foo(ptr %text) ; Keep alloca alive
diff --git a/llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization-profitability.ll b/llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization-profitability.ll
index b88254e7b678d..2ee3efa6f8684 100644
--- a/llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization-profitability.ll
+++ b/llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization-profitability.ll
@@ -10,7 +10,7 @@ target datalayout = "e-m:e-i64:64-n32:64"
target triple = "powerpc64le-unknown-linux-gnu"
; Do not vectorize epilogues for loops with minsize attribute
-; CHECK-LABLE: @f1
+; CHECK-LABEL: @f1
; CHECK-NOT: vector.main.loop.iter.check
; CHECK-NOT: vec.epilog.iter.check
; CHECK-NOT: vec.epilog.ph
@@ -48,7 +48,7 @@ for.end: ; preds = %for.end.loopexit, %
}
; Do not vectorize epilogues for loops with optsize attribute
-; CHECK-LABLE: @f2
+; CHECK-LABEL: @f2
; CHECK-NOT: vector.main.loop.iter.check
; CHECK-NOT: vec.epilog.iter.check
; CHECK-NOT: vec.epilog.ph
@@ -86,7 +86,7 @@ for.end: ; preds = %for.end.loopexit, %
}
; Do not vectorize the epilogue for loops with VF less than the default -epilogue-vectorization-minimum-VF of 16.
-; CHECK-MIN-D-LABLE: @f3
+; CHECK-MIN-D-LABEL: @f3
; CHECK-MIN-D-NOT: vector.main.loop.iter.check
; CHECK-MIN-D-NOT: vec.epilog.iter.check
; CHECK-MIN-D-NOT: vec.epilog.ph
@@ -96,7 +96,7 @@ for.end: ; preds = %for.end.loopexit, %
; Specify a smaller minimum VF (via `-epilogue-vectorization-minimum-VF=4`) and
; make sure the epilogue gets vectorized in that case.
-; CHECK-MIN-D-LABLE: @f3
+; CHECK-MIN-D-LABEL: @f3
; CHECK-MIN-4: vector.main.loop.iter.check
; CHECK-MIN-4: vec.epilog.iter.check
; CHECK-MIN-4: vec.epilog.ph
diff --git a/llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll b/llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
index 95671078a7769..6b7be590c7c23 100644
--- a/llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
+++ b/llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
@@ -335,7 +335,7 @@ define void @cannot_sink_reduction(i32 %x, ptr %ptr, i64 %tc) {
-; CHECK-NET: ret void
+; CHECK-NEXT: ret void
entry:
br label %preheader
diff --git a/llvm/test/Transforms/LoopVectorize/memdep.ll b/llvm/test/Transforms/LoopVectorize/memdep.ll
index b891b4312f18d..eb8c75741c0c0 100644
--- a/llvm/test/Transforms/LoopVectorize/memdep.ll
+++ b/llvm/test/Transforms/LoopVectorize/memdep.ll
@@ -244,7 +244,7 @@ for.end:
; RIGHTVF-LABEL: @pr34283
; RIGHTVF: <4 x i64>
-; WRONGVF-LABLE: @pr34283
+; WRONGVF-LABEL: @pr34283
; WRONGVF-NOT: <8 x i64>
@a = common local_unnamed_addr global [64 x i32] zeroinitializer, align 16
diff --git a/llvm/test/Transforms/LoopVersioning/wrapping-pointer-non-integral-addrspace.ll b/llvm/test/Transforms/LoopVersioning/wrapping-pointer-non-integral-addrspace.ll
index 430baa1cb4f8c..c426737963c52 100644
--- a/llvm/test/Transforms/LoopVersioning/wrapping-pointer-non-integral-addrspace.ll
+++ b/llvm/test/Transforms/LoopVersioning/wrapping-pointer-non-integral-addrspace.ll
@@ -13,7 +13,7 @@ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:10:11:12:13"
declare i64 @julia_steprange_last_4949()
define void @"japi1_align!_9477"(ptr %arg) {
-; LV-LAVEL: L26.lver.check
+; LV-LABEL: L26.lver.check
; LV: [[OFMul:%[^ ]*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 4, i64 [[Step:%[^ ]*]])
; LV-NEXT: [[OFMulResult:%[^ ]*]] = extractvalue { i64, i1 } [[OFMul]], 0
; LV-NEXT: [[OFMulOverflow:%[^ ]*]] = extractvalue { i64, i1 } [[OFMul]], 1
diff --git a/llvm/test/Transforms/PartiallyInlineLibCalls/X86/good-prototype.ll b/llvm/test/Transforms/PartiallyInlineLibCalls/X86/good-prototype.ll
index e6c2a7e629a5d..cea752ad6898d 100644
--- a/llvm/test/Transforms/PartiallyInlineLibCalls/X86/good-prototype.ll
+++ b/llvm/test/Transforms/PartiallyInlineLibCalls/X86/good-prototype.ll
@@ -21,7 +21,7 @@ entry:
define float @f_writeonly(float %val) {
; CHECK-LABEL: @f_writeonly(
-; CHECK-NEXt: [[RES:%.*]] = tail call float @sqrtf(float [[VAL:%.*]]) #[[READNONE]]
+; CHECK-NEXT: [[RES:%.*]] = tail call float @sqrtf(float [[VAL:%.*]]) #[[READNONE]]
%res = tail call float @sqrtf(float %val) writeonly
ret float %res
}
diff --git a/llvm/test/Transforms/PhaseOrdering/lifetime-sanitizer.ll b/llvm/test/Transforms/PhaseOrdering/lifetime-sanitizer.ll
index 5f4d389265a86..3da71320d99c6 100644
--- a/llvm/test/Transforms/PhaseOrdering/lifetime-sanitizer.ll
+++ b/llvm/test/Transforms/PhaseOrdering/lifetime-sanitizer.ll
@@ -63,7 +63,7 @@ entry:
call void @llvm.lifetime.start.p0(i64 1, ptr %text)
call void @llvm.lifetime.end.p0(i64 1, ptr %text)
- ; CHECK-NO: call void @llvm.lifetime
+ ; CHECK-NOT: call void @llvm.lifetime
call void @foo(ptr %text) ; Keep alloca alive
diff --git a/llvm/test/Verifier/AMDGPU/intrinsic-immarg.ll b/llvm/test/Verifier/AMDGPU/intrinsic-immarg.ll
index bb370a6d1dfeb..7f7790cecb0eb 100644
--- a/llvm/test/Verifier/AMDGPU/intrinsic-immarg.ll
+++ b/llvm/test/Verifier/AMDGPU/intrinsic-immarg.ll
@@ -670,7 +670,7 @@ declare void @llvm.amdgcn.buffer.atomic.fadd.f32(float, <4 x i32>, i32, i32, i1)
define amdgpu_cs void @test_buffer_atomic_fadd(float %val, <4 x i32> inreg %rsrc, i32 %vindex, i32 %offset, i1 %slc) {
; CHECK: immarg operand has non-immediate parameter
; CHECK-NEXT: i1 %slc
- ; CHECK-ENXT: call void @llvm.amdgcn.buffer.atomic.fadd.f32(float %val, <4 x i32> %rsrc, i32 %vindex, i32 %offset, i1 %slc)
+ ; CHECK-NEXT: call void @llvm.amdgcn.buffer.atomic.fadd.f32(float %val, <4 x i32> %rsrc, i32 %vindex, i32 %offset, i1 %slc)
call void @llvm.amdgcn.buffer.atomic.fadd.f32(float %val, <4 x i32> %rsrc, i32 %vindex, i32 %offset, i1 %slc)
ret void
}
diff --git a/llvm/test/tools/dsymutil/ARM/dwarf5-macho.test b/llvm/test/tools/dsymutil/ARM/dwarf5-macho.test
index 5268324c2e100..be3a436bcf931 100644
--- a/llvm/test/tools/dsymutil/ARM/dwarf5-macho.test
+++ b/llvm/test/tools/dsymutil/ARM/dwarf5-macho.test
@@ -109,16 +109,16 @@ CHECK-NEXT: 0x0000000e: [DW_RLE_offset_pair ]: {{.*}}[0x[[RANGELIST_OFFSET_STAR
CHECK-NEXT: 0x00000011: [DW_RLE_end_of_list ]
CHECK: .debug_names contents:
-CHECK-NEX:T Name Index @ 0x0 {
-CHECK-NEX:T Header {
-CHECK-NEX:T Length: 0x7C
-CHECK-NEX:T Format: DWARF32
-CHECK-NEX:T Version: 5
-CHECK-NEX:T CU count: 1
-CHECK-NEX:T Local TU count: 0
-CHECK-NEX:T Foreign TU count: 0
-CHECK-NEX:T Bucket count: 3
-CHECK-NEX:T Name count: 3
-CHECK-NEX:T Abbreviations table size: 0xD
-CHECK-NEX:T Augmentation: 'LLVM0700'
-CHECK-NEX:T }
+CHECK-NEXT: Name Index @ 0x0 {
+CHECK-NEXT: Header {
+CHECK-NEXT: Length: 0x7C
+CHECK-NEXT: Format: DWARF32
+CHECK-NEXT: Version: 5
+CHECK-NEXT: CU count: 1
+CHECK-NEXT: Local TU count: 0
+CHECK-NEXT: Foreign TU count: 0
+CHECK-NEXT: Bucket count: 3
+CHECK-NEXT: Name count: 3
+CHECK-NEXT: Abbreviations table size: 0xD
+CHECK-NEXT: Augmentation: 'LLVM0700'
+CHECK-NEXT: }
diff --git a/llvm/test/tools/llvm-ar/replace-update.test b/llvm/test/tools/llvm-ar/replace-update.test
index c056565f144c5..498febdac0193 100644
--- a/llvm/test/tools/llvm-ar/replace-update.test
+++ b/llvm/test/tools/llvm-ar/replace-update.test
@@ -57,7 +57,7 @@
# MULTIPLE-SYM: symbolnew1
# MULTIPLE-SYM-NEXT: symbol2
-# MULTIPLE-SYM-NEXTs: symbolnew3
+# MULTIPLE-SYM-NEXT: symbolnew3
## Replace newer members with multiple older files:
# RUN: llvm-ar ruU %t/multiple.a %t/1.o %t/2.o
diff --git a/mlir/test/Dialect/GPU/outlining.mlir b/mlir/test/Dialect/GPU/outlining.mlir
index 5e4724c9d309c..47ebe326b5d12 100644
--- a/mlir/test/Dialect/GPU/outlining.mlir
+++ b/mlir/test/Dialect/GPU/outlining.mlir
@@ -123,7 +123,7 @@ llvm.func @launch_from_llvm_func() {
llvm.return
}
-// CHECK-DL-LABLE: gpu.module @launch_from_llvm_func_kernel attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<index, 32 : i32>>}
+// CHECK-DL-LABEL: gpu.module @launch_from_llvm_func_kernel attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<index, 32 : i32>>}
// -----
>From b2269ca3ba3394ddbd4215a1fddf1b01942b39dd Mon Sep 17 00:00:00 2001
From: klensy <klensy at users.noreply.github.com>
Date: Sat, 11 May 2024 17:08:14 +0300
Subject: [PATCH 2/6] remove 2 fixme; add few more fixes
---
.../CodeGen/AArch64/aarch64_tree_tests.ll | 2 -
.../AArch64/vec3-loads-ext-trunc-stores.ll | 62 +++++++++----------
.../InstrRef/livedebugvalues_illegal_locs.mir | 2 +-
llvm/test/Transforms/LoopUnroll/peel-loop2.ll | 2 +-
4 files changed, 33 insertions(+), 35 deletions(-)
diff --git a/llvm/test/CodeGen/AArch64/aarch64_tree_tests.ll b/llvm/test/CodeGen/AArch64/aarch64_tree_tests.ll
index 37cd3929be338..3a249e6628195 100644
--- a/llvm/test/CodeGen/AArch64/aarch64_tree_tests.ll
+++ b/llvm/test/CodeGen/AArch64/aarch64_tree_tests.ll
@@ -4,7 +4,6 @@
target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
target triple = "arm64--linux-gnu"
-; FIXME: Misspelled CHECK-LABEL
; CHECK-LABEL: @aarch64_tree_tests_and
; CHECK: .hword 32768
; CHECK: .hword 32767
@@ -23,7 +22,6 @@ entry:
ret <8 x i16> %ret
}
-; FIXME: Misspelled CHECK-LABEL
; CHECK-LABEL: @aarch64_tree_tests_or
; CHECK: .hword 32768
; CHECK: .hword 32766
diff --git a/llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll b/llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll
index 71d55df665176..b2107b7dc0f83 100644
--- a/llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll
+++ b/llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll
@@ -219,40 +219,40 @@ define <4 x i32> @load_v3i8_to_4xi32_const_offset_3(ptr %src) {
define <4 x i32> @volatile_load_v3i8_to_4xi32(ptr %src) {
; check-label: volatile_load_v3i8_to_4xi32:
; check: ; %bb.0:
-; check-next: sub sp, sp, #16
-; check-next: .cfi_def_cfa_offset 16
-; check-next: ldrh w8, [x0]
-; check-next: movi.2d v1, #0x0000ff000000ff
-; check-next: strh w8, [sp, #12]
-; check-next: ldr s0, [sp, #12]
-; check-next: ldrsb w8, [x0, #2]
-; check-next: ushll.8h v0, v0, #0
-; check-next: mov.h v0[1], v0[1]
-; check-next: mov.h v0[2], w8
-; check-next: ushll.4s v0, v0, #0
-; check-next: and.16b v0, v0, v1
-; check-next: add sp, sp, #16
-; check-next: ret
+; check-NEXT: sub sp, sp, #16
+; check-NEXT: .cfi_def_cfa_offset 16
+; check-NEXT: ldrh w8, [x0]
+; check-NEXT: movi.2d v1, #0x0000ff000000ff
+; check-NEXT: strh w8, [sp, #12]
+; check-NEXT: ldr s0, [sp, #12]
+; check-NEXT: ldrsb w8, [x0, #2]
+; check-NEXT: ushll.8h v0, v0, #0
+; check-NEXT: mov.h v0[1], v0[1]
+; check-NEXT: mov.h v0[2], w8
+; check-NEXT: ushll.4s v0, v0, #0
+; check-NEXT: and.16b v0, v0, v1
+; check-NEXT: add sp, sp, #16
+; check-NEXT: ret
;
; be-label: volatile_load_v3i8_to_4xi32:
; be: // %bb.0:
-; be-next: sub sp, sp, #16
-; be-next: .cfi_def_cfa_offset 16
-; be-next: ldrh w8, [x0]
-; be-next: movi v1.2d, #0x0000ff000000ff
-; be-next: strh w8, [sp, #12]
-; be-next: ldr s0, [sp, #12]
-; be-next: ldrsb w8, [x0, #2]
-; be-next: rev32 v0.8b, v0.8b
-; be-next: ushll v0.8h, v0.8b, #0
-; be-next: mov v0.h[1], v0.h[1]
-; be-next: mov v0.h[2], w8
-; be-next: ushll v0.4s, v0.4h, #0
-; be-next: and v0.16b, v0.16b, v1.16b
-; be-next: rev64 v0.4s, v0.4s
-; be-next: ext v0.16b, v0.16b, v0.16b, #8
-; be-next: add sp, sp, #16
-; be-next: ret
+; be-NEXT: sub sp, sp, #16
+; be-NEXT: .cfi_def_cfa_offset 16
+; be-NEXT: ldrh w8, [x0]
+; be-NEXT: movi v1.2d, #0x0000ff000000ff
+; be-NEXT: strh w8, [sp, #12]
+; be-NEXT: ldr s0, [sp, #12]
+; be-NEXT: ldrsb w8, [x0, #2]
+; be-NEXT: rev32 v0.8b, v0.8b
+; be-NEXT: ushll v0.8h, v0.8b, #0
+; be-NEXT: mov v0.h[1], v0.h[1]
+; be-NEXT: mov v0.h[2], w8
+; be-NEXT: ushll v0.4s, v0.4h, #0
+; be-NEXT: and v0.16b, v0.16b, v1.16b
+; be-NEXT: rev64 v0.4s, v0.4s
+; be-NEXT: ext v0.16b, v0.16b, v0.16b, #8
+; be-NEXT: add sp, sp, #16
+; be-NEXT: ret
; CHECK-LABEL: volatile_load_v3i8_to_4xi32:
; CHECK: ; %bb.0:
; CHECK-NEXT: sub sp, sp, #16
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_illegal_locs.mir b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_illegal_locs.mir
index d5fa1f1375ca0..cac500632433a 100644
--- a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_illegal_locs.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_illegal_locs.mir
@@ -70,7 +70,7 @@ body: |
;DBG_INSTR_REF !16, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(4, 0), debug-location !17
;;; Test non-def operand
;; check: DBG_INSTR_REF {{.+}}, dbg-instr-ref(4, 0)
- ;; check-next: DBG_VALUE_LIST {{.+}}, $noreg
+ ;; check-NEXT: DBG_VALUE_LIST {{.+}}, $noreg
$noreg = MOV32ri 1, debug-instr-number 5, debug-location !17
DBG_INSTR_REF !16, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(5, 0), debug-location !17
diff --git a/llvm/test/Transforms/LoopUnroll/peel-loop2.ll b/llvm/test/Transforms/LoopUnroll/peel-loop2.ll
index a732984d697ad..754e0d32cc1d0 100644
--- a/llvm/test/Transforms/LoopUnroll/peel-loop2.ll
+++ b/llvm/test/Transforms/LoopUnroll/peel-loop2.ll
@@ -32,7 +32,7 @@ for.end:
ret void
}
-; CHECK_LABEL: @funca
+; CHECK-LABEL: @funca
; Peeled iteration
; CHECK: %[[REG1:[0-9]+]] = load i8, ptr @Comma
>From ebd2c6d5d9841a0a8d03a88336d712cc1631cc27 Mon Sep 17 00:00:00 2001
From: klensy <klensy at users.noreply.github.com>
Date: Sat, 11 May 2024 17:20:45 +0300
Subject: [PATCH 3/6] fix typo: DEfAULT - DEFAULT
Looks like typo, but looks sus, maybe intended?
---
...target_parallel_generic_loop_codegen-1.cpp | 4438 ++++++++---------
1 file changed, 2219 insertions(+), 2219 deletions(-)
diff --git a/clang/test/OpenMP/target_parallel_generic_loop_codegen-1.cpp b/clang/test/OpenMP/target_parallel_generic_loop_codegen-1.cpp
index bbefab195b9ae..41fe58a66dc23 100644
--- a/clang/test/OpenMP/target_parallel_generic_loop_codegen-1.cpp
+++ b/clang/test/OpenMP/target_parallel_generic_loop_codegen-1.cpp
@@ -41,7 +41,7 @@
// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix OMP-DEFAULT
// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
// RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix OMP-DEFAULT
-// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix OMP-DEfAULT
+// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix OMP-DEFAULT
// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
// RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix OMP-DEFAULT
@@ -3982,2237 +3982,2237 @@ int bar(int a){
//
//
//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init
-// OMP-DEfAULT-SAME: () #[[ATTR0:[0-9]+]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: call void @_ZN2SAC1Ev(ptr noundef nonnull align 4 dereferenceable(16) @_ZL2a1)
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SAD1Ev, ptr @_ZL2a1, ptr @__dso_handle) #[[ATTR2:[0-9]+]]
-// OMP-DEfAULT-NEXT: ret void
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init
+// OMP-DEFAULT-SAME: () #[[ATTR0:[0-9]+]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: call void @_ZN2SAC1Ev(ptr noundef nonnull align 4 dereferenceable(16) @_ZL2a1)
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SAD1Ev, ptr @_ZL2a1, ptr @__dso_handle) #[[ATTR2:[0-9]+]]
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SAC1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: call void @_ZN2SAC2Ev(ptr noundef nonnull align 4 dereferenceable(16) [[THIS1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SAD1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: call void @_ZN2SAD2Ev(ptr noundef nonnull align 4 dereferenceable(16) [[THIS1]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SAC2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], 2
+// OMP-DEFAULT-NEXT: store i32 [[ADD]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SAD2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], 3
+// OMP-DEFAULT-NEXT: store i32 [[ADD]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT: ret void
//
//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SAC1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: call void @_ZN2SAC2Ev(ptr noundef nonnull align 4 dereferenceable(16) [[THIS1]])
-// OMP-DEfAULT-NEXT: ret void
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
+// OMP-DEFAULT-SAME: () #[[ATTR0]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: call void @_ZN2SAC1Ev(ptr noundef nonnull align 4 dereferenceable(16) @a2)
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SAD1Ev, ptr @a2, ptr @__dso_handle) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: ret void
//
//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SAD1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: call void @_ZN2SAD2Ev(ptr noundef nonnull align 4 dereferenceable(16) [[THIS1]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: ret void
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
+// OMP-DEFAULT-SAME: () #[[ATTR0]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: call void @_ZN2SBC1Ev(ptr noundef nonnull align 4 dereferenceable(32) @b1)
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SBD1Ev, ptr @b1, ptr @__dso_handle) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: ret void
+//
//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SBC1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: call void @_ZN2SBC2Ev(ptr noundef nonnull align 4 dereferenceable(32) [[THIS1]])
+// OMP-DEFAULT-NEXT: ret void
//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SAC2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], 2
-// OMP-DEfAULT-NEXT: store i32 [[ADD]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT: ret void
//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SBD1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: call void @_ZN2SBD2Ev(ptr noundef nonnull align 4 dereferenceable(32) [[THIS1]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: ret void
//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SAD2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], 3
-// OMP-DEfAULT-NEXT: store i32 [[ADD]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT: ret void
//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SBC2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], 5
+// OMP-DEFAULT-NEXT: store i32 [[ADD]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT: ret void
//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
-// OMP-DEfAULT-SAME: () #[[ATTR0]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: call void @_ZN2SAC1Ev(ptr noundef nonnull align 4 dereferenceable(16) @a2)
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SAD1Ev, ptr @a2, ptr @__dso_handle) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: ret void
//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SBD2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], 6
+// OMP-DEFAULT-NEXT: store i32 [[ADD]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.3
+// OMP-DEFAULT-SAME: () #[[ATTR0]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: call void @_ZN2SBC1Ev(ptr noundef nonnull align 4 dereferenceable(32) @b2)
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SBD1Ev, ptr @b2, ptr @__dso_handle) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.4
+// OMP-DEFAULT-SAME: () #[[ATTR0]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: call void @_ZN2SCC1Ev(ptr noundef nonnull align 4 dereferenceable(64) @_ZL2c1)
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SCD1Ev, ptr @_ZL2c1, ptr @__dso_handle) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SCC1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: call void @_ZN2SCC2Ev(ptr noundef nonnull align 4 dereferenceable(64) [[THIS1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SCD1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: call void @_ZN2SCD2Ev(ptr noundef nonnull align 4 dereferenceable(64) [[THIS1]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SCC2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP2]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP5]], align 4
+// OMP-DEFAULT-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP6]], align 4
+// OMP-DEFAULT-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 3, ptr [[TMP9]], align 4
+// OMP-DEFAULT-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
+// OMP-DEFAULT-NEXT: store i32 1, ptr [[TMP10]], align 4
+// OMP-DEFAULT-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
+// OMP-DEFAULT-NEXT: store ptr [[TMP7]], ptr [[TMP11]], align 4
+// OMP-DEFAULT-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
+// OMP-DEFAULT-NEXT: store ptr [[TMP8]], ptr [[TMP12]], align 4
+// OMP-DEFAULT-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
+// OMP-DEFAULT-NEXT: store ptr @.offload_sizes, ptr [[TMP13]], align 4
+// OMP-DEFAULT-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
+// OMP-DEFAULT-NEXT: store ptr @.offload_maptypes, ptr [[TMP14]], align 4
+// OMP-DEFAULT-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP15]], align 4
+// OMP-DEFAULT-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP16]], align 4
+// OMP-DEFAULT-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
+// OMP-DEFAULT-NEXT: store i64 0, ptr [[TMP17]], align 8
+// OMP-DEFAULT-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
+// OMP-DEFAULT-NEXT: store i64 0, ptr [[TMP18]], align 8
+// OMP-DEFAULT-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
+// OMP-DEFAULT-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
+// OMP-DEFAULT-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
+// OMP-DEFAULT-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
+// OMP-DEFAULT-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[TMP21]], align 4
+// OMP-DEFAULT-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148.region_id, ptr [[KERNEL_ARGS]])
+// OMP-DEFAULT-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
+// OMP-DEFAULT-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
+// OMP-DEFAULT: omp_offload.failed:
+// OMP-DEFAULT-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148(i32 [[TMP3]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: br label [[OMP_OFFLOAD_CONT]]
+// OMP-DEFAULT: omp_offload.cont:
+// OMP-DEFAULT-NEXT: [[TMP24:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP25:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP24]], ptr [[TMP25]], align 4
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148
+// OMP-DEFAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3:[0-9]+]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148.omp_outlined, i32 [[TMP1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148.omp_outlined
+// OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[TMP:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[I:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
+// OMP-DEFAULT: cond.true:
+// OMP-DEFAULT-NEXT: br label [[COND_END:%.*]]
+// OMP-DEFAULT: cond.false:
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: br label [[COND_END]]
+// OMP-DEFAULT: cond.end:
+// OMP-DEFAULT-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
+// OMP-DEFAULT-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
+// OMP-DEFAULT: omp.inner.for.cond:
+// OMP-DEFAULT-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
+// OMP-DEFAULT-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
+// OMP-DEFAULT: omp.inner.for.body:
+// OMP-DEFAULT-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
+// OMP-DEFAULT-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// OMP-DEFAULT-NEXT: store i32 [[ADD]], ptr [[I]], align 4
+// OMP-DEFAULT-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 8
+// OMP-DEFAULT-NEXT: store i32 [[ADD2]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
+// OMP-DEFAULT: omp.body.continue:
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
+// OMP-DEFAULT: omp.inner.for.inc:
+// OMP-DEFAULT-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
+// OMP-DEFAULT-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_COND]]
+// OMP-DEFAULT: omp.inner.for.end:
+// OMP-DEFAULT-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
+// OMP-DEFAULT: omp.loop.exit:
+// OMP-DEFAULT-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SCD2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT: store i32 [[ADD]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT: ret void
//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
-// OMP-DEfAULT-SAME: () #[[ATTR0]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: call void @_ZN2SBC1Ev(ptr noundef nonnull align 4 dereferenceable(32) @b1)
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SBD1Ev, ptr @b1, ptr @__dso_handle) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: ret void
//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SBC1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: call void @_ZN2SBC2Ev(ptr noundef nonnull align 4 dereferenceable(32) [[THIS1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SBD1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: call void @_ZN2SBD2Ev(ptr noundef nonnull align 4 dereferenceable(32) [[THIS1]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SBC2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], 5
-// OMP-DEfAULT-NEXT: store i32 [[ADD]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SBD2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], 6
-// OMP-DEfAULT-NEXT: store i32 [[ADD]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.3
-// OMP-DEfAULT-SAME: () #[[ATTR0]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: call void @_ZN2SBC1Ev(ptr noundef nonnull align 4 dereferenceable(32) @b2)
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SBD1Ev, ptr @b2, ptr @__dso_handle) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.4
-// OMP-DEfAULT-SAME: () #[[ATTR0]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: call void @_ZN2SCC1Ev(ptr noundef nonnull align 4 dereferenceable(64) @_ZL2c1)
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SCD1Ev, ptr @_ZL2c1, ptr @__dso_handle) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SCC1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: call void @_ZN2SCC2Ev(ptr noundef nonnull align 4 dereferenceable(64) [[THIS1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SCD1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: call void @_ZN2SCD2Ev(ptr noundef nonnull align 4 dereferenceable(64) [[THIS1]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SCC2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP2]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP5]], align 4
-// OMP-DEfAULT-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP6]], align 4
-// OMP-DEfAULT-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 3, ptr [[TMP9]], align 4
-// OMP-DEfAULT-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
-// OMP-DEfAULT-NEXT: store i32 1, ptr [[TMP10]], align 4
-// OMP-DEfAULT-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
-// OMP-DEfAULT-NEXT: store ptr [[TMP7]], ptr [[TMP11]], align 4
-// OMP-DEfAULT-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
-// OMP-DEfAULT-NEXT: store ptr [[TMP8]], ptr [[TMP12]], align 4
-// OMP-DEfAULT-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
-// OMP-DEfAULT-NEXT: store ptr @.offload_sizes, ptr [[TMP13]], align 4
-// OMP-DEfAULT-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
-// OMP-DEfAULT-NEXT: store ptr @.offload_maptypes, ptr [[TMP14]], align 4
-// OMP-DEfAULT-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP15]], align 4
-// OMP-DEfAULT-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP16]], align 4
-// OMP-DEfAULT-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
-// OMP-DEfAULT-NEXT: store i64 0, ptr [[TMP17]], align 8
-// OMP-DEfAULT-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
-// OMP-DEfAULT-NEXT: store i64 0, ptr [[TMP18]], align 8
-// OMP-DEfAULT-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
-// OMP-DEfAULT-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
-// OMP-DEfAULT-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
-// OMP-DEfAULT-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
-// OMP-DEfAULT-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[TMP21]], align 4
-// OMP-DEfAULT-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148.region_id, ptr [[KERNEL_ARGS]])
-// OMP-DEfAULT-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
-// OMP-DEfAULT-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
-// OMP-DEfAULT: omp_offload.failed:
-// OMP-DEfAULT-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148(i32 [[TMP3]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: br label [[OMP_OFFLOAD_CONT]]
-// OMP-DEfAULT: omp_offload.cont:
-// OMP-DEfAULT-NEXT: [[TMP24:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP25:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP24]], ptr [[TMP25]], align 4
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148
-// OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3:[0-9]+]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148.omp_outlined, i32 [[TMP1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148.omp_outlined
-// OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[I:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// OMP-DEfAULT: cond.true:
-// OMP-DEfAULT-NEXT: br label [[COND_END:%.*]]
-// OMP-DEfAULT: cond.false:
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: br label [[COND_END]]
-// OMP-DEfAULT: cond.end:
-// OMP-DEfAULT-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
-// OMP-DEfAULT-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// OMP-DEfAULT: omp.inner.for.cond:
-// OMP-DEfAULT-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
-// OMP-DEfAULT-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// OMP-DEfAULT: omp.inner.for.body:
-// OMP-DEfAULT-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
-// OMP-DEfAULT-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// OMP-DEfAULT-NEXT: store i32 [[ADD]], ptr [[I]], align 4
-// OMP-DEfAULT-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 8
-// OMP-DEfAULT-NEXT: store i32 [[ADD2]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// OMP-DEfAULT: omp.body.continue:
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// OMP-DEfAULT: omp.inner.for.inc:
-// OMP-DEfAULT-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
-// OMP-DEfAULT-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_COND]]
-// OMP-DEfAULT: omp.inner.for.end:
-// OMP-DEfAULT-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// OMP-DEfAULT: omp.loop.exit:
-// OMP-DEfAULT-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SCD2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT: store i32 [[ADD]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.5
-// OMP-DEfAULT-SAME: () #[[ATTR0]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: call void @_ZN2SDC1Ev(ptr noundef nonnull align 4 dereferenceable(128) @d1)
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SDD1Ev, ptr @d1, ptr @__dso_handle) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SDC1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: call void @_ZN2SDC2Ev(ptr noundef nonnull align 4 dereferenceable(128) [[THIS1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SDD1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: call void @_ZN2SDD2Ev(ptr noundef nonnull align 4 dereferenceable(128) [[THIS1]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SDC2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], 11
-// OMP-DEfAULT-NEXT: store i32 [[ADD]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SDD2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP2]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP5]], align 4
-// OMP-DEfAULT-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP6]], align 4
-// OMP-DEfAULT-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 3, ptr [[TMP9]], align 4
-// OMP-DEfAULT-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
-// OMP-DEfAULT-NEXT: store i32 1, ptr [[TMP10]], align 4
-// OMP-DEfAULT-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
-// OMP-DEfAULT-NEXT: store ptr [[TMP7]], ptr [[TMP11]], align 4
-// OMP-DEfAULT-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
-// OMP-DEfAULT-NEXT: store ptr [[TMP8]], ptr [[TMP12]], align 4
-// OMP-DEfAULT-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
-// OMP-DEfAULT-NEXT: store ptr @.offload_sizes.6, ptr [[TMP13]], align 4
-// OMP-DEfAULT-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
-// OMP-DEfAULT-NEXT: store ptr @.offload_maptypes.7, ptr [[TMP14]], align 4
-// OMP-DEfAULT-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP15]], align 4
-// OMP-DEfAULT-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP16]], align 4
-// OMP-DEfAULT-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
-// OMP-DEfAULT-NEXT: store i64 0, ptr [[TMP17]], align 8
-// OMP-DEfAULT-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
-// OMP-DEfAULT-NEXT: store i64 0, ptr [[TMP18]], align 8
-// OMP-DEfAULT-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
-// OMP-DEfAULT-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
-// OMP-DEfAULT-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
-// OMP-DEfAULT-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
-// OMP-DEfAULT-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[TMP21]], align 4
-// OMP-DEfAULT-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174.region_id, ptr [[KERNEL_ARGS]])
-// OMP-DEfAULT-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
-// OMP-DEfAULT-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
-// OMP-DEfAULT: omp_offload.failed:
-// OMP-DEfAULT-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174(i32 [[TMP3]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: br label [[OMP_OFFLOAD_CONT]]
-// OMP-DEfAULT: omp_offload.cont:
-// OMP-DEfAULT-NEXT: [[TMP24:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP25:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP24]], ptr [[TMP25]], align 4
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174
-// OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174.omp_outlined, i32 [[TMP1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174.omp_outlined
-// OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[I:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// OMP-DEfAULT: cond.true:
-// OMP-DEfAULT-NEXT: br label [[COND_END:%.*]]
-// OMP-DEfAULT: cond.false:
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: br label [[COND_END]]
-// OMP-DEfAULT: cond.end:
-// OMP-DEfAULT-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
-// OMP-DEfAULT-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// OMP-DEfAULT: omp.inner.for.cond:
-// OMP-DEfAULT-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
-// OMP-DEfAULT-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// OMP-DEfAULT: omp.inner.for.body:
-// OMP-DEfAULT-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
-// OMP-DEfAULT-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// OMP-DEfAULT-NEXT: store i32 [[ADD]], ptr [[I]], align 4
-// OMP-DEfAULT-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 12
-// OMP-DEfAULT-NEXT: store i32 [[ADD2]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// OMP-DEfAULT: omp.body.continue:
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// OMP-DEfAULT: omp.inner.for.inc:
-// OMP-DEfAULT-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
-// OMP-DEfAULT-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_COND]]
-// OMP-DEfAULT: omp.inner.for.end:
-// OMP-DEfAULT-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// OMP-DEfAULT: omp.loop.exit:
-// OMP-DEfAULT-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.8
-// OMP-DEfAULT-SAME: () #[[ATTR0]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: call void @_ZN2SEC1Ev(ptr noundef nonnull align 4 dereferenceable(256) @e1)
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SED1Ev, ptr @e1, ptr @__dso_handle) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SEC1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: call void @_ZN2SEC2Ev(ptr noundef nonnull align 4 dereferenceable(256) [[THIS1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SED1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: call void @_ZN2SED2Ev(ptr noundef nonnull align 4 dereferenceable(256) [[THIS1]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SEC2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP2]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP5]], align 4
-// OMP-DEfAULT-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP6]], align 4
-// OMP-DEfAULT-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 3, ptr [[TMP9]], align 4
-// OMP-DEfAULT-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
-// OMP-DEfAULT-NEXT: store i32 1, ptr [[TMP10]], align 4
-// OMP-DEfAULT-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
-// OMP-DEfAULT-NEXT: store ptr [[TMP7]], ptr [[TMP11]], align 4
-// OMP-DEfAULT-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
-// OMP-DEfAULT-NEXT: store ptr [[TMP8]], ptr [[TMP12]], align 4
-// OMP-DEfAULT-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
-// OMP-DEfAULT-NEXT: store ptr @.offload_sizes.9, ptr [[TMP13]], align 4
-// OMP-DEfAULT-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
-// OMP-DEfAULT-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP14]], align 4
-// OMP-DEfAULT-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP15]], align 4
-// OMP-DEfAULT-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP16]], align 4
-// OMP-DEfAULT-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
-// OMP-DEfAULT-NEXT: store i64 0, ptr [[TMP17]], align 8
-// OMP-DEfAULT-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
-// OMP-DEfAULT-NEXT: store i64 0, ptr [[TMP18]], align 8
-// OMP-DEfAULT-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
-// OMP-DEfAULT-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
-// OMP-DEfAULT-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
-// OMP-DEfAULT-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
-// OMP-DEfAULT-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[TMP21]], align 4
-// OMP-DEfAULT-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192.region_id, ptr [[KERNEL_ARGS]])
-// OMP-DEfAULT-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
-// OMP-DEfAULT-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
-// OMP-DEfAULT: omp_offload.failed:
-// OMP-DEfAULT-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192(i32 [[TMP3]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: br label [[OMP_OFFLOAD_CONT]]
-// OMP-DEfAULT: omp_offload.cont:
-// OMP-DEfAULT-NEXT: [[TMP24:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP25:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP24]], ptr [[TMP25]], align 4
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192
-// OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192.omp_outlined, i32 [[TMP1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192.omp_outlined
-// OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[I:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// OMP-DEfAULT: cond.true:
-// OMP-DEfAULT-NEXT: br label [[COND_END:%.*]]
-// OMP-DEfAULT: cond.false:
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: br label [[COND_END]]
-// OMP-DEfAULT: cond.end:
-// OMP-DEfAULT-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
-// OMP-DEfAULT-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// OMP-DEfAULT: omp.inner.for.cond:
-// OMP-DEfAULT-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
-// OMP-DEfAULT-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// OMP-DEfAULT: omp.inner.for.body:
-// OMP-DEfAULT-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
-// OMP-DEfAULT-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// OMP-DEfAULT-NEXT: store i32 [[ADD]], ptr [[I]], align 4
-// OMP-DEfAULT-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 14
-// OMP-DEfAULT-NEXT: store i32 [[ADD2]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// OMP-DEfAULT: omp.body.continue:
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// OMP-DEfAULT: omp.inner.for.inc:
-// OMP-DEfAULT-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
-// OMP-DEfAULT-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_COND]]
-// OMP-DEfAULT: omp.inner.for.end:
-// OMP-DEfAULT-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// OMP-DEfAULT: omp.loop.exit:
-// OMP-DEfAULT-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SED2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP2]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP5]], align 4
-// OMP-DEfAULT-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP6]], align 4
-// OMP-DEfAULT-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 3, ptr [[TMP9]], align 4
-// OMP-DEfAULT-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
-// OMP-DEfAULT-NEXT: store i32 1, ptr [[TMP10]], align 4
-// OMP-DEfAULT-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
-// OMP-DEfAULT-NEXT: store ptr [[TMP7]], ptr [[TMP11]], align 4
-// OMP-DEfAULT-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
-// OMP-DEfAULT-NEXT: store ptr [[TMP8]], ptr [[TMP12]], align 4
-// OMP-DEfAULT-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
-// OMP-DEfAULT-NEXT: store ptr @.offload_sizes.11, ptr [[TMP13]], align 4
-// OMP-DEfAULT-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
-// OMP-DEfAULT-NEXT: store ptr @.offload_maptypes.12, ptr [[TMP14]], align 4
-// OMP-DEfAULT-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP15]], align 4
-// OMP-DEfAULT-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP16]], align 4
-// OMP-DEfAULT-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
-// OMP-DEfAULT-NEXT: store i64 0, ptr [[TMP17]], align 8
-// OMP-DEfAULT-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
-// OMP-DEfAULT-NEXT: store i64 0, ptr [[TMP18]], align 8
-// OMP-DEfAULT-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
-// OMP-DEfAULT-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
-// OMP-DEfAULT-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
-// OMP-DEfAULT-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
-// OMP-DEfAULT-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[TMP21]], align 4
-// OMP-DEfAULT-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199.region_id, ptr [[KERNEL_ARGS]])
-// OMP-DEfAULT-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
-// OMP-DEfAULT-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
-// OMP-DEfAULT: omp_offload.failed:
-// OMP-DEfAULT-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199(i32 [[TMP3]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: br label [[OMP_OFFLOAD_CONT]]
-// OMP-DEfAULT: omp_offload.cont:
-// OMP-DEfAULT-NEXT: [[TMP24:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP25:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP24]], ptr [[TMP25]], align 4
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199
-// OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199.omp_outlined, i32 [[TMP1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199.omp_outlined
-// OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[I:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// OMP-DEfAULT: cond.true:
-// OMP-DEfAULT-NEXT: br label [[COND_END:%.*]]
-// OMP-DEfAULT: cond.false:
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: br label [[COND_END]]
-// OMP-DEfAULT: cond.end:
-// OMP-DEfAULT-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
-// OMP-DEfAULT-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// OMP-DEfAULT: omp.inner.for.cond:
-// OMP-DEfAULT-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
-// OMP-DEfAULT-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// OMP-DEfAULT: omp.inner.for.body:
-// OMP-DEfAULT-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
-// OMP-DEfAULT-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// OMP-DEfAULT-NEXT: store i32 [[ADD]], ptr [[I]], align 4
-// OMP-DEfAULT-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 15
-// OMP-DEfAULT-NEXT: store i32 [[ADD2]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// OMP-DEfAULT: omp.body.continue:
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// OMP-DEfAULT: omp.inner.for.inc:
-// OMP-DEfAULT-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
-// OMP-DEfAULT-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_COND]]
-// OMP-DEfAULT: omp.inner.for.end:
-// OMP-DEfAULT-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// OMP-DEfAULT: omp.loop.exit:
-// OMP-DEfAULT-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.13
-// OMP-DEfAULT-SAME: () #[[ATTR0]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: call void @_ZN2STILi100EEC1Ev(ptr noundef nonnull align 4 dereferenceable(912) @t1)
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2STILi100EED1Ev, ptr @t1, ptr @__dso_handle) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EEC1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: call void @_ZN2STILi100EEC2Ev(ptr noundef nonnull align 4 dereferenceable(912) [[THIS1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EED1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: call void @_ZN2STILi100EED2Ev(ptr noundef nonnull align 4 dereferenceable(912) [[THIS1]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EEC2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP2]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP5]], align 4
-// OMP-DEfAULT-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP6]], align 4
-// OMP-DEfAULT-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 3, ptr [[TMP9]], align 4
-// OMP-DEfAULT-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
-// OMP-DEfAULT-NEXT: store i32 1, ptr [[TMP10]], align 4
-// OMP-DEfAULT-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
-// OMP-DEfAULT-NEXT: store ptr [[TMP7]], ptr [[TMP11]], align 4
-// OMP-DEfAULT-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
-// OMP-DEfAULT-NEXT: store ptr [[TMP8]], ptr [[TMP12]], align 4
-// OMP-DEfAULT-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
-// OMP-DEfAULT-NEXT: store ptr @.offload_sizes.14, ptr [[TMP13]], align 4
-// OMP-DEfAULT-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
-// OMP-DEfAULT-NEXT: store ptr @.offload_maptypes.15, ptr [[TMP14]], align 4
-// OMP-DEfAULT-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP15]], align 4
-// OMP-DEfAULT-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP16]], align 4
-// OMP-DEfAULT-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
-// OMP-DEfAULT-NEXT: store i64 0, ptr [[TMP17]], align 8
-// OMP-DEfAULT-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
-// OMP-DEfAULT-NEXT: store i64 0, ptr [[TMP18]], align 8
-// OMP-DEfAULT-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
-// OMP-DEfAULT-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
-// OMP-DEfAULT-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
-// OMP-DEfAULT-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
-// OMP-DEfAULT-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[TMP21]], align 4
-// OMP-DEfAULT-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218.region_id, ptr [[KERNEL_ARGS]])
-// OMP-DEfAULT-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
-// OMP-DEfAULT-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
-// OMP-DEfAULT: omp_offload.failed:
-// OMP-DEfAULT-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218(i32 [[TMP3]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: br label [[OMP_OFFLOAD_CONT]]
-// OMP-DEfAULT: omp_offload.cont:
-// OMP-DEfAULT-NEXT: [[TMP24:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP25:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP24]], ptr [[TMP25]], align 4
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218
-// OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218.omp_outlined, i32 [[TMP1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218.omp_outlined
-// OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[I:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// OMP-DEfAULT: cond.true:
-// OMP-DEfAULT-NEXT: br label [[COND_END:%.*]]
-// OMP-DEfAULT: cond.false:
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: br label [[COND_END]]
-// OMP-DEfAULT: cond.end:
-// OMP-DEfAULT-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
-// OMP-DEfAULT-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// OMP-DEfAULT: omp.inner.for.cond:
-// OMP-DEfAULT-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
-// OMP-DEfAULT-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// OMP-DEfAULT: omp.inner.for.body:
-// OMP-DEfAULT-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
-// OMP-DEfAULT-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// OMP-DEfAULT-NEXT: store i32 [[ADD]], ptr [[I]], align 4
-// OMP-DEfAULT-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 117
-// OMP-DEfAULT-NEXT: store i32 [[ADD2]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// OMP-DEfAULT: omp.body.continue:
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// OMP-DEfAULT: omp.inner.for.inc:
-// OMP-DEfAULT-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
-// OMP-DEfAULT-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_COND]]
-// OMP-DEfAULT: omp.inner.for.end:
-// OMP-DEfAULT-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// OMP-DEfAULT: omp.loop.exit:
-// OMP-DEfAULT-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EED2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP2]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP5]], align 4
-// OMP-DEfAULT-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP6]], align 4
-// OMP-DEfAULT-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 3, ptr [[TMP9]], align 4
-// OMP-DEfAULT-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
-// OMP-DEfAULT-NEXT: store i32 1, ptr [[TMP10]], align 4
-// OMP-DEfAULT-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
-// OMP-DEfAULT-NEXT: store ptr [[TMP7]], ptr [[TMP11]], align 4
-// OMP-DEfAULT-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
-// OMP-DEfAULT-NEXT: store ptr [[TMP8]], ptr [[TMP12]], align 4
-// OMP-DEfAULT-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
-// OMP-DEfAULT-NEXT: store ptr @.offload_sizes.16, ptr [[TMP13]], align 4
-// OMP-DEfAULT-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
-// OMP-DEfAULT-NEXT: store ptr @.offload_maptypes.17, ptr [[TMP14]], align 4
-// OMP-DEfAULT-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP15]], align 4
-// OMP-DEfAULT-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP16]], align 4
-// OMP-DEfAULT-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
-// OMP-DEfAULT-NEXT: store i64 0, ptr [[TMP17]], align 8
-// OMP-DEfAULT-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
-// OMP-DEfAULT-NEXT: store i64 0, ptr [[TMP18]], align 8
-// OMP-DEfAULT-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
-// OMP-DEfAULT-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
-// OMP-DEfAULT-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
-// OMP-DEfAULT-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
-// OMP-DEfAULT-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[TMP21]], align 4
-// OMP-DEfAULT-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225.region_id, ptr [[KERNEL_ARGS]])
-// OMP-DEfAULT-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
-// OMP-DEfAULT-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
-// OMP-DEfAULT: omp_offload.failed:
-// OMP-DEfAULT-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225(i32 [[TMP3]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: br label [[OMP_OFFLOAD_CONT]]
-// OMP-DEfAULT: omp_offload.cont:
-// OMP-DEfAULT-NEXT: [[TMP24:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP25:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP24]], ptr [[TMP25]], align 4
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225
-// OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225.omp_outlined, i32 [[TMP1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225.omp_outlined
-// OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[I:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// OMP-DEfAULT: cond.true:
-// OMP-DEfAULT-NEXT: br label [[COND_END:%.*]]
-// OMP-DEfAULT: cond.false:
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: br label [[COND_END]]
-// OMP-DEfAULT: cond.end:
-// OMP-DEfAULT-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
-// OMP-DEfAULT-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// OMP-DEfAULT: omp.inner.for.cond:
-// OMP-DEfAULT-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
-// OMP-DEfAULT-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// OMP-DEfAULT: omp.inner.for.body:
-// OMP-DEfAULT-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
-// OMP-DEfAULT-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// OMP-DEfAULT-NEXT: store i32 [[ADD]], ptr [[I]], align 4
-// OMP-DEfAULT-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 118
-// OMP-DEfAULT-NEXT: store i32 [[ADD2]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// OMP-DEfAULT: omp.body.continue:
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// OMP-DEfAULT: omp.inner.for.inc:
-// OMP-DEfAULT-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
-// OMP-DEfAULT-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_COND]]
-// OMP-DEfAULT: omp.inner.for.end:
-// OMP-DEfAULT-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// OMP-DEfAULT: omp.loop.exit:
-// OMP-DEfAULT-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.18
-// OMP-DEfAULT-SAME: () #[[ATTR0]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: call void @_ZN2STILi1000EEC1Ev(ptr noundef nonnull align 4 dereferenceable(4512) @t2)
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2STILi1000EED1Ev, ptr @t2, ptr @__dso_handle) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EEC1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: call void @_ZN2STILi1000EEC2Ev(ptr noundef nonnull align 4 dereferenceable(4512) [[THIS1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EED1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: call void @_ZN2STILi1000EED2Ev(ptr noundef nonnull align 4 dereferenceable(4512) [[THIS1]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EEC2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP2]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP5]], align 4
-// OMP-DEfAULT-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP6]], align 4
-// OMP-DEfAULT-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 3, ptr [[TMP9]], align 4
-// OMP-DEfAULT-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
-// OMP-DEfAULT-NEXT: store i32 1, ptr [[TMP10]], align 4
-// OMP-DEfAULT-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
-// OMP-DEfAULT-NEXT: store ptr [[TMP7]], ptr [[TMP11]], align 4
-// OMP-DEfAULT-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
-// OMP-DEfAULT-NEXT: store ptr [[TMP8]], ptr [[TMP12]], align 4
-// OMP-DEfAULT-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
-// OMP-DEfAULT-NEXT: store ptr @.offload_sizes.19, ptr [[TMP13]], align 4
-// OMP-DEfAULT-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
-// OMP-DEfAULT-NEXT: store ptr @.offload_maptypes.20, ptr [[TMP14]], align 4
-// OMP-DEfAULT-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP15]], align 4
-// OMP-DEfAULT-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP16]], align 4
-// OMP-DEfAULT-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
-// OMP-DEfAULT-NEXT: store i64 0, ptr [[TMP17]], align 8
-// OMP-DEfAULT-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
-// OMP-DEfAULT-NEXT: store i64 0, ptr [[TMP18]], align 8
-// OMP-DEfAULT-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
-// OMP-DEfAULT-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
-// OMP-DEfAULT-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
-// OMP-DEfAULT-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
-// OMP-DEfAULT-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[TMP21]], align 4
-// OMP-DEfAULT-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218.region_id, ptr [[KERNEL_ARGS]])
-// OMP-DEfAULT-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
-// OMP-DEfAULT-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
-// OMP-DEfAULT: omp_offload.failed:
-// OMP-DEfAULT-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218(i32 [[TMP3]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: br label [[OMP_OFFLOAD_CONT]]
-// OMP-DEfAULT: omp_offload.cont:
-// OMP-DEfAULT-NEXT: [[TMP24:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP25:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP24]], ptr [[TMP25]], align 4
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218
-// OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218.omp_outlined, i32 [[TMP1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218.omp_outlined
-// OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[I:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// OMP-DEfAULT: cond.true:
-// OMP-DEfAULT-NEXT: br label [[COND_END:%.*]]
-// OMP-DEfAULT: cond.false:
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: br label [[COND_END]]
-// OMP-DEfAULT: cond.end:
-// OMP-DEfAULT-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
-// OMP-DEfAULT-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// OMP-DEfAULT: omp.inner.for.cond:
-// OMP-DEfAULT-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
-// OMP-DEfAULT-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// OMP-DEfAULT: omp.inner.for.body:
-// OMP-DEfAULT-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
-// OMP-DEfAULT-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// OMP-DEfAULT-NEXT: store i32 [[ADD]], ptr [[I]], align 4
-// OMP-DEfAULT-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1017
-// OMP-DEfAULT-NEXT: store i32 [[ADD2]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// OMP-DEfAULT: omp.body.continue:
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// OMP-DEfAULT: omp.inner.for.inc:
-// OMP-DEfAULT-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
-// OMP-DEfAULT-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_COND]]
-// OMP-DEfAULT: omp.inner.for.end:
-// OMP-DEfAULT-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// OMP-DEfAULT: omp.loop.exit:
-// OMP-DEfAULT-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EED2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP2]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP5]], align 4
-// OMP-DEfAULT-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP6]], align 4
-// OMP-DEfAULT-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 3, ptr [[TMP9]], align 4
-// OMP-DEfAULT-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
-// OMP-DEfAULT-NEXT: store i32 1, ptr [[TMP10]], align 4
-// OMP-DEfAULT-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
-// OMP-DEfAULT-NEXT: store ptr [[TMP7]], ptr [[TMP11]], align 4
-// OMP-DEfAULT-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
-// OMP-DEfAULT-NEXT: store ptr [[TMP8]], ptr [[TMP12]], align 4
-// OMP-DEfAULT-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
-// OMP-DEfAULT-NEXT: store ptr @.offload_sizes.21, ptr [[TMP13]], align 4
-// OMP-DEfAULT-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
-// OMP-DEfAULT-NEXT: store ptr @.offload_maptypes.22, ptr [[TMP14]], align 4
-// OMP-DEfAULT-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP15]], align 4
-// OMP-DEfAULT-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP16]], align 4
-// OMP-DEfAULT-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
-// OMP-DEfAULT-NEXT: store i64 0, ptr [[TMP17]], align 8
-// OMP-DEfAULT-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
-// OMP-DEfAULT-NEXT: store i64 0, ptr [[TMP18]], align 8
-// OMP-DEfAULT-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
-// OMP-DEfAULT-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
-// OMP-DEfAULT-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
-// OMP-DEfAULT-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
-// OMP-DEfAULT-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[TMP21]], align 4
-// OMP-DEfAULT-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225.region_id, ptr [[KERNEL_ARGS]])
-// OMP-DEfAULT-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
-// OMP-DEfAULT-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
-// OMP-DEfAULT: omp_offload.failed:
-// OMP-DEfAULT-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225(i32 [[TMP3]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: br label [[OMP_OFFLOAD_CONT]]
-// OMP-DEfAULT: omp_offload.cont:
-// OMP-DEfAULT-NEXT: [[TMP24:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP25:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP24]], ptr [[TMP25]], align 4
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225
-// OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225.omp_outlined, i32 [[TMP1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225.omp_outlined
-// OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[I:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// OMP-DEfAULT: cond.true:
-// OMP-DEfAULT-NEXT: br label [[COND_END:%.*]]
-// OMP-DEfAULT: cond.false:
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: br label [[COND_END]]
-// OMP-DEfAULT: cond.end:
-// OMP-DEfAULT-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
-// OMP-DEfAULT-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// OMP-DEfAULT: omp.inner.for.cond:
-// OMP-DEfAULT-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
-// OMP-DEfAULT-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// OMP-DEfAULT: omp.inner.for.body:
-// OMP-DEfAULT-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
-// OMP-DEfAULT-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// OMP-DEfAULT-NEXT: store i32 [[ADD]], ptr [[I]], align 4
-// OMP-DEfAULT-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1018
-// OMP-DEfAULT-NEXT: store i32 [[ADD2]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// OMP-DEfAULT: omp.body.continue:
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// OMP-DEfAULT: omp.inner.for.inc:
-// OMP-DEfAULT-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
-// OMP-DEfAULT-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_COND]]
-// OMP-DEfAULT: omp.inner.for.end:
-// OMP-DEfAULT-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// OMP-DEfAULT: omp.loop.exit:
-// OMP-DEfAULT-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_Z3bari
-// OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR1]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[R:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[R_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
-// OMP-DEfAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP0]], ptr [[R]], align 4
-// OMP-DEfAULT-NEXT: call void @_ZN2SA3fooEv(ptr noundef nonnull align 4 dereferenceable(16) @_ZL2a1)
-// OMP-DEfAULT-NEXT: call void @_ZN2SA3fooEv(ptr noundef nonnull align 4 dereferenceable(16) @a2)
-// OMP-DEfAULT-NEXT: call void @_ZN2SB3fooEv(ptr noundef nonnull align 4 dereferenceable(32) @b1)
-// OMP-DEfAULT-NEXT: call void @_ZN2SB3fooEv(ptr noundef nonnull align 4 dereferenceable(32) @b2)
-// OMP-DEfAULT-NEXT: call void @_ZN2SC3fooEv(ptr noundef nonnull align 4 dereferenceable(64) @_ZL2c1)
-// OMP-DEfAULT-NEXT: call void @_ZN2SD3fooEv(ptr noundef nonnull align 4 dereferenceable(128) @d1)
-// OMP-DEfAULT-NEXT: call void @_ZN2SE3fooEv(ptr noundef nonnull align 4 dereferenceable(256) @e1)
-// OMP-DEfAULT-NEXT: call void @_ZN2STILi100EE3fooEv(ptr noundef nonnull align 4 dereferenceable(912) @t1)
-// OMP-DEfAULT-NEXT: call void @_ZN2STILi1000EE3fooEv(ptr noundef nonnull align 4 dereferenceable(4512) @t2)
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[R]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP1]], ptr [[R_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[R_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 [[TMP2]], ptr [[TMP3]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 [[TMP2]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP5]], align 4
-// OMP-DEfAULT-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 3, ptr [[TMP8]], align 4
-// OMP-DEfAULT-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
-// OMP-DEfAULT-NEXT: store i32 1, ptr [[TMP9]], align 4
-// OMP-DEfAULT-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
-// OMP-DEfAULT-NEXT: store ptr [[TMP6]], ptr [[TMP10]], align 4
-// OMP-DEfAULT-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
-// OMP-DEfAULT-NEXT: store ptr [[TMP7]], ptr [[TMP11]], align 4
-// OMP-DEfAULT-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
-// OMP-DEfAULT-NEXT: store ptr @.offload_sizes.23, ptr [[TMP12]], align 4
-// OMP-DEfAULT-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
-// OMP-DEfAULT-NEXT: store ptr @.offload_maptypes.24, ptr [[TMP13]], align 4
-// OMP-DEfAULT-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP14]], align 4
-// OMP-DEfAULT-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP15]], align 4
-// OMP-DEfAULT-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
-// OMP-DEfAULT-NEXT: store i64 0, ptr [[TMP16]], align 8
-// OMP-DEfAULT-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
-// OMP-DEfAULT-NEXT: store i64 0, ptr [[TMP17]], align 8
-// OMP-DEfAULT-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
-// OMP-DEfAULT-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP18]], align 4
-// OMP-DEfAULT-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
-// OMP-DEfAULT-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP19]], align 4
-// OMP-DEfAULT-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[TMP20]], align 4
-// OMP-DEfAULT-NEXT: [[TMP21:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267.region_id, ptr [[KERNEL_ARGS]])
-// OMP-DEfAULT-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
-// OMP-DEfAULT-NEXT: br i1 [[TMP22]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
-// OMP-DEfAULT: omp_offload.failed:
-// OMP-DEfAULT-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267(i32 [[TMP2]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: br label [[OMP_OFFLOAD_CONT]]
-// OMP-DEfAULT: omp_offload.cont:
-// OMP-DEfAULT-NEXT: [[TMP23:%.*]] = load i32, ptr [[R]], align 4
-// OMP-DEfAULT-NEXT: [[TMP24:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: [[TMP25:%.*]] = load i32, ptr [[TMP24]], align 4
-// OMP-DEfAULT-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP25]]
-// OMP-DEfAULT-NEXT: ret i32 [[ADD]]
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SA3fooEv
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], 1
-// OMP-DEfAULT-NEXT: store i32 [[ADD]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SB3fooEv
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP2]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP5]], align 4
-// OMP-DEfAULT-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP6]], align 4
-// OMP-DEfAULT-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 3, ptr [[TMP9]], align 4
-// OMP-DEfAULT-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
-// OMP-DEfAULT-NEXT: store i32 1, ptr [[TMP10]], align 4
-// OMP-DEfAULT-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
-// OMP-DEfAULT-NEXT: store ptr [[TMP7]], ptr [[TMP11]], align 4
-// OMP-DEfAULT-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
-// OMP-DEfAULT-NEXT: store ptr [[TMP8]], ptr [[TMP12]], align 4
-// OMP-DEfAULT-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
-// OMP-DEfAULT-NEXT: store ptr @.offload_sizes.25, ptr [[TMP13]], align 4
-// OMP-DEfAULT-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
-// OMP-DEfAULT-NEXT: store ptr @.offload_maptypes.26, ptr [[TMP14]], align 4
-// OMP-DEfAULT-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP15]], align 4
-// OMP-DEfAULT-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP16]], align 4
-// OMP-DEfAULT-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
-// OMP-DEfAULT-NEXT: store i64 0, ptr [[TMP17]], align 8
-// OMP-DEfAULT-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
-// OMP-DEfAULT-NEXT: store i64 0, ptr [[TMP18]], align 8
-// OMP-DEfAULT-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
-// OMP-DEfAULT-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
-// OMP-DEfAULT-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
-// OMP-DEfAULT-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
-// OMP-DEfAULT-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[TMP21]], align 4
-// OMP-DEfAULT-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122.region_id, ptr [[KERNEL_ARGS]])
-// OMP-DEfAULT-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
-// OMP-DEfAULT-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
-// OMP-DEfAULT: omp_offload.failed:
-// OMP-DEfAULT-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122(i32 [[TMP3]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: br label [[OMP_OFFLOAD_CONT]]
-// OMP-DEfAULT: omp_offload.cont:
-// OMP-DEfAULT-NEXT: [[TMP24:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP25:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP24]], ptr [[TMP25]], align 4
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SC3fooEv
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], 7
-// OMP-DEfAULT-NEXT: store i32 [[ADD]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SD3fooEv
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], 10
-// OMP-DEfAULT-NEXT: store i32 [[ADD]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SE3fooEv
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP2]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185(i32 [[TMP3]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP5:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP4]], ptr [[TMP5]], align 4
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EE3fooEv
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP2]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP5]], align 4
-// OMP-DEfAULT-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP6]], align 4
-// OMP-DEfAULT-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 3, ptr [[TMP9]], align 4
-// OMP-DEfAULT-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
-// OMP-DEfAULT-NEXT: store i32 1, ptr [[TMP10]], align 4
-// OMP-DEfAULT-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
-// OMP-DEfAULT-NEXT: store ptr [[TMP7]], ptr [[TMP11]], align 4
-// OMP-DEfAULT-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
-// OMP-DEfAULT-NEXT: store ptr [[TMP8]], ptr [[TMP12]], align 4
-// OMP-DEfAULT-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
-// OMP-DEfAULT-NEXT: store ptr @.offload_sizes.27, ptr [[TMP13]], align 4
-// OMP-DEfAULT-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
-// OMP-DEfAULT-NEXT: store ptr @.offload_maptypes.28, ptr [[TMP14]], align 4
-// OMP-DEfAULT-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP15]], align 4
-// OMP-DEfAULT-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP16]], align 4
-// OMP-DEfAULT-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
-// OMP-DEfAULT-NEXT: store i64 0, ptr [[TMP17]], align 8
-// OMP-DEfAULT-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
-// OMP-DEfAULT-NEXT: store i64 0, ptr [[TMP18]], align 8
-// OMP-DEfAULT-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
-// OMP-DEfAULT-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
-// OMP-DEfAULT-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
-// OMP-DEfAULT-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
-// OMP-DEfAULT-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[TMP21]], align 4
-// OMP-DEfAULT-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211.region_id, ptr [[KERNEL_ARGS]])
-// OMP-DEfAULT-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
-// OMP-DEfAULT-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
-// OMP-DEfAULT: omp_offload.failed:
-// OMP-DEfAULT-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211(i32 [[TMP3]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: br label [[OMP_OFFLOAD_CONT]]
-// OMP-DEfAULT: omp_offload.cont:
-// OMP-DEfAULT-NEXT: [[TMP24:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP25:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP24]], ptr [[TMP25]], align 4
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EE3fooEv
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
-// OMP-DEfAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP2]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 [[TMP3]], ptr [[TMP5]], align 4
-// OMP-DEfAULT-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP6]], align 4
-// OMP-DEfAULT-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT: store i32 3, ptr [[TMP9]], align 4
-// OMP-DEfAULT-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
-// OMP-DEfAULT-NEXT: store i32 1, ptr [[TMP10]], align 4
-// OMP-DEfAULT-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
-// OMP-DEfAULT-NEXT: store ptr [[TMP7]], ptr [[TMP11]], align 4
-// OMP-DEfAULT-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
-// OMP-DEfAULT-NEXT: store ptr [[TMP8]], ptr [[TMP12]], align 4
-// OMP-DEfAULT-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
-// OMP-DEfAULT-NEXT: store ptr @.offload_sizes.29, ptr [[TMP13]], align 4
-// OMP-DEfAULT-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
-// OMP-DEfAULT-NEXT: store ptr @.offload_maptypes.30, ptr [[TMP14]], align 4
-// OMP-DEfAULT-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP15]], align 4
-// OMP-DEfAULT-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
-// OMP-DEfAULT-NEXT: store ptr null, ptr [[TMP16]], align 4
-// OMP-DEfAULT-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
-// OMP-DEfAULT-NEXT: store i64 0, ptr [[TMP17]], align 8
-// OMP-DEfAULT-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
-// OMP-DEfAULT-NEXT: store i64 0, ptr [[TMP18]], align 8
-// OMP-DEfAULT-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
-// OMP-DEfAULT-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
-// OMP-DEfAULT-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
-// OMP-DEfAULT-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
-// OMP-DEfAULT-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[TMP21]], align 4
-// OMP-DEfAULT-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211.region_id, ptr [[KERNEL_ARGS]])
-// OMP-DEfAULT-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
-// OMP-DEfAULT-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
-// OMP-DEfAULT: omp_offload.failed:
-// OMP-DEfAULT-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211(i32 [[TMP3]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT: br label [[OMP_OFFLOAD_CONT]]
-// OMP-DEfAULT: omp_offload.cont:
-// OMP-DEfAULT-NEXT: [[TMP24:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT: [[TMP25:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP24]], ptr [[TMP25]], align 4
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267
-// OMP-DEfAULT-SAME: (i32 noundef [[R:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[R_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[R_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store i32 [[R]], ptr [[R_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[R_ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP0]], ptr [[R_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[R_CASTED]], align 4
-// OMP-DEfAULT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267.omp_outlined, i32 [[TMP1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267.omp_outlined
-// OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[R:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[R_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[I:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[R]], ptr [[R_ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// OMP-DEfAULT: cond.true:
-// OMP-DEfAULT-NEXT: br label [[COND_END:%.*]]
-// OMP-DEfAULT: cond.false:
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: br label [[COND_END]]
-// OMP-DEfAULT: cond.end:
-// OMP-DEfAULT-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
-// OMP-DEfAULT-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// OMP-DEfAULT: omp.inner.for.cond:
-// OMP-DEfAULT-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
-// OMP-DEfAULT-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// OMP-DEfAULT: omp.inner.for.body:
-// OMP-DEfAULT-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
-// OMP-DEfAULT-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// OMP-DEfAULT-NEXT: store i32 [[ADD]], ptr [[I]], align 4
-// OMP-DEfAULT-NEXT: [[TMP8:%.*]] = load i32, ptr [[R_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1
-// OMP-DEfAULT-NEXT: store i32 [[INC]], ptr [[R_ADDR]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// OMP-DEfAULT: omp.body.continue:
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// OMP-DEfAULT: omp.inner.for.inc:
-// OMP-DEfAULT-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1
-// OMP-DEfAULT-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_COND]]
-// OMP-DEfAULT: omp.inner.for.end:
-// OMP-DEfAULT-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// OMP-DEfAULT: omp.loop.exit:
-// OMP-DEfAULT-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122
-// OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122.omp_outlined, i32 [[TMP1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122.omp_outlined
-// OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[I:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// OMP-DEfAULT: cond.true:
-// OMP-DEfAULT-NEXT: br label [[COND_END:%.*]]
-// OMP-DEfAULT: cond.false:
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: br label [[COND_END]]
-// OMP-DEfAULT: cond.end:
-// OMP-DEfAULT-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
-// OMP-DEfAULT-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// OMP-DEfAULT: omp.inner.for.cond:
-// OMP-DEfAULT-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
-// OMP-DEfAULT-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// OMP-DEfAULT: omp.inner.for.body:
-// OMP-DEfAULT-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
-// OMP-DEfAULT-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// OMP-DEfAULT-NEXT: store i32 [[ADD]], ptr [[I]], align 4
-// OMP-DEfAULT-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 4
-// OMP-DEfAULT-NEXT: store i32 [[ADD2]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// OMP-DEfAULT: omp.body.continue:
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// OMP-DEfAULT: omp.inner.for.inc:
-// OMP-DEfAULT-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
-// OMP-DEfAULT-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_COND]]
-// OMP-DEfAULT: omp.inner.for.end:
-// OMP-DEfAULT-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// OMP-DEfAULT: omp.loop.exit:
-// OMP-DEfAULT-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185
-// OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185.omp_outlined, i32 [[TMP1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185.omp_outlined
-// OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[I:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// OMP-DEfAULT: cond.true:
-// OMP-DEfAULT-NEXT: br label [[COND_END:%.*]]
-// OMP-DEfAULT: cond.false:
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: br label [[COND_END]]
-// OMP-DEfAULT: cond.end:
-// OMP-DEfAULT-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
-// OMP-DEfAULT-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// OMP-DEfAULT: omp.inner.for.cond:
-// OMP-DEfAULT-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
-// OMP-DEfAULT-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// OMP-DEfAULT: omp.inner.for.body:
-// OMP-DEfAULT-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
-// OMP-DEfAULT-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// OMP-DEfAULT-NEXT: store i32 [[ADD]], ptr [[I]], align 4
-// OMP-DEfAULT-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 13
-// OMP-DEfAULT-NEXT: store i32 [[ADD2]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// OMP-DEfAULT: omp.body.continue:
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// OMP-DEfAULT: omp.inner.for.inc:
-// OMP-DEfAULT-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
-// OMP-DEfAULT-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_COND]]
-// OMP-DEfAULT: omp.inner.for.end:
-// OMP-DEfAULT-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// OMP-DEfAULT: omp.loop.exit:
-// OMP-DEfAULT-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211
-// OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211.omp_outlined, i32 [[TMP1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211.omp_outlined
-// OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[I:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// OMP-DEfAULT: cond.true:
-// OMP-DEfAULT-NEXT: br label [[COND_END:%.*]]
-// OMP-DEfAULT: cond.false:
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: br label [[COND_END]]
-// OMP-DEfAULT: cond.end:
-// OMP-DEfAULT-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
-// OMP-DEfAULT-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// OMP-DEfAULT: omp.inner.for.cond:
-// OMP-DEfAULT-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
-// OMP-DEfAULT-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// OMP-DEfAULT: omp.inner.for.body:
-// OMP-DEfAULT-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
-// OMP-DEfAULT-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// OMP-DEfAULT-NEXT: store i32 [[ADD]], ptr [[I]], align 4
-// OMP-DEfAULT-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 116
-// OMP-DEfAULT-NEXT: store i32 [[ADD2]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// OMP-DEfAULT: omp.body.continue:
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// OMP-DEfAULT: omp.inner.for.inc:
-// OMP-DEfAULT-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
-// OMP-DEfAULT-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_COND]]
-// OMP-DEfAULT: omp.inner.for.end:
-// OMP-DEfAULT-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// OMP-DEfAULT: omp.loop.exit:
-// OMP-DEfAULT-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211
-// OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211.omp_outlined, i32 [[TMP1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211.omp_outlined
-// OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: [[I:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// OMP-DEfAULT-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-DEfAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-DEfAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// OMP-DEfAULT: cond.true:
-// OMP-DEfAULT-NEXT: br label [[COND_END:%.*]]
-// OMP-DEfAULT: cond.false:
-// OMP-DEfAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: br label [[COND_END]]
-// OMP-DEfAULT: cond.end:
-// OMP-DEfAULT-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
-// OMP-DEfAULT-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// OMP-DEfAULT: omp.inner.for.cond:
-// OMP-DEfAULT-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
-// OMP-DEfAULT-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// OMP-DEfAULT: omp.inner.for.body:
-// OMP-DEfAULT-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
-// OMP-DEfAULT-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// OMP-DEfAULT-NEXT: store i32 [[ADD]], ptr [[I]], align 4
-// OMP-DEfAULT-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1016
-// OMP-DEfAULT-NEXT: store i32 [[ADD2]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// OMP-DEfAULT: omp.body.continue:
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// OMP-DEfAULT: omp.inner.for.inc:
-// OMP-DEfAULT-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
-// OMP-DEfAULT-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT: br label [[OMP_INNER_FOR_COND]]
-// OMP-DEfAULT: omp.inner.for.end:
-// OMP-DEfAULT-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// OMP-DEfAULT: omp.loop.exit:
-// OMP-DEfAULT-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_GLOBAL__I_000500
-// OMP-DEfAULT-SAME: () #[[ATTR0]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: call void @__cxx_global_var_init()
-// OMP-DEfAULT-NEXT: call void @__cxx_global_var_init.2()
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_GLOBAL__I_000501
-// OMP-DEfAULT-SAME: () #[[ATTR0]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: call void @__cxx_global_var_init.3()
-// OMP-DEfAULT-NEXT: ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_parallel_generic_loop_codegen_1.cpp
-// OMP-DEfAULT-SAME: () #[[ATTR0]] {
-// OMP-DEfAULT-NEXT: entry:
-// OMP-DEfAULT-NEXT: call void @__cxx_global_var_init.1()
-// OMP-DEfAULT-NEXT: call void @__cxx_global_var_init.4()
-// OMP-DEfAULT-NEXT: call void @__cxx_global_var_init.5()
-// OMP-DEfAULT-NEXT: call void @__cxx_global_var_init.8()
-// OMP-DEfAULT-NEXT: call void @__cxx_global_var_init.13()
-// OMP-DEfAULT-NEXT: call void @__cxx_global_var_init.18()
-// OMP-DEfAULT-NEXT: ret void
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.5
+// OMP-DEFAULT-SAME: () #[[ATTR0]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: call void @_ZN2SDC1Ev(ptr noundef nonnull align 4 dereferenceable(128) @d1)
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SDD1Ev, ptr @d1, ptr @__dso_handle) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SDC1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: call void @_ZN2SDC2Ev(ptr noundef nonnull align 4 dereferenceable(128) [[THIS1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SDD1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: call void @_ZN2SDD2Ev(ptr noundef nonnull align 4 dereferenceable(128) [[THIS1]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SDC2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], 11
+// OMP-DEFAULT-NEXT: store i32 [[ADD]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SDD2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP2]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP5]], align 4
+// OMP-DEFAULT-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP6]], align 4
+// OMP-DEFAULT-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 3, ptr [[TMP9]], align 4
+// OMP-DEFAULT-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
+// OMP-DEFAULT-NEXT: store i32 1, ptr [[TMP10]], align 4
+// OMP-DEFAULT-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
+// OMP-DEFAULT-NEXT: store ptr [[TMP7]], ptr [[TMP11]], align 4
+// OMP-DEFAULT-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
+// OMP-DEFAULT-NEXT: store ptr [[TMP8]], ptr [[TMP12]], align 4
+// OMP-DEFAULT-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
+// OMP-DEFAULT-NEXT: store ptr @.offload_sizes.6, ptr [[TMP13]], align 4
+// OMP-DEFAULT-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
+// OMP-DEFAULT-NEXT: store ptr @.offload_maptypes.7, ptr [[TMP14]], align 4
+// OMP-DEFAULT-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP15]], align 4
+// OMP-DEFAULT-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP16]], align 4
+// OMP-DEFAULT-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
+// OMP-DEFAULT-NEXT: store i64 0, ptr [[TMP17]], align 8
+// OMP-DEFAULT-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
+// OMP-DEFAULT-NEXT: store i64 0, ptr [[TMP18]], align 8
+// OMP-DEFAULT-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
+// OMP-DEFAULT-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
+// OMP-DEFAULT-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
+// OMP-DEFAULT-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
+// OMP-DEFAULT-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[TMP21]], align 4
+// OMP-DEFAULT-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174.region_id, ptr [[KERNEL_ARGS]])
+// OMP-DEFAULT-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
+// OMP-DEFAULT-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
+// OMP-DEFAULT: omp_offload.failed:
+// OMP-DEFAULT-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174(i32 [[TMP3]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: br label [[OMP_OFFLOAD_CONT]]
+// OMP-DEFAULT: omp_offload.cont:
+// OMP-DEFAULT-NEXT: [[TMP24:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP25:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP24]], ptr [[TMP25]], align 4
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174
+// OMP-DEFAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174.omp_outlined, i32 [[TMP1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174.omp_outlined
+// OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[TMP:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[I:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
+// OMP-DEFAULT: cond.true:
+// OMP-DEFAULT-NEXT: br label [[COND_END:%.*]]
+// OMP-DEFAULT: cond.false:
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: br label [[COND_END]]
+// OMP-DEFAULT: cond.end:
+// OMP-DEFAULT-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
+// OMP-DEFAULT-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
+// OMP-DEFAULT: omp.inner.for.cond:
+// OMP-DEFAULT-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
+// OMP-DEFAULT-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
+// OMP-DEFAULT: omp.inner.for.body:
+// OMP-DEFAULT-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
+// OMP-DEFAULT-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// OMP-DEFAULT-NEXT: store i32 [[ADD]], ptr [[I]], align 4
+// OMP-DEFAULT-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 12
+// OMP-DEFAULT-NEXT: store i32 [[ADD2]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
+// OMP-DEFAULT: omp.body.continue:
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
+// OMP-DEFAULT: omp.inner.for.inc:
+// OMP-DEFAULT-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
+// OMP-DEFAULT-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_COND]]
+// OMP-DEFAULT: omp.inner.for.end:
+// OMP-DEFAULT-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
+// OMP-DEFAULT: omp.loop.exit:
+// OMP-DEFAULT-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.8
+// OMP-DEFAULT-SAME: () #[[ATTR0]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: call void @_ZN2SEC1Ev(ptr noundef nonnull align 4 dereferenceable(256) @e1)
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SED1Ev, ptr @e1, ptr @__dso_handle) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SEC1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: call void @_ZN2SEC2Ev(ptr noundef nonnull align 4 dereferenceable(256) [[THIS1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SED1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: call void @_ZN2SED2Ev(ptr noundef nonnull align 4 dereferenceable(256) [[THIS1]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SEC2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP2]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP5]], align 4
+// OMP-DEFAULT-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP6]], align 4
+// OMP-DEFAULT-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 3, ptr [[TMP9]], align 4
+// OMP-DEFAULT-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
+// OMP-DEFAULT-NEXT: store i32 1, ptr [[TMP10]], align 4
+// OMP-DEFAULT-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
+// OMP-DEFAULT-NEXT: store ptr [[TMP7]], ptr [[TMP11]], align 4
+// OMP-DEFAULT-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
+// OMP-DEFAULT-NEXT: store ptr [[TMP8]], ptr [[TMP12]], align 4
+// OMP-DEFAULT-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
+// OMP-DEFAULT-NEXT: store ptr @.offload_sizes.9, ptr [[TMP13]], align 4
+// OMP-DEFAULT-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
+// OMP-DEFAULT-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP14]], align 4
+// OMP-DEFAULT-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP15]], align 4
+// OMP-DEFAULT-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP16]], align 4
+// OMP-DEFAULT-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
+// OMP-DEFAULT-NEXT: store i64 0, ptr [[TMP17]], align 8
+// OMP-DEFAULT-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
+// OMP-DEFAULT-NEXT: store i64 0, ptr [[TMP18]], align 8
+// OMP-DEFAULT-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
+// OMP-DEFAULT-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
+// OMP-DEFAULT-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
+// OMP-DEFAULT-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
+// OMP-DEFAULT-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[TMP21]], align 4
+// OMP-DEFAULT-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192.region_id, ptr [[KERNEL_ARGS]])
+// OMP-DEFAULT-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
+// OMP-DEFAULT-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
+// OMP-DEFAULT: omp_offload.failed:
+// OMP-DEFAULT-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192(i32 [[TMP3]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: br label [[OMP_OFFLOAD_CONT]]
+// OMP-DEFAULT: omp_offload.cont:
+// OMP-DEFAULT-NEXT: [[TMP24:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP25:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP24]], ptr [[TMP25]], align 4
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192
+// OMP-DEFAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192.omp_outlined, i32 [[TMP1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192.omp_outlined
+// OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[TMP:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[I:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
+// OMP-DEFAULT: cond.true:
+// OMP-DEFAULT-NEXT: br label [[COND_END:%.*]]
+// OMP-DEFAULT: cond.false:
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: br label [[COND_END]]
+// OMP-DEFAULT: cond.end:
+// OMP-DEFAULT-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
+// OMP-DEFAULT-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
+// OMP-DEFAULT: omp.inner.for.cond:
+// OMP-DEFAULT-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
+// OMP-DEFAULT-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
+// OMP-DEFAULT: omp.inner.for.body:
+// OMP-DEFAULT-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
+// OMP-DEFAULT-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// OMP-DEFAULT-NEXT: store i32 [[ADD]], ptr [[I]], align 4
+// OMP-DEFAULT-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 14
+// OMP-DEFAULT-NEXT: store i32 [[ADD2]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
+// OMP-DEFAULT: omp.body.continue:
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
+// OMP-DEFAULT: omp.inner.for.inc:
+// OMP-DEFAULT-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
+// OMP-DEFAULT-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_COND]]
+// OMP-DEFAULT: omp.inner.for.end:
+// OMP-DEFAULT-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
+// OMP-DEFAULT: omp.loop.exit:
+// OMP-DEFAULT-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SED2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP2]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP5]], align 4
+// OMP-DEFAULT-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP6]], align 4
+// OMP-DEFAULT-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 3, ptr [[TMP9]], align 4
+// OMP-DEFAULT-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
+// OMP-DEFAULT-NEXT: store i32 1, ptr [[TMP10]], align 4
+// OMP-DEFAULT-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
+// OMP-DEFAULT-NEXT: store ptr [[TMP7]], ptr [[TMP11]], align 4
+// OMP-DEFAULT-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
+// OMP-DEFAULT-NEXT: store ptr [[TMP8]], ptr [[TMP12]], align 4
+// OMP-DEFAULT-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
+// OMP-DEFAULT-NEXT: store ptr @.offload_sizes.11, ptr [[TMP13]], align 4
+// OMP-DEFAULT-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
+// OMP-DEFAULT-NEXT: store ptr @.offload_maptypes.12, ptr [[TMP14]], align 4
+// OMP-DEFAULT-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP15]], align 4
+// OMP-DEFAULT-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP16]], align 4
+// OMP-DEFAULT-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
+// OMP-DEFAULT-NEXT: store i64 0, ptr [[TMP17]], align 8
+// OMP-DEFAULT-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
+// OMP-DEFAULT-NEXT: store i64 0, ptr [[TMP18]], align 8
+// OMP-DEFAULT-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
+// OMP-DEFAULT-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
+// OMP-DEFAULT-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
+// OMP-DEFAULT-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
+// OMP-DEFAULT-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[TMP21]], align 4
+// OMP-DEFAULT-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199.region_id, ptr [[KERNEL_ARGS]])
+// OMP-DEFAULT-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
+// OMP-DEFAULT-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
+// OMP-DEFAULT: omp_offload.failed:
+// OMP-DEFAULT-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199(i32 [[TMP3]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: br label [[OMP_OFFLOAD_CONT]]
+// OMP-DEFAULT: omp_offload.cont:
+// OMP-DEFAULT-NEXT: [[TMP24:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP25:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP24]], ptr [[TMP25]], align 4
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199
+// OMP-DEFAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199.omp_outlined, i32 [[TMP1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199.omp_outlined
+// OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[TMP:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[I:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
+// OMP-DEFAULT: cond.true:
+// OMP-DEFAULT-NEXT: br label [[COND_END:%.*]]
+// OMP-DEFAULT: cond.false:
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: br label [[COND_END]]
+// OMP-DEFAULT: cond.end:
+// OMP-DEFAULT-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
+// OMP-DEFAULT-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
+// OMP-DEFAULT: omp.inner.for.cond:
+// OMP-DEFAULT-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
+// OMP-DEFAULT-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
+// OMP-DEFAULT: omp.inner.for.body:
+// OMP-DEFAULT-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
+// OMP-DEFAULT-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// OMP-DEFAULT-NEXT: store i32 [[ADD]], ptr [[I]], align 4
+// OMP-DEFAULT-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 15
+// OMP-DEFAULT-NEXT: store i32 [[ADD2]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
+// OMP-DEFAULT: omp.body.continue:
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
+// OMP-DEFAULT: omp.inner.for.inc:
+// OMP-DEFAULT-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
+// OMP-DEFAULT-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_COND]]
+// OMP-DEFAULT: omp.inner.for.end:
+// OMP-DEFAULT-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
+// OMP-DEFAULT: omp.loop.exit:
+// OMP-DEFAULT-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.13
+// OMP-DEFAULT-SAME: () #[[ATTR0]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: call void @_ZN2STILi100EEC1Ev(ptr noundef nonnull align 4 dereferenceable(912) @t1)
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2STILi100EED1Ev, ptr @t1, ptr @__dso_handle) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EEC1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: call void @_ZN2STILi100EEC2Ev(ptr noundef nonnull align 4 dereferenceable(912) [[THIS1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EED1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: call void @_ZN2STILi100EED2Ev(ptr noundef nonnull align 4 dereferenceable(912) [[THIS1]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EEC2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP2]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP5]], align 4
+// OMP-DEFAULT-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP6]], align 4
+// OMP-DEFAULT-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 3, ptr [[TMP9]], align 4
+// OMP-DEFAULT-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
+// OMP-DEFAULT-NEXT: store i32 1, ptr [[TMP10]], align 4
+// OMP-DEFAULT-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
+// OMP-DEFAULT-NEXT: store ptr [[TMP7]], ptr [[TMP11]], align 4
+// OMP-DEFAULT-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
+// OMP-DEFAULT-NEXT: store ptr [[TMP8]], ptr [[TMP12]], align 4
+// OMP-DEFAULT-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
+// OMP-DEFAULT-NEXT: store ptr @.offload_sizes.14, ptr [[TMP13]], align 4
+// OMP-DEFAULT-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
+// OMP-DEFAULT-NEXT: store ptr @.offload_maptypes.15, ptr [[TMP14]], align 4
+// OMP-DEFAULT-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP15]], align 4
+// OMP-DEFAULT-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP16]], align 4
+// OMP-DEFAULT-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
+// OMP-DEFAULT-NEXT: store i64 0, ptr [[TMP17]], align 8
+// OMP-DEFAULT-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
+// OMP-DEFAULT-NEXT: store i64 0, ptr [[TMP18]], align 8
+// OMP-DEFAULT-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
+// OMP-DEFAULT-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
+// OMP-DEFAULT-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
+// OMP-DEFAULT-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
+// OMP-DEFAULT-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[TMP21]], align 4
+// OMP-DEFAULT-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218.region_id, ptr [[KERNEL_ARGS]])
+// OMP-DEFAULT-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
+// OMP-DEFAULT-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
+// OMP-DEFAULT: omp_offload.failed:
+// OMP-DEFAULT-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218(i32 [[TMP3]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: br label [[OMP_OFFLOAD_CONT]]
+// OMP-DEFAULT: omp_offload.cont:
+// OMP-DEFAULT-NEXT: [[TMP24:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP25:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP24]], ptr [[TMP25]], align 4
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218
+// OMP-DEFAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218.omp_outlined, i32 [[TMP1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218.omp_outlined
+// OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[TMP:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[I:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
+// OMP-DEFAULT: cond.true:
+// OMP-DEFAULT-NEXT: br label [[COND_END:%.*]]
+// OMP-DEFAULT: cond.false:
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: br label [[COND_END]]
+// OMP-DEFAULT: cond.end:
+// OMP-DEFAULT-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
+// OMP-DEFAULT-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
+// OMP-DEFAULT: omp.inner.for.cond:
+// OMP-DEFAULT-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
+// OMP-DEFAULT-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
+// OMP-DEFAULT: omp.inner.for.body:
+// OMP-DEFAULT-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
+// OMP-DEFAULT-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// OMP-DEFAULT-NEXT: store i32 [[ADD]], ptr [[I]], align 4
+// OMP-DEFAULT-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 117
+// OMP-DEFAULT-NEXT: store i32 [[ADD2]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
+// OMP-DEFAULT: omp.body.continue:
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
+// OMP-DEFAULT: omp.inner.for.inc:
+// OMP-DEFAULT-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
+// OMP-DEFAULT-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_COND]]
+// OMP-DEFAULT: omp.inner.for.end:
+// OMP-DEFAULT-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
+// OMP-DEFAULT: omp.loop.exit:
+// OMP-DEFAULT-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EED2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP2]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP5]], align 4
+// OMP-DEFAULT-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP6]], align 4
+// OMP-DEFAULT-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 3, ptr [[TMP9]], align 4
+// OMP-DEFAULT-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
+// OMP-DEFAULT-NEXT: store i32 1, ptr [[TMP10]], align 4
+// OMP-DEFAULT-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
+// OMP-DEFAULT-NEXT: store ptr [[TMP7]], ptr [[TMP11]], align 4
+// OMP-DEFAULT-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
+// OMP-DEFAULT-NEXT: store ptr [[TMP8]], ptr [[TMP12]], align 4
+// OMP-DEFAULT-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
+// OMP-DEFAULT-NEXT: store ptr @.offload_sizes.16, ptr [[TMP13]], align 4
+// OMP-DEFAULT-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
+// OMP-DEFAULT-NEXT: store ptr @.offload_maptypes.17, ptr [[TMP14]], align 4
+// OMP-DEFAULT-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP15]], align 4
+// OMP-DEFAULT-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP16]], align 4
+// OMP-DEFAULT-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
+// OMP-DEFAULT-NEXT: store i64 0, ptr [[TMP17]], align 8
+// OMP-DEFAULT-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
+// OMP-DEFAULT-NEXT: store i64 0, ptr [[TMP18]], align 8
+// OMP-DEFAULT-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
+// OMP-DEFAULT-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
+// OMP-DEFAULT-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
+// OMP-DEFAULT-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
+// OMP-DEFAULT-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[TMP21]], align 4
+// OMP-DEFAULT-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225.region_id, ptr [[KERNEL_ARGS]])
+// OMP-DEFAULT-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
+// OMP-DEFAULT-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
+// OMP-DEFAULT: omp_offload.failed:
+// OMP-DEFAULT-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225(i32 [[TMP3]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: br label [[OMP_OFFLOAD_CONT]]
+// OMP-DEFAULT: omp_offload.cont:
+// OMP-DEFAULT-NEXT: [[TMP24:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP25:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP24]], ptr [[TMP25]], align 4
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225
+// OMP-DEFAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225.omp_outlined, i32 [[TMP1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225.omp_outlined
+// OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[TMP:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[I:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
+// OMP-DEFAULT: cond.true:
+// OMP-DEFAULT-NEXT: br label [[COND_END:%.*]]
+// OMP-DEFAULT: cond.false:
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: br label [[COND_END]]
+// OMP-DEFAULT: cond.end:
+// OMP-DEFAULT-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
+// OMP-DEFAULT-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
+// OMP-DEFAULT: omp.inner.for.cond:
+// OMP-DEFAULT-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
+// OMP-DEFAULT-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
+// OMP-DEFAULT: omp.inner.for.body:
+// OMP-DEFAULT-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
+// OMP-DEFAULT-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// OMP-DEFAULT-NEXT: store i32 [[ADD]], ptr [[I]], align 4
+// OMP-DEFAULT-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 118
+// OMP-DEFAULT-NEXT: store i32 [[ADD2]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
+// OMP-DEFAULT: omp.body.continue:
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
+// OMP-DEFAULT: omp.inner.for.inc:
+// OMP-DEFAULT-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
+// OMP-DEFAULT-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_COND]]
+// OMP-DEFAULT: omp.inner.for.end:
+// OMP-DEFAULT-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
+// OMP-DEFAULT: omp.loop.exit:
+// OMP-DEFAULT-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.18
+// OMP-DEFAULT-SAME: () #[[ATTR0]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: call void @_ZN2STILi1000EEC1Ev(ptr noundef nonnull align 4 dereferenceable(4512) @t2)
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2STILi1000EED1Ev, ptr @t2, ptr @__dso_handle) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EEC1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: call void @_ZN2STILi1000EEC2Ev(ptr noundef nonnull align 4 dereferenceable(4512) [[THIS1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EED1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: call void @_ZN2STILi1000EED2Ev(ptr noundef nonnull align 4 dereferenceable(4512) [[THIS1]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EEC2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP2]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP5]], align 4
+// OMP-DEFAULT-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP6]], align 4
+// OMP-DEFAULT-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 3, ptr [[TMP9]], align 4
+// OMP-DEFAULT-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
+// OMP-DEFAULT-NEXT: store i32 1, ptr [[TMP10]], align 4
+// OMP-DEFAULT-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
+// OMP-DEFAULT-NEXT: store ptr [[TMP7]], ptr [[TMP11]], align 4
+// OMP-DEFAULT-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
+// OMP-DEFAULT-NEXT: store ptr [[TMP8]], ptr [[TMP12]], align 4
+// OMP-DEFAULT-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
+// OMP-DEFAULT-NEXT: store ptr @.offload_sizes.19, ptr [[TMP13]], align 4
+// OMP-DEFAULT-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
+// OMP-DEFAULT-NEXT: store ptr @.offload_maptypes.20, ptr [[TMP14]], align 4
+// OMP-DEFAULT-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP15]], align 4
+// OMP-DEFAULT-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP16]], align 4
+// OMP-DEFAULT-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
+// OMP-DEFAULT-NEXT: store i64 0, ptr [[TMP17]], align 8
+// OMP-DEFAULT-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
+// OMP-DEFAULT-NEXT: store i64 0, ptr [[TMP18]], align 8
+// OMP-DEFAULT-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
+// OMP-DEFAULT-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
+// OMP-DEFAULT-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
+// OMP-DEFAULT-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
+// OMP-DEFAULT-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[TMP21]], align 4
+// OMP-DEFAULT-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218.region_id, ptr [[KERNEL_ARGS]])
+// OMP-DEFAULT-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
+// OMP-DEFAULT-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
+// OMP-DEFAULT: omp_offload.failed:
+// OMP-DEFAULT-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218(i32 [[TMP3]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: br label [[OMP_OFFLOAD_CONT]]
+// OMP-DEFAULT: omp_offload.cont:
+// OMP-DEFAULT-NEXT: [[TMP24:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP25:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP24]], ptr [[TMP25]], align 4
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218
+// OMP-DEFAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218.omp_outlined, i32 [[TMP1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218.omp_outlined
+// OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[TMP:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[I:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
+// OMP-DEFAULT: cond.true:
+// OMP-DEFAULT-NEXT: br label [[COND_END:%.*]]
+// OMP-DEFAULT: cond.false:
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: br label [[COND_END]]
+// OMP-DEFAULT: cond.end:
+// OMP-DEFAULT-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
+// OMP-DEFAULT-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
+// OMP-DEFAULT: omp.inner.for.cond:
+// OMP-DEFAULT-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
+// OMP-DEFAULT-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
+// OMP-DEFAULT: omp.inner.for.body:
+// OMP-DEFAULT-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
+// OMP-DEFAULT-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// OMP-DEFAULT-NEXT: store i32 [[ADD]], ptr [[I]], align 4
+// OMP-DEFAULT-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1017
+// OMP-DEFAULT-NEXT: store i32 [[ADD2]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
+// OMP-DEFAULT: omp.body.continue:
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
+// OMP-DEFAULT: omp.inner.for.inc:
+// OMP-DEFAULT-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
+// OMP-DEFAULT-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_COND]]
+// OMP-DEFAULT: omp.inner.for.end:
+// OMP-DEFAULT-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
+// OMP-DEFAULT: omp.loop.exit:
+// OMP-DEFAULT-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EED2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP2]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP5]], align 4
+// OMP-DEFAULT-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP6]], align 4
+// OMP-DEFAULT-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 3, ptr [[TMP9]], align 4
+// OMP-DEFAULT-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
+// OMP-DEFAULT-NEXT: store i32 1, ptr [[TMP10]], align 4
+// OMP-DEFAULT-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
+// OMP-DEFAULT-NEXT: store ptr [[TMP7]], ptr [[TMP11]], align 4
+// OMP-DEFAULT-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
+// OMP-DEFAULT-NEXT: store ptr [[TMP8]], ptr [[TMP12]], align 4
+// OMP-DEFAULT-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
+// OMP-DEFAULT-NEXT: store ptr @.offload_sizes.21, ptr [[TMP13]], align 4
+// OMP-DEFAULT-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
+// OMP-DEFAULT-NEXT: store ptr @.offload_maptypes.22, ptr [[TMP14]], align 4
+// OMP-DEFAULT-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP15]], align 4
+// OMP-DEFAULT-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP16]], align 4
+// OMP-DEFAULT-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
+// OMP-DEFAULT-NEXT: store i64 0, ptr [[TMP17]], align 8
+// OMP-DEFAULT-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
+// OMP-DEFAULT-NEXT: store i64 0, ptr [[TMP18]], align 8
+// OMP-DEFAULT-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
+// OMP-DEFAULT-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
+// OMP-DEFAULT-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
+// OMP-DEFAULT-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
+// OMP-DEFAULT-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[TMP21]], align 4
+// OMP-DEFAULT-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225.region_id, ptr [[KERNEL_ARGS]])
+// OMP-DEFAULT-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
+// OMP-DEFAULT-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
+// OMP-DEFAULT: omp_offload.failed:
+// OMP-DEFAULT-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225(i32 [[TMP3]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: br label [[OMP_OFFLOAD_CONT]]
+// OMP-DEFAULT: omp_offload.cont:
+// OMP-DEFAULT-NEXT: [[TMP24:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP25:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP24]], ptr [[TMP25]], align 4
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225
+// OMP-DEFAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225.omp_outlined, i32 [[TMP1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225.omp_outlined
+// OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[TMP:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[I:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
+// OMP-DEFAULT: cond.true:
+// OMP-DEFAULT-NEXT: br label [[COND_END:%.*]]
+// OMP-DEFAULT: cond.false:
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: br label [[COND_END]]
+// OMP-DEFAULT: cond.end:
+// OMP-DEFAULT-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
+// OMP-DEFAULT-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
+// OMP-DEFAULT: omp.inner.for.cond:
+// OMP-DEFAULT-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
+// OMP-DEFAULT-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
+// OMP-DEFAULT: omp.inner.for.body:
+// OMP-DEFAULT-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
+// OMP-DEFAULT-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// OMP-DEFAULT-NEXT: store i32 [[ADD]], ptr [[I]], align 4
+// OMP-DEFAULT-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1018
+// OMP-DEFAULT-NEXT: store i32 [[ADD2]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
+// OMP-DEFAULT: omp.body.continue:
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
+// OMP-DEFAULT: omp.inner.for.inc:
+// OMP-DEFAULT-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
+// OMP-DEFAULT-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_COND]]
+// OMP-DEFAULT: omp.inner.for.end:
+// OMP-DEFAULT-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
+// OMP-DEFAULT: omp.loop.exit:
+// OMP-DEFAULT-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_Z3bari
+// OMP-DEFAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR1]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[R:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[R_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
+// OMP-DEFAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP0]], ptr [[R]], align 4
+// OMP-DEFAULT-NEXT: call void @_ZN2SA3fooEv(ptr noundef nonnull align 4 dereferenceable(16) @_ZL2a1)
+// OMP-DEFAULT-NEXT: call void @_ZN2SA3fooEv(ptr noundef nonnull align 4 dereferenceable(16) @a2)
+// OMP-DEFAULT-NEXT: call void @_ZN2SB3fooEv(ptr noundef nonnull align 4 dereferenceable(32) @b1)
+// OMP-DEFAULT-NEXT: call void @_ZN2SB3fooEv(ptr noundef nonnull align 4 dereferenceable(32) @b2)
+// OMP-DEFAULT-NEXT: call void @_ZN2SC3fooEv(ptr noundef nonnull align 4 dereferenceable(64) @_ZL2c1)
+// OMP-DEFAULT-NEXT: call void @_ZN2SD3fooEv(ptr noundef nonnull align 4 dereferenceable(128) @d1)
+// OMP-DEFAULT-NEXT: call void @_ZN2SE3fooEv(ptr noundef nonnull align 4 dereferenceable(256) @e1)
+// OMP-DEFAULT-NEXT: call void @_ZN2STILi100EE3fooEv(ptr noundef nonnull align 4 dereferenceable(912) @t1)
+// OMP-DEFAULT-NEXT: call void @_ZN2STILi1000EE3fooEv(ptr noundef nonnull align 4 dereferenceable(4512) @t2)
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[R]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP1]], ptr [[R_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[R_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 [[TMP2]], ptr [[TMP3]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 [[TMP2]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP5]], align 4
+// OMP-DEFAULT-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 3, ptr [[TMP8]], align 4
+// OMP-DEFAULT-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
+// OMP-DEFAULT-NEXT: store i32 1, ptr [[TMP9]], align 4
+// OMP-DEFAULT-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
+// OMP-DEFAULT-NEXT: store ptr [[TMP6]], ptr [[TMP10]], align 4
+// OMP-DEFAULT-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
+// OMP-DEFAULT-NEXT: store ptr [[TMP7]], ptr [[TMP11]], align 4
+// OMP-DEFAULT-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
+// OMP-DEFAULT-NEXT: store ptr @.offload_sizes.23, ptr [[TMP12]], align 4
+// OMP-DEFAULT-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
+// OMP-DEFAULT-NEXT: store ptr @.offload_maptypes.24, ptr [[TMP13]], align 4
+// OMP-DEFAULT-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP14]], align 4
+// OMP-DEFAULT-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP15]], align 4
+// OMP-DEFAULT-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
+// OMP-DEFAULT-NEXT: store i64 0, ptr [[TMP16]], align 8
+// OMP-DEFAULT-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
+// OMP-DEFAULT-NEXT: store i64 0, ptr [[TMP17]], align 8
+// OMP-DEFAULT-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
+// OMP-DEFAULT-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP18]], align 4
+// OMP-DEFAULT-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
+// OMP-DEFAULT-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP19]], align 4
+// OMP-DEFAULT-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[TMP20]], align 4
+// OMP-DEFAULT-NEXT: [[TMP21:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267.region_id, ptr [[KERNEL_ARGS]])
+// OMP-DEFAULT-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
+// OMP-DEFAULT-NEXT: br i1 [[TMP22]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
+// OMP-DEFAULT: omp_offload.failed:
+// OMP-DEFAULT-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267(i32 [[TMP2]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: br label [[OMP_OFFLOAD_CONT]]
+// OMP-DEFAULT: omp_offload.cont:
+// OMP-DEFAULT-NEXT: [[TMP23:%.*]] = load i32, ptr [[R]], align 4
+// OMP-DEFAULT-NEXT: [[TMP24:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: [[TMP25:%.*]] = load i32, ptr [[TMP24]], align 4
+// OMP-DEFAULT-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP25]]
+// OMP-DEFAULT-NEXT: ret i32 [[ADD]]
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SA3fooEv
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], 1
+// OMP-DEFAULT-NEXT: store i32 [[ADD]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SB3fooEv
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP2]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP5]], align 4
+// OMP-DEFAULT-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP6]], align 4
+// OMP-DEFAULT-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 3, ptr [[TMP9]], align 4
+// OMP-DEFAULT-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
+// OMP-DEFAULT-NEXT: store i32 1, ptr [[TMP10]], align 4
+// OMP-DEFAULT-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
+// OMP-DEFAULT-NEXT: store ptr [[TMP7]], ptr [[TMP11]], align 4
+// OMP-DEFAULT-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
+// OMP-DEFAULT-NEXT: store ptr [[TMP8]], ptr [[TMP12]], align 4
+// OMP-DEFAULT-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
+// OMP-DEFAULT-NEXT: store ptr @.offload_sizes.25, ptr [[TMP13]], align 4
+// OMP-DEFAULT-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
+// OMP-DEFAULT-NEXT: store ptr @.offload_maptypes.26, ptr [[TMP14]], align 4
+// OMP-DEFAULT-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP15]], align 4
+// OMP-DEFAULT-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP16]], align 4
+// OMP-DEFAULT-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
+// OMP-DEFAULT-NEXT: store i64 0, ptr [[TMP17]], align 8
+// OMP-DEFAULT-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
+// OMP-DEFAULT-NEXT: store i64 0, ptr [[TMP18]], align 8
+// OMP-DEFAULT-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
+// OMP-DEFAULT-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
+// OMP-DEFAULT-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
+// OMP-DEFAULT-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
+// OMP-DEFAULT-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[TMP21]], align 4
+// OMP-DEFAULT-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122.region_id, ptr [[KERNEL_ARGS]])
+// OMP-DEFAULT-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
+// OMP-DEFAULT-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
+// OMP-DEFAULT: omp_offload.failed:
+// OMP-DEFAULT-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122(i32 [[TMP3]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: br label [[OMP_OFFLOAD_CONT]]
+// OMP-DEFAULT: omp_offload.cont:
+// OMP-DEFAULT-NEXT: [[TMP24:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP25:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP24]], ptr [[TMP25]], align 4
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SC3fooEv
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], 7
+// OMP-DEFAULT-NEXT: store i32 [[ADD]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SD3fooEv
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], 10
+// OMP-DEFAULT-NEXT: store i32 [[ADD]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SE3fooEv
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP2]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185(i32 [[TMP3]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP5:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP4]], ptr [[TMP5]], align 4
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EE3fooEv
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP2]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP5]], align 4
+// OMP-DEFAULT-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP6]], align 4
+// OMP-DEFAULT-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 3, ptr [[TMP9]], align 4
+// OMP-DEFAULT-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
+// OMP-DEFAULT-NEXT: store i32 1, ptr [[TMP10]], align 4
+// OMP-DEFAULT-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
+// OMP-DEFAULT-NEXT: store ptr [[TMP7]], ptr [[TMP11]], align 4
+// OMP-DEFAULT-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
+// OMP-DEFAULT-NEXT: store ptr [[TMP8]], ptr [[TMP12]], align 4
+// OMP-DEFAULT-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
+// OMP-DEFAULT-NEXT: store ptr @.offload_sizes.27, ptr [[TMP13]], align 4
+// OMP-DEFAULT-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
+// OMP-DEFAULT-NEXT: store ptr @.offload_maptypes.28, ptr [[TMP14]], align 4
+// OMP-DEFAULT-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP15]], align 4
+// OMP-DEFAULT-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP16]], align 4
+// OMP-DEFAULT-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
+// OMP-DEFAULT-NEXT: store i64 0, ptr [[TMP17]], align 8
+// OMP-DEFAULT-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
+// OMP-DEFAULT-NEXT: store i64 0, ptr [[TMP18]], align 8
+// OMP-DEFAULT-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
+// OMP-DEFAULT-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
+// OMP-DEFAULT-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
+// OMP-DEFAULT-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
+// OMP-DEFAULT-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[TMP21]], align 4
+// OMP-DEFAULT-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211.region_id, ptr [[KERNEL_ARGS]])
+// OMP-DEFAULT-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
+// OMP-DEFAULT-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
+// OMP-DEFAULT: omp_offload.failed:
+// OMP-DEFAULT-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211(i32 [[TMP3]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: br label [[OMP_OFFLOAD_CONT]]
+// OMP-DEFAULT: omp_offload.cont:
+// OMP-DEFAULT-NEXT: [[TMP24:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP25:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP24]], ptr [[TMP25]], align 4
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EE3fooEv
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
+// OMP-DEFAULT-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP2]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 [[TMP3]], ptr [[TMP5]], align 4
+// OMP-DEFAULT-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP6]], align 4
+// OMP-DEFAULT-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT: store i32 3, ptr [[TMP9]], align 4
+// OMP-DEFAULT-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
+// OMP-DEFAULT-NEXT: store i32 1, ptr [[TMP10]], align 4
+// OMP-DEFAULT-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
+// OMP-DEFAULT-NEXT: store ptr [[TMP7]], ptr [[TMP11]], align 4
+// OMP-DEFAULT-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
+// OMP-DEFAULT-NEXT: store ptr [[TMP8]], ptr [[TMP12]], align 4
+// OMP-DEFAULT-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
+// OMP-DEFAULT-NEXT: store ptr @.offload_sizes.29, ptr [[TMP13]], align 4
+// OMP-DEFAULT-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
+// OMP-DEFAULT-NEXT: store ptr @.offload_maptypes.30, ptr [[TMP14]], align 4
+// OMP-DEFAULT-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP15]], align 4
+// OMP-DEFAULT-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
+// OMP-DEFAULT-NEXT: store ptr null, ptr [[TMP16]], align 4
+// OMP-DEFAULT-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
+// OMP-DEFAULT-NEXT: store i64 0, ptr [[TMP17]], align 8
+// OMP-DEFAULT-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
+// OMP-DEFAULT-NEXT: store i64 0, ptr [[TMP18]], align 8
+// OMP-DEFAULT-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
+// OMP-DEFAULT-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
+// OMP-DEFAULT-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
+// OMP-DEFAULT-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
+// OMP-DEFAULT-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[TMP21]], align 4
+// OMP-DEFAULT-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211.region_id, ptr [[KERNEL_ARGS]])
+// OMP-DEFAULT-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
+// OMP-DEFAULT-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
+// OMP-DEFAULT: omp_offload.failed:
+// OMP-DEFAULT-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211(i32 [[TMP3]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT: br label [[OMP_OFFLOAD_CONT]]
+// OMP-DEFAULT: omp_offload.cont:
+// OMP-DEFAULT-NEXT: [[TMP24:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT: [[TMP25:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP24]], ptr [[TMP25]], align 4
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267
+// OMP-DEFAULT-SAME: (i32 noundef [[R:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[R_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[R_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store i32 [[R]], ptr [[R_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[R_ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP0]], ptr [[R_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[R_CASTED]], align 4
+// OMP-DEFAULT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267.omp_outlined, i32 [[TMP1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267.omp_outlined
+// OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[R:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[R_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[TMP:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[I:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[R]], ptr [[R_ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
+// OMP-DEFAULT: cond.true:
+// OMP-DEFAULT-NEXT: br label [[COND_END:%.*]]
+// OMP-DEFAULT: cond.false:
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: br label [[COND_END]]
+// OMP-DEFAULT: cond.end:
+// OMP-DEFAULT-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
+// OMP-DEFAULT-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
+// OMP-DEFAULT: omp.inner.for.cond:
+// OMP-DEFAULT-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
+// OMP-DEFAULT-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
+// OMP-DEFAULT: omp.inner.for.body:
+// OMP-DEFAULT-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
+// OMP-DEFAULT-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// OMP-DEFAULT-NEXT: store i32 [[ADD]], ptr [[I]], align 4
+// OMP-DEFAULT-NEXT: [[TMP8:%.*]] = load i32, ptr [[R_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1
+// OMP-DEFAULT-NEXT: store i32 [[INC]], ptr [[R_ADDR]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
+// OMP-DEFAULT: omp.body.continue:
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
+// OMP-DEFAULT: omp.inner.for.inc:
+// OMP-DEFAULT-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1
+// OMP-DEFAULT-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_COND]]
+// OMP-DEFAULT: omp.inner.for.end:
+// OMP-DEFAULT-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
+// OMP-DEFAULT: omp.loop.exit:
+// OMP-DEFAULT-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122
+// OMP-DEFAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122.omp_outlined, i32 [[TMP1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122.omp_outlined
+// OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[TMP:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[I:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
+// OMP-DEFAULT: cond.true:
+// OMP-DEFAULT-NEXT: br label [[COND_END:%.*]]
+// OMP-DEFAULT: cond.false:
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: br label [[COND_END]]
+// OMP-DEFAULT: cond.end:
+// OMP-DEFAULT-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
+// OMP-DEFAULT-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
+// OMP-DEFAULT: omp.inner.for.cond:
+// OMP-DEFAULT-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
+// OMP-DEFAULT-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
+// OMP-DEFAULT: omp.inner.for.body:
+// OMP-DEFAULT-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
+// OMP-DEFAULT-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// OMP-DEFAULT-NEXT: store i32 [[ADD]], ptr [[I]], align 4
+// OMP-DEFAULT-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 4
+// OMP-DEFAULT-NEXT: store i32 [[ADD2]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
+// OMP-DEFAULT: omp.body.continue:
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
+// OMP-DEFAULT: omp.inner.for.inc:
+// OMP-DEFAULT-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
+// OMP-DEFAULT-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_COND]]
+// OMP-DEFAULT: omp.inner.for.end:
+// OMP-DEFAULT-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
+// OMP-DEFAULT: omp.loop.exit:
+// OMP-DEFAULT-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185
+// OMP-DEFAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185.omp_outlined, i32 [[TMP1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185.omp_outlined
+// OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[TMP:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[I:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
+// OMP-DEFAULT: cond.true:
+// OMP-DEFAULT-NEXT: br label [[COND_END:%.*]]
+// OMP-DEFAULT: cond.false:
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: br label [[COND_END]]
+// OMP-DEFAULT: cond.end:
+// OMP-DEFAULT-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
+// OMP-DEFAULT-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
+// OMP-DEFAULT: omp.inner.for.cond:
+// OMP-DEFAULT-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
+// OMP-DEFAULT-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
+// OMP-DEFAULT: omp.inner.for.body:
+// OMP-DEFAULT-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
+// OMP-DEFAULT-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// OMP-DEFAULT-NEXT: store i32 [[ADD]], ptr [[I]], align 4
+// OMP-DEFAULT-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 13
+// OMP-DEFAULT-NEXT: store i32 [[ADD2]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
+// OMP-DEFAULT: omp.body.continue:
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
+// OMP-DEFAULT: omp.inner.for.inc:
+// OMP-DEFAULT-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
+// OMP-DEFAULT-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_COND]]
+// OMP-DEFAULT: omp.inner.for.end:
+// OMP-DEFAULT-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
+// OMP-DEFAULT: omp.loop.exit:
+// OMP-DEFAULT-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211
+// OMP-DEFAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211.omp_outlined, i32 [[TMP1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211.omp_outlined
+// OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[TMP:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[I:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
+// OMP-DEFAULT: cond.true:
+// OMP-DEFAULT-NEXT: br label [[COND_END:%.*]]
+// OMP-DEFAULT: cond.false:
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: br label [[COND_END]]
+// OMP-DEFAULT: cond.end:
+// OMP-DEFAULT-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
+// OMP-DEFAULT-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
+// OMP-DEFAULT: omp.inner.for.cond:
+// OMP-DEFAULT-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
+// OMP-DEFAULT-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
+// OMP-DEFAULT: omp.inner.for.body:
+// OMP-DEFAULT-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
+// OMP-DEFAULT-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// OMP-DEFAULT-NEXT: store i32 [[ADD]], ptr [[I]], align 4
+// OMP-DEFAULT-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 116
+// OMP-DEFAULT-NEXT: store i32 [[ADD2]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
+// OMP-DEFAULT: omp.body.continue:
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
+// OMP-DEFAULT: omp.inner.for.inc:
+// OMP-DEFAULT-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
+// OMP-DEFAULT-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_COND]]
+// OMP-DEFAULT: omp.inner.for.end:
+// OMP-DEFAULT-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
+// OMP-DEFAULT: omp.loop.exit:
+// OMP-DEFAULT-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211
+// OMP-DEFAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211.omp_outlined, i32 [[TMP1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211.omp_outlined
+// OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[TMP:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: [[I:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// OMP-DEFAULT-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// OMP-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// OMP-DEFAULT-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
+// OMP-DEFAULT: cond.true:
+// OMP-DEFAULT-NEXT: br label [[COND_END:%.*]]
+// OMP-DEFAULT: cond.false:
+// OMP-DEFAULT-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: br label [[COND_END]]
+// OMP-DEFAULT: cond.end:
+// OMP-DEFAULT-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
+// OMP-DEFAULT-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
+// OMP-DEFAULT: omp.inner.for.cond:
+// OMP-DEFAULT-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
+// OMP-DEFAULT-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
+// OMP-DEFAULT: omp.inner.for.body:
+// OMP-DEFAULT-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
+// OMP-DEFAULT-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// OMP-DEFAULT-NEXT: store i32 [[ADD]], ptr [[I]], align 4
+// OMP-DEFAULT-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1016
+// OMP-DEFAULT-NEXT: store i32 [[ADD2]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
+// OMP-DEFAULT: omp.body.continue:
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
+// OMP-DEFAULT: omp.inner.for.inc:
+// OMP-DEFAULT-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
+// OMP-DEFAULT-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT: br label [[OMP_INNER_FOR_COND]]
+// OMP-DEFAULT: omp.inner.for.end:
+// OMP-DEFAULT-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
+// OMP-DEFAULT: omp.loop.exit:
+// OMP-DEFAULT-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_GLOBAL__I_000500
+// OMP-DEFAULT-SAME: () #[[ATTR0]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: call void @__cxx_global_var_init()
+// OMP-DEFAULT-NEXT: call void @__cxx_global_var_init.2()
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_GLOBAL__I_000501
+// OMP-DEFAULT-SAME: () #[[ATTR0]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: call void @__cxx_global_var_init.3()
+// OMP-DEFAULT-NEXT: ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_parallel_generic_loop_codegen_1.cpp
+// OMP-DEFAULT-SAME: () #[[ATTR0]] {
+// OMP-DEFAULT-NEXT: entry:
+// OMP-DEFAULT-NEXT: call void @__cxx_global_var_init.1()
+// OMP-DEFAULT-NEXT: call void @__cxx_global_var_init.4()
+// OMP-DEFAULT-NEXT: call void @__cxx_global_var_init.5()
+// OMP-DEFAULT-NEXT: call void @__cxx_global_var_init.8()
+// OMP-DEFAULT-NEXT: call void @__cxx_global_var_init.13()
+// OMP-DEFAULT-NEXT: call void @__cxx_global_var_init.18()
+// OMP-DEFAULT-NEXT: ret void
//
//
//
>From 8a224ec2e50aba870f6977db09e3671ffa4f215a Mon Sep 17 00:00:00 2001
From: klensy <klensy at users.noreply.github.com>
Date: Sat, 11 May 2024 17:51:25 +0300
Subject: [PATCH 4/6] and few more
---
clang/test/CodeGen/X86/avx512vl-builtins.c | 2 +-
clang/test/CodeGen/X86/avx512vlbw-builtins.c | 4 ++--
clang/test/Driver/save-stats.c | 6 +++---
clang/test/Misc/pragma-attribute-strict-subjects.c | 2 +-
flang/test/Driver/dump-pft.f90 | 4 ++--
flang/test/Lower/Intrinsics/storage_size-2.f90 | 2 +-
llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir | 10 +++++-----
llvm/test/MC/XCOFF/inlineasm.s | 2 +-
8 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/clang/test/CodeGen/X86/avx512vl-builtins.c b/clang/test/CodeGen/X86/avx512vl-builtins.c
index 6f544c21e798d..c8f24b8ed6336 100644
--- a/clang/test/CodeGen/X86/avx512vl-builtins.c
+++ b/clang/test/CodeGen/X86/avx512vl-builtins.c
@@ -7021,7 +7021,7 @@ void test_mm256_mask_store_ps(void *__P, __mmask8 __U, __m256 __A) {
}
void test_mm_storeu_epi64(void *__p, __m128i __a) {
- // check-label: @test_mm_storeu_epi64
+ // check-LABEL: @test_mm_storeu_epi64
// check: store <2 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}}
return _mm_storeu_epi64(__p, __a);
}
diff --git a/clang/test/CodeGen/X86/avx512vlbw-builtins.c b/clang/test/CodeGen/X86/avx512vlbw-builtins.c
index e2ce348d0e077..161244be74dd2 100644
--- a/clang/test/CodeGen/X86/avx512vlbw-builtins.c
+++ b/clang/test/CodeGen/X86/avx512vlbw-builtins.c
@@ -2569,7 +2569,7 @@ __m256i test_mm256_maskz_loadu_epi8(__mmask32 __U, void const *__P) {
}
void test_mm_storeu_epi16(void *__p, __m128i __a) {
- // check-label: @test_mm_storeu_epi16
+ // check-LABEL: @test_mm_storeu_epi16
// check: store <2 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}}
return _mm_storeu_epi16(__p, __a);
}
@@ -2593,7 +2593,7 @@ void test_mm256_mask_storeu_epi16(void *__P, __mmask16 __U, __m256i __A) {
}
void test_mm_storeu_epi8(void *__p, __m128i __a) {
- // check-label: @test_mm_storeu_epi8
+ // check-LABEL: @test_mm_storeu_epi8
// check: store <2 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}}
return _mm_storeu_epi8(__p, __a);
}
diff --git a/clang/test/Driver/save-stats.c b/clang/test/Driver/save-stats.c
index ad7867a991686..ee49668da01d9 100644
--- a/clang/test/Driver/save-stats.c
+++ b/clang/test/Driver/save-stats.c
@@ -4,9 +4,9 @@
// CHECK: "{{.*}}save-stats.c"
// RUN: %clang -target x86_64-apple-darwin -S %s -### 2>&1 | FileCheck %s -check-prefix=NO-STATS
-// NO-STATS-NO: -stats-file
+// NO-STATS-NOT: -stats-file
// NO-STATS: "{{.*}}save-stats.c"
-// NO-STATS-NO: -stats-file
+// NO-STATS-NOT: -stats-file
// RUN: %clang -target x86_64-apple-darwin -save-stats=obj -c -o obj/dir/save-stats.o %s -### 2>&1 | FileCheck %s -check-prefix=CHECK-OBJ
// CHECK-OBJ: "-stats-file=obj/dir{{/|\\\\}}save-stats.stats"
@@ -49,7 +49,7 @@
// RUN: env CC_PRINT_INTERNAL_STAT=1 \
// RUN: %clang -target x86_64-apple-darwin %s -### 2>&1 | FileCheck %s -check-prefix=CHECK-ENV
// CHECK-ENV: "-stats-file=-"
-// CHECK-ENV-NO: "stats-file-append"
+// CHECK-ENV-NOT: "stats-file-append"
// RUN: env CC_PRINT_INTERNAL_STAT=1 \
// RUN: CC_PRINT_INTERNAL_STAT_FILE=/tmp/stats.json \
diff --git a/clang/test/Misc/pragma-attribute-strict-subjects.c b/clang/test/Misc/pragma-attribute-strict-subjects.c
index 7c2548c7dfc26..8310015ce65e1 100644
--- a/clang/test/Misc/pragma-attribute-strict-subjects.c
+++ b/clang/test/Misc/pragma-attribute-strict-subjects.c
@@ -68,7 +68,7 @@ struct testRecoverExtraStruct { };
enum testNoEnumAbiTag { CaseCase };
// CHECK-LABEL: EnumDecl{{.*}} testNoEnumAbiTag
-// CHECK-NO: AbiTagAttr
+// CHECK-NOT: AbiTagAttr
#pragma clang attribute pop
diff --git a/flang/test/Driver/dump-pft.f90 b/flang/test/Driver/dump-pft.f90
index 6d98fc9f10b89..eba3e930f6238 100644
--- a/flang/test/Driver/dump-pft.f90
+++ b/flang/test/Driver/dump-pft.f90
@@ -5,7 +5,7 @@
! PFT: 1 Subroutine test_routine: subroutine test_routine(a, b, n)
! PFT-NEXT: 1 EndSubroutineStmt: end subroutine
! PRF-NEXT: End Subroutine test_routine
-! PFT-NO: Program -> ProgramUnit -> SubroutineSubprogram
+! PFT-NOT: Program -> ProgramUnit -> SubroutineSubprogram
! PARSE_TREE: Program -> ProgramUnit -> SubroutineSubprogram
! PARSE_TREE-NEXT: | SubroutineStmt
@@ -17,7 +17,7 @@
! PARSE_TREE-NEXT: | | ImplicitPart ->
! PARSE_TREE-NEXT: | ExecutionPart -> Block
! PARSE_TREE-NEXT: | EndSubroutineStmt ->
-! PARSE_TREE-NO: Subroutine test_routine: subroutine test_routine(a, b, n)
+! PARSE_TREE-NOT: Subroutine test_routine: subroutine test_routine(a, b, n)
subroutine test_routine(a, b, n)
end subroutine
diff --git a/flang/test/Lower/Intrinsics/storage_size-2.f90 b/flang/test/Lower/Intrinsics/storage_size-2.f90
index d6fb68df70ea9..208070e04e6e6 100644
--- a/flang/test/Lower/Intrinsics/storage_size-2.f90
+++ b/flang/test/Lower/Intrinsics/storage_size-2.f90
@@ -1,7 +1,7 @@
! Test storage_size with characters
! RUN: bbc -emit-hlfir %s -o - | FileCheck %s
-! check-label: func.func @_QPtest_storage_size
+! CHECK-LABEL: func.func @_QPtest_storage_size
subroutine test_storage_size(n)
interface
function return_char(l)
diff --git a/llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir b/llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir
index 29621a0477418..1151bde02ef62 100644
--- a/llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir
+++ b/llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir
@@ -4,7 +4,7 @@
---
-# GCN-label: name: vop3
+# GCN-LABEL: name: vop3
# GCN: %6:vgpr_32, %7:sreg_32_xm0_xexec = V_SUBBREV_U32_e64_dpp %3, %0, %1, %5, 1, 1, 15, 15, 1, implicit $exec
# GCN: %8:vgpr_32 = V_CVT_PK_U8_F32_e64_dpp %3, 4, %0, 2, %2, 2, %1, 1, 1, 15, 15, 1, implicit $mode, implicit $exec
# GCN: %10:vgpr_32 = V_MED3_F32_e64 0, %9, 0, %0, 0, 12345678, 0, 0, implicit $mode, implicit $exec
@@ -37,7 +37,7 @@ body: |
...
---
-# GCN-label: name: vop3_sgpr_src1
+# GCN-LABEL: name: vop3_sgpr_src1
# GCN: %6:vgpr_32 = V_MED3_F32_e64_dpp %4, 0, %0, 0, %1, 0, %2, 0, 0, 1, 15, 15, 1, implicit $mode, implicit $exec
# GFX1100: %8:vgpr_32 = V_MED3_F32_e64 0, %7, 0, %2, 0, %1, 0, 0, implicit $mode, implicit $exec
# GFX1150: %8:vgpr_32 = V_MED3_F32_e64_dpp %4, 0, %0, 0, %2, 0, %1, 0, 0, 1, 15, 15, 1, implicit $mode, implicit $exec
@@ -81,7 +81,7 @@ body: |
---
# Regression test for src_modifiers on base u16 opcode
-# GCN-label: name: vop3_u16
+# GCN-LABEL: name: vop3_u16
# GCN: %5:vgpr_32 = V_ADD_NC_U16_e64_dpp %3, 0, %1, 0, %3, 0, 0, 1, 15, 15, 1, implicit $exec
# GCN: %7:vgpr_32 = V_ADD_NC_U16_e64_dpp %3, 1, %5, 2, %5, 0, 0, 1, 15, 15, 1, implicit $exec
# GCN: %9:vgpr_32 = V_ADD_NC_U16_e64 4, %8, 8, %7, 0, 0, implicit $exec
@@ -205,7 +205,7 @@ body: |
...
# do not combine, dpp arg used twice
-# GCN-label: name: dpp_arg_twice
+# GCN-LABEL: name: dpp_arg_twice
# GCN: %4:vgpr_32 = V_FMA_F32_e64 1, %1, 2, %3, 2, %3, 1, 2, implicit $mode, implicit $exec
# GCN: %6:vgpr_32 = V_FMA_F32_e64 2, %5, 2, %1, 2, %5, 1, 2, implicit $mode, implicit $exec
# GCN: %8:vgpr_32 = V_FMA_F32_e64 2, %7, 2, %7, 2, %1, 1, 2, implicit $mode, implicit $exec
@@ -231,7 +231,7 @@ body: |
...
# when the dpp source isn't a src0 operand the operation should be commuted if possible
-# GCN-label: name: dpp_commute_e64
+# GCN-LABEL: name: dpp_commute_e64
# GCN: %4:vgpr_32 = V_MUL_U32_U24_e64_dpp %1, %0, %1, 1, 1, 14, 15, 0, implicit $exec
# GCN: %7:vgpr_32 = V_FMA_F32_e64_dpp %5, 2, %0, 1, %1, 2, %1, 1, 2, 1, 15, 15, 1, implicit $mode, implicit $exec
# GCN: %10:vgpr_32 = V_SUBREV_U32_e64_dpp %1, %0, %1, 1, 1, 14, 15, 0, implicit $exec
diff --git a/llvm/test/MC/XCOFF/inlineasm.s b/llvm/test/MC/XCOFF/inlineasm.s
index 85a40024711a1..44f4c94f34c43 100644
--- a/llvm/test/MC/XCOFF/inlineasm.s
+++ b/llvm/test/MC/XCOFF/inlineasm.s
@@ -1,6 +1,6 @@
// RUN: llvm-mc -filetype=asm -triple powerpc-ibm-aix-xcoff %s | FileCheck %s
-// CHECK-label: .csect .text[PR],2
+// CHECK-LABEL: .csect .text[PR],2
// CHECK:L..tmp0:
// CHECK-NEXT: lwarx 3, 0, 4
// CHECK-NEXT: cmpw 5, 3
>From d19ca6cd70f7dbd61defe72c9540c1f341787139 Mon Sep 17 00:00:00 2001
From: klensy <klensy at users.noreply.github.com>
Date: Sat, 11 May 2024 18:17:50 +0300
Subject: [PATCH 5/6] and few more
---
clang/test/CodeGen/PowerPC/ppc-tmmintrin.c | 2 +-
clang/test/CodeGen/X86/avx-builtins.c | 4 ++--
clang/test/CodeGen/paren-list-agg-init.cpp | 2 +-
clang/test/CodeGenCXX/microsoft-abi-throw.cpp | 2 +-
clang/test/Driver/baremetal-sysroot.cpp | 2 +-
clang/test/Driver/baremetal.cpp | 6 ++---
clang/test/ExtractAPI/objc_property.m | 2 +-
llvm/test/CodeGen/AArch64/fpimm.ll | 2 +-
llvm/test/CodeGen/ARM/shifter_operand.ll | 2 +-
llvm/test/CodeGen/ARM/sxt_rot.ll | 2 +-
.../Thumb2/LowOverheadLoops/branch-targets.ll | 6 ++---
.../MemorySanitizer/X86/msan_x86_bts_asm.ll | 6 ++---
.../Mips/mips32r6/valid-mips32r6.txt | 6 ++---
.../Mips/mips64r6/valid-mips64r6.txt | 6 ++---
llvm/test/MC/Mips/macro-rem.s | 2 +-
.../Coroutines/coro-debug-coro-frame.ll | 2 +-
.../AArch64/nontemporal-load-store.ll | 22 +++++++++----------
.../Inputs/binary-formats.canonical.json | 2 +-
.../bufferization-to-memref.mlir | 8 +++----
.../Transforms/lower-deallocations-func.mlir | 8 +++----
.../Transforms/lower-deallocations.mlir | 8 +++----
21 files changed, 51 insertions(+), 51 deletions(-)
diff --git a/clang/test/CodeGen/PowerPC/ppc-tmmintrin.c b/clang/test/CodeGen/PowerPC/ppc-tmmintrin.c
index 40d3839dcf026..fafdf4ed91e2e 100644
--- a/clang/test/CodeGen/PowerPC/ppc-tmmintrin.c
+++ b/clang/test/CodeGen/PowerPC/ppc-tmmintrin.c
@@ -71,7 +71,7 @@ test_alignr() {
// CHECK-BE: call <16 x i8> @vec_sld(unsigned char vector[16], unsigned char vector[16], unsigned int)
// CHECK-LE: call <16 x i8> @vec_reve(unsigned char vector[16])
// CHECK-LE: call <16 x i8> @vec_reve(unsigned char vector[16])
-// CHECk-LE: call <16 x i8> @vec_sld(unsigned char vector[16], unsigned char vector[16], unsigned int)
+// CHECK-LE: call <16 x i8> @vec_sld(unsigned char vector[16], unsigned char vector[16], unsigned int)
// CHECK-LE: call <16 x i8> @vec_reve(unsigned char vector[16])
// CHECK: store <16 x i8> zeroinitializer, ptr %{{[0-9a-zA-Z_.]+}}, align 16
// CHECK: store <2 x i64> zeroinitializer, ptr %{{[0-9a-zA-Z_.]+}}, align 16
diff --git a/clang/test/CodeGen/X86/avx-builtins.c b/clang/test/CodeGen/X86/avx-builtins.c
index 4bf1213d9fca9..2f80a31c585dc 100644
--- a/clang/test/CodeGen/X86/avx-builtins.c
+++ b/clang/test/CodeGen/X86/avx-builtins.c
@@ -1800,14 +1800,14 @@ void test_mm256_storeu_pd(double* A, __m256d B) {
void test_mm256_storeu_ps(float* A, __m256 B) {
// CHECK-LABEL: test_mm256_storeu_ps
// CHECK: store <8 x float> %{{.*}}, ptr %{{.*}}, align 1{{$}}
- // CHECk-NEXT: ret void
+ // CHECK-NEXT: ret void
_mm256_storeu_ps(A, B);
}
void test_mm256_storeu_si256(__m256i* A, __m256i B) {
// CHECK-LABEL: test_mm256_storeu_si256
// CHECK: store <4 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}}
- // CHECk-NEXT: ret void
+ // CHECK-NEXT: ret void
_mm256_storeu_si256(A, B);
}
diff --git a/clang/test/CodeGen/paren-list-agg-init.cpp b/clang/test/CodeGen/paren-list-agg-init.cpp
index 94d42431d125d..78cab8a71110f 100644
--- a/clang/test/CodeGen/paren-list-agg-init.cpp
+++ b/clang/test/CodeGen/paren-list-agg-init.cpp
@@ -382,7 +382,7 @@ void foo18() {
// CHECK-NEXT: [[A:%.*a.*]] = getelementptr inbounds [[STRUCT_G]], ptr [[G]], i32 0, i32 0
// CHECK-NEXT: store i32 2, ptr [[A]], align 4
// CHECK-NEXT: [[F:%.*f.*]] = getelementptr inbounds [[STRUCT_G]], ptr [[G]], i32 0, i32 1
-// CHECk-NEXT: call void @{{.*F.*}}(ptr noundef nonnull align 1 dereferenceable(1)) [[F]], ie32 noundef 1)
+// CHECK-NEXT: call void @_ZN1FC1Ei(ptr noundef nonnull align 1 dereferenceable(1) [[F]], i32 noundef 1)
// CHECK: ret void
void foo19() {
G g(2);
diff --git a/clang/test/CodeGenCXX/microsoft-abi-throw.cpp b/clang/test/CodeGenCXX/microsoft-abi-throw.cpp
index 10a58b21fc101..b861127430ae5 100644
--- a/clang/test/CodeGenCXX/microsoft-abi-throw.cpp
+++ b/clang/test/CodeGenCXX/microsoft-abi-throw.cpp
@@ -14,7 +14,7 @@
// CHECK-DAG: @"_TI5?AUY@@" = linkonce_odr unnamed_addr constant %eh.ThrowInfo { i32 0, ptr @"??_DY@@QAEXXZ", ptr null, ptr @"_CTA5?AUY@@" }, section ".xdata", comdat
// CHECK-DAG: @"_CT??_R0?AUDefault@@@8??_ODefault@@QAEXAAU0@@Z1" = linkonce_odr unnamed_addr constant %eh.CatchableType { i32 0, ptr @"??_R0?AUDefault@@@8", i32 0, i32 -1, i32 0, i32 1, ptr @"??_ODefault@@QAEXAAU0@@Z" }, section ".xdata", comdat
// CHECK-DAG: @"_CT??_R0?AUDeletedCopy@@@81" = linkonce_odr unnamed_addr constant %eh.CatchableType { i32 0, ptr @"??_R0?AUDeletedCopy@@@8", i32 0, i32 -1, i32 0, i32 1, ptr null }, section ".xdata", comdat
-// CHECk-DAG: @"_CT??_R0?AUMoveOnly@@@84" = linkonce_odr unnamed_addr constant %eh.CatchableType { i32 0, ptr @"??_R0?AUMoveOnly@@@8", i32 0, i321-1, i32 0, i32 4, ptr null }, section ".xdata", comda
+// CHECK-DAG: @"_CT??_R0?AUMoveOnly@@@84" = linkonce_odr unnamed_addr constant %eh.CatchableType { i32 0, ptr @"??_R0?AUMoveOnly@@@8", i32 0, i321-1, i32 0, i32 4, ptr null }, section ".xdata", comdat
// CHECK-DAG: @"_CT??_R0?AUVariadic@@@8??_OVariadic@@QAEXAAU0@@Z1" = linkonce_odr unnamed_addr constant %eh.CatchableType { i32 0, ptr @"??_R0?AUVariadic@@@8", i32 0, i32 -1, i32 0, i32 1, ptr @"??_OVariadic@@QAEXAAU0@@Z" }, section ".xdata", comdat
// CHECK-DAG: @"_CT??_R0?AUTemplateWithDefault@@@8??$?_OH at TemplateWithDefault@@QAEXAAU0@@Z1" = linkonce_odr unnamed_addr constant %eh.CatchableType { i32 0, ptr @"??_R0?AUTemplateWithDefault@@@8", i32 0, i32 -1, i32 0, i32 1, ptr @"??$?_OH at TemplateWithDefault@@QAEXAAU0@@Z" }, section ".xdata", comdat
// CHECK-DAG: @"_CTA2$$T" = linkonce_odr unnamed_addr constant %eh.CatchableTypeArray.2 { i32 2, [2 x ptr] [ptr @"_CT??_R0$$T at 84", ptr @"_CT??_R0PAX at 84"] }, section ".xdata", comdat
diff --git a/clang/test/Driver/baremetal-sysroot.cpp b/clang/test/Driver/baremetal-sysroot.cpp
index 18654be33b87c..522f4a08f3fce 100644
--- a/clang/test/Driver/baremetal-sysroot.cpp
+++ b/clang/test/Driver/baremetal-sysroot.cpp
@@ -14,7 +14,7 @@
// RUN: | FileCheck --check-prefix=CHECK-V6M-C %s
// CHECK-V6M-C: "{{.*}}clang{{.*}}" "-cc1" "-triple" "thumbv6m-unknown-none-eabi"
// CHECK-V6M-C-SAME: "-internal-isystem" "{{.*}}/baremetal_default_sysroot{{[/\\]+}}bin{{[/\\]+}}..{{[/\\]+}}lib{{[/\\]+}}clang-runtimes{{[/\\]+}}armv6m-none-eabi{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1"
-// CHECk-V6M-C-SAME: "-internal-isystem" "{{.*}}/baremetal_default_sysroot{{[/\\]+}}bin{{[/\\]+}}..{{[/\\]+}}lib{{[/\\]+}}clang-runtimes{{[/\\]+}}armv6m-none-eabi{{[/\\]+}}include"
+// CHECK-V6M-C-SAME: "-internal-isystem" "{{.*}}/baremetal_default_sysroot{{[/\\]+}}bin{{[/\\]+}}..{{[/\\]+}}lib{{[/\\]+}}clang-runtimes{{[/\\]+}}armv6m-none-eabi{{[/\\]+}}include"
// CHECK-V6M-C-SAME: "-x" "c++" "{{.*}}baremetal-sysroot.cpp"
// CHECK-V6M-C-NEXT: "{{[^"]*}}ld{{(\.(lld|bfd|gold))?}}{{(\.exe)?}}" "{{.*}}.o" "-Bstatic"
// CHECK-V6M-C-SAME: "-L{{.*}}/baremetal_default_sysroot{{[/\\]+}}bin{{[/\\]+}}..{{[/\\]+}}lib{{[/\\]+}}clang-runtimes{{[/\\]+}}armv6m-none-eabi{{[/\\]+}}lib"
diff --git a/clang/test/Driver/baremetal.cpp b/clang/test/Driver/baremetal.cpp
index cc14f045df3f9..347dd359e3716 100644
--- a/clang/test/Driver/baremetal.cpp
+++ b/clang/test/Driver/baremetal.cpp
@@ -13,7 +13,7 @@
// CHECK-V6M-C-SAME: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
// CHECK-V6M-C-SAME: "-isysroot" "[[SYSROOT:[^"]*]]"
// CHECK-V6M-C-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1"
-// CHECk-V6M-C-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}include"
+// CHECK-V6M-C-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}include"
// CHECK-V6M-C-SAME: "-x" "c++" "{{.*}}baremetal.cpp"
// CHECK-V6M-C-NEXT: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
// CHECK-V6M-C-SAME: "-T" "semihosted.lds" "-Lsome{{[/\\]+}}directory{{[/\\]+}}user{{[/\\]+}}asked{{[/\\]+}}for"
@@ -167,7 +167,7 @@
// CHECK-RV64-SAME: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
// CHECK-RV64-SAME: "-isysroot" "[[SYSROOT:[^"]*]]"
// CHECK-RV64-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1"
-// CHECk-RV64-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}include"
+// CHECK-RV64-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}include"
// CHECK-RV64-SAME: "-x" "c++" "{{.*}}baremetal.cpp"
// CHECK-RV64-NEXT: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
// CHECK-RV64-SAME: "-Lsome{{[/\\]+}}directory{{[/\\]+}}user{{[/\\]+}}asked{{[/\\]+}}for"
@@ -287,7 +287,7 @@
// CHECK-RV64FD-SAME: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
// CHECK-RV64FD-SAME: "-isysroot" "[[SYSROOT:[^"]*]]"
// CHECK-RV64FD-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}rv64imafdc{{[/\\]+}}lp64d{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1"
-// CHECk-RV64FD-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}rv64imafdc{{[/\\]+}}lp64d{{[/\\]+}}include"
+// CHECK-RV64FD-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}rv64imafdc{{[/\\]+}}lp64d{{[/\\]+}}include"
// CHECK-RV64FD-SAME: "-x" "c++" "{{.*}}baremetal.cpp"
// CHECK-RV64FD-NEXT: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
// CHECK-RV64FD-SAME: "-L[[SYSROOT:[^"]+]]{{[/\\]+}}rv64imafdc{{[/\\]+}}lp64d{{[/\\]+}}lib"
diff --git a/clang/test/ExtractAPI/objc_property.m b/clang/test/ExtractAPI/objc_property.m
index f05584c885d91..68869295f8c04 100644
--- a/clang/test/ExtractAPI/objc_property.m
+++ b/clang/test/ExtractAPI/objc_property.m
@@ -11,7 +11,7 @@ @protocol Protocol
@interface Interface
@property(class) int myInterfaceTypeProp;
-// CHECk-DAG: "!testRelLabel": "memberOf $ c:objc(cs)Interface(cpy)myInterfaceTypeProp $ c:objc(cs)Interface"
+// CHECK-DAG: "!testRelLabel": "memberOf $ c:objc(cs)Interface(cpy)myInterfaceTypeProp $ c:objc(cs)Interface"
@property int myInterfaceInstanceProp;
// CHECK-DAG: "!testRelLabel": "memberOf $ c:objc(cs)Interface(py)myInterfaceInstanceProp $ c:objc(cs)Interface"
@end
diff --git a/llvm/test/CodeGen/AArch64/fpimm.ll b/llvm/test/CodeGen/AArch64/fpimm.ll
index b92bb4245c7f3..e2944243338f5 100644
--- a/llvm/test/CodeGen/AArch64/fpimm.ll
+++ b/llvm/test/CodeGen/AArch64/fpimm.ll
@@ -38,7 +38,7 @@ define void @check_double() {
; 64-bit ORR followed by MOVK.
; CHECK-DAG: mov [[XFP0:x[0-9]+]], #1082331758844
; CHECK-DAG: movk [[XFP0]], #64764, lsl #16
-; CHECk-DAG: fmov {{d[0-9]+}}, [[XFP0]]
+; CHECK-DAG: fmov {{d[0-9]+}}, [[XFP0]]
%newval3 = fadd double %val, 0xFCFCFC00FC
store volatile double %newval3, ptr @varf64
diff --git a/llvm/test/CodeGen/ARM/shifter_operand.ll b/llvm/test/CodeGen/ARM/shifter_operand.ll
index bf2e8aa911c64..835c8b744ae98 100644
--- a/llvm/test/CodeGen/ARM/shifter_operand.ll
+++ b/llvm/test/CodeGen/ARM/shifter_operand.ll
@@ -121,7 +121,7 @@ define i32 @test_orr_extract_from_mul_1(i32 %x, i32 %y) {
; CHECK-THUMB-NEXT: orrs r0, r1
; CHECK-THUMB-NEXT: bx lr
entry:
-; CHECk-THUMB: orrs r0, r1
+; CHECK-THUMB: orrs r0, r1
%mul = mul i32 %y, 63767
%or = or i32 %mul, %x
ret i32 %or
diff --git a/llvm/test/CodeGen/ARM/sxt_rot.ll b/llvm/test/CodeGen/ARM/sxt_rot.ll
index e9649c7a7fd9a..013d0563246d7 100644
--- a/llvm/test/CodeGen/ARM/sxt_rot.ll
+++ b/llvm/test/CodeGen/ARM/sxt_rot.ll
@@ -22,7 +22,7 @@ define signext i8 @test1(i32 %A) {
; CHECK-V7: @ %bb.0:
; CHECK-V7-NEXT: sbfx r0, r0, #8, #8
; CHECK-V7-NEXT: bx lr
-; CHECk-V7: sbfx r0, r0, #8, #8
+; CHECK-V7: sbfx r0, r0, #8, #8
%B = lshr i32 %A, 8
%C = shl i32 %A, 24
%D = or i32 %B, %C
diff --git a/llvm/test/CodeGen/Thumb2/LowOverheadLoops/branch-targets.ll b/llvm/test/CodeGen/Thumb2/LowOverheadLoops/branch-targets.ll
index 165e73c2e8827..680d9e02a5c5c 100644
--- a/llvm/test/CodeGen/Thumb2/LowOverheadLoops/branch-targets.ll
+++ b/llvm/test/CodeGen/Thumb2/LowOverheadLoops/branch-targets.ll
@@ -406,7 +406,7 @@ for.cond.cleanup:
; CHECK-MID: tB %bb.1
; CHECK-MID: bb.1.while.body:
; CHECK-MID: renamable $lr = t2LoopEndDec killed renamable $lr, %bb.1
-; CHECk-MID: tB %bb.2
+; CHECK-MID: tB %bb.2
; CHECK-MID: bb.2.while.end:
define void @check_negated_xor_wls(ptr nocapture %a, ptr nocapture readonly %b, i32 %N) {
entry:
@@ -440,7 +440,7 @@ while.end:
; CHECK-MID: tB %bb.1
; CHECK-MID: bb.1.while.body:
; CHECK-MID: renamable $lr = t2LoopEndDec killed renamable $lr, %bb.1
-; CHECk-MID: tB %bb.2
+; CHECK-MID: tB %bb.2
; CHECK-MID: bb.2.while.end:
define void @check_negated_cmp_wls(ptr nocapture %a, ptr nocapture readonly %b, i32 %N) {
entry:
@@ -474,7 +474,7 @@ while.end:
; CHECK-MID: tB %bb.1
; CHECK-MID: bb.1.while.body:
; CHECK-MID: renamable $lr = t2LoopEndDec killed renamable $lr, %bb.1
-; CHECk-MID: tB %bb.2
+; CHECK-MID: tB %bb.2
; CHECK-MID: bb.2.while.end:
define void @check_negated_reordered_wls(ptr nocapture %a, ptr nocapture readonly %b, i32 %N) {
entry:
diff --git a/llvm/test/Instrumentation/MemorySanitizer/X86/msan_x86_bts_asm.ll b/llvm/test/Instrumentation/MemorySanitizer/X86/msan_x86_bts_asm.ll
index 5eeba197c7632..925fe7f279722 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/X86/msan_x86_bts_asm.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/X86/msan_x86_bts_asm.ll
@@ -74,9 +74,9 @@ if.else: ; preds = %entry
; CHECK: call void asm "btsq $2, $1; setc $0"
; Calculating the shadow offset of %bit.
-; CHECKz: [[PTR:%.*]] = ptrtoint {{.*}} %bit to i64
-; CHECKz: [[SH_NUM:%.*]] = xor i64 [[PTR]]
-; CHECKz: [[SHADOW:%.*]] = inttoptr i64 [[SH_NUM]] {{.*}}
+; CHECK: [[PTR:%.*]] = ptrtoint {{.*}} %bit to i64
+; CHECK: [[SH_NUM:%.*]] = xor i64 [[PTR]]
+; CHECK: [[SHADOW:%.*]] = inttoptr i64 [[SH_NUM]] {{.*}}
; CHECK: [[META:%.*]] = call {{.*}} @__msan_metadata_ptr_for_load_1(ptr %bit)
; CHECK: [[SHADOW:%.*]] = extractvalue { ptr, ptr } [[META]], 0
diff --git a/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt b/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt
index e1ba009f3c4c8..9708821affae0 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt
@@ -39,7 +39,7 @@
0x04 0x11 0x14 0x9b # CHECK: bal 21104
# The encode/decode functions are not inverses of each other.
0x18 0x02 0x01 0x4d # CHECK: blezalc $2, 1336
-0x18 0x02 0xff 0xfa # CHECk: blezalc $2, -20
+0x18 0x02 0xff 0xfa # CHECK: blezalc $2, -20
# The encode/decode functions are not inverses of each other in the immediate case.
0x18 0x42 0x01 0x4d # CHECK: bgezalc $2, 1336
0x18 0x42 0xff 0xfa # CHECK: bgezalc $2, -20
@@ -162,13 +162,13 @@
0x49 0xc8 0x0d 0x43 # CHECK: ldc2 $8, -701($1)
0x49 0xf4 0x92 0x75 # CHECK: sdc2 $20, 629($18)
0x58 0x05 0x00 0x40 # CHECK: blezc $5, 260
-0x58 0x05 0xff 0xfa # CHECk: blezc $5, -20
+0x58 0x05 0xff 0xfa # CHECK: blezc $5, -20
0x58 0x43 0x00 0x40 # CHECK: bgec $2, $3, 260
0x58 0x43 0xff 0xfa # CHECK: bgec $2, $3, -20
0x58 0xa5 0x00 0x40 # CHECK: bgezc $5, 260
0x58 0xa5 0xff 0xfa # CHECK: bgezc $5, -20
0x5c 0x05 0x00 0x40 # CHECK: bgtzc $5, 260
-0x5c 0x05 0xff 0xfa # CHECk: bgtzc $5, -20
+0x5c 0x05 0xff 0xfa # CHECK: bgtzc $5, -20
0x5c 0xa5 0x00 0x40 # CHECK: bltzc $5, 260
0x5c 0xa5 0xff 0xfa # CHECK: bltzc $5, -20
0x5c 0xa6 0x00 0x40 # CHECK: bltc $5, $6, 260
diff --git a/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt b/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
index 0030e51d6c238..28cd1619e80ad 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
@@ -56,7 +56,7 @@
0x04 0x7e 0xab 0xcd # CHECK: dati $3, $3, 43981
# The encode/decode functions are not inverses of each other in the immediate case.
0x18 0x02 0x01 0x4d # CHECK: blezalc $2, 1336
-0x18 0x02 0xff 0xfa # CHECk: blezalc $2, -20
+0x18 0x02 0xff 0xfa # CHECK: blezalc $2, -20
# The encode/decode functions are not inverses of each other in the immediate case.
0x18 0x42 0x01 0x4d # CHECK: bgezalc $2, 1336
0x18 0x42 0xff 0xfa # CHECK: bgezalc $2, -20
@@ -181,13 +181,13 @@
0x49 0xc8 0x0d 0x43 # CHECK: ldc2 $8, -701($1)
0x49 0xf4 0x92 0x75 # CHECK: sdc2 $20, 629($18)
0x58 0x05 0x00 0x40 # CHECK: blezc $5, 260
-0x58 0x05 0xff 0xfa # CHECk: blezc $5, -20
+0x58 0x05 0xff 0xfa # CHECK: blezc $5, -20
0x58 0x43 0x00 0x40 # CHECK: bgec $2, $3, 260
0x58 0x43 0xff 0xfa # CHECK: bgec $2, $3, -20
0x58 0xa5 0x00 0x40 # CHECK: bgezc $5, 260
0x58 0xa5 0xff 0xfa # CHECK: bgezc $5, -20
0x5c 0x05 0x00 0x40 # CHECK: bgtzc $5, 260
-0x5c 0x05 0xff 0xfa # CHECk: bgtzc $5, -20
+0x5c 0x05 0xff 0xfa # CHECK: bgtzc $5, -20
0x5c 0xa5 0x00 0x40 # CHECK: bltzc $5, 260
0x5c 0xa5 0xff 0xfa # CHECK: bltzc $5, -20
0x5c 0xa6 0x00 0x40 # CHECK: bltc $5, $6, 260
diff --git a/llvm/test/MC/Mips/macro-rem.s b/llvm/test/MC/Mips/macro-rem.s
index 40812949664d6..1f10a5392c07f 100644
--- a/llvm/test/MC/Mips/macro-rem.s
+++ b/llvm/test/MC/Mips/macro-rem.s
@@ -95,7 +95,7 @@
# CHECK-NOTRAP: bnez $6, $tmp2 # encoding: [A,A,0xc0,0x14]
# CHECK-NOTRAP: div $zero, $5, $6 # encoding: [0x1a,0x00,0xa6,0x00]
# CHECK-NOTRAP: break 7 # encoding: [0x0d,0x00,0x07,0x00]
-# CHECk-NOTRAP: $tmp2
+# CHECK-NOTRAP: $tmp2
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-NOTRAP: bne $6, $1, $tmp3 # encoding: [A,A,0xc1,0x14]
# CHECK-NOTRAP: lui $1, 32768 # encoding: [0x00,0x80,0x01,0x3c]
diff --git a/llvm/test/Transforms/Coroutines/coro-debug-coro-frame.ll b/llvm/test/Transforms/Coroutines/coro-debug-coro-frame.ll
index 2978f85be2385..37fb9fea77044 100644
--- a/llvm/test/Transforms/Coroutines/coro-debug-coro-frame.ll
+++ b/llvm/test/Transforms/Coroutines/coro-debug-coro-frame.ll
@@ -39,7 +39,7 @@
; CHECK-DAG: ![[UNALIGNED_UNKNOWN]] = !DIDerivedType(tag: DW_TAG_member, name: "_6",{{.*}}baseType: ![[UNALIGNED_UNKNOWN_BASE:[0-9]+]], size: 9
; CHECK-DAG: ![[UNALIGNED_UNKNOWN_BASE]] = !DICompositeType(tag: DW_TAG_array_type, baseType: ![[UNKNOWN_TYPE_BASE]], size: 16,{{.*}} elements: ![[UNALIGNED_UNKNOWN_ELEMENTS:[0-9]+]])
; CHECK-DAG: ![[UNALIGNED_UNKNOWN_ELEMENTS]] = !{![[UNALIGNED_UNKNOWN_SUBRANGE:[0-9]+]]}
-; CHECk-DAG: ![[UNALIGNED_UNKNOWN_SUBRANGE]] = !DISubrange(count: 2, lowerBound: 0)
+; CHECK-DAG: ![[UNALIGNED_UNKNOWN_SUBRANGE]] = !DISubrange(count: 2, lowerBound: 0)
; CHECK-DAG: ![[STRUCT]] = !DIDerivedType(tag: DW_TAG_member, name: "struct_big_structure_7", scope: ![[FRAME_TYPE]], file: ![[FILE]], line: [[PROMISE_VAR_LINE]], baseType: ![[STRUCT_BASE:[0-9]+]]
; CHECK-DAG: ![[STRUCT_BASE]] = !DICompositeType(tag: DW_TAG_structure_type, name: "struct_big_structure"{{.*}}, align: 64, flags: DIFlagArtificial, elements: ![[STRUCT_ELEMENTS:[0-9]+]]
; CHECK-DAG: ![[STRUCT_ELEMENTS]] = !{![[MEM_TYPE:[0-9]+]]}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/nontemporal-load-store.ll b/llvm/test/Transforms/LoopVectorize/AArch64/nontemporal-load-store.ll
index 75f03c7b1a699..c7edf9bdfaf6b 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/nontemporal-load-store.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/nontemporal-load-store.ll
@@ -259,7 +259,7 @@ for.cond.cleanup: ; preds = %for.body
define i4 @test_i4_load(ptr %ddst) {
; CHECK-LABEL: define i4 @test_i4_load
; CHECK-NOT: vector.body:
-; CHECk: ret i4 %{{.*}}
+; CHECK: ret i4 %{{.*}}
;
entry:
br label %for.body
@@ -282,7 +282,7 @@ define i8 @test_load_i8(ptr %ddst) {
; CHECK-LABEL: @test_load_i8(
; CHECK: vector.body:
; CHECK: load <4 x i8>, ptr {{.*}}, align 1, !nontemporal !0
-; CHECk: ret i8 %{{.*}}
+; CHECK: ret i8 %{{.*}}
;
entry:
br label %for.body
@@ -305,7 +305,7 @@ define half @test_half_load(ptr %ddst) {
; CHECK-LABEL: @test_half_load
; CHECK-LABEL: vector.body:
; CHECK: load <4 x half>, ptr {{.*}}, align 2, !nontemporal !0
-; CHECk: ret half %{{.*}}
+; CHECK: ret half %{{.*}}
;
entry:
br label %for.body
@@ -328,7 +328,7 @@ define i16 @test_i16_load(ptr %ddst) {
; CHECK-LABEL: @test_i16_load
; CHECK-LABEL: vector.body:
; CHECK: load <4 x i16>, ptr {{.*}}, align 2, !nontemporal !0
-; CHECk: ret i16 %{{.*}}
+; CHECK: ret i16 %{{.*}}
;
entry:
br label %for.body
@@ -351,7 +351,7 @@ define i32 @test_i32_load(ptr %ddst) {
; CHECK-LABEL: @test_i32_load
; CHECK-LABEL: vector.body:
; CHECK: load <4 x i32>, ptr {{.*}}, align 4, !nontemporal !0
-; CHECk: ret i32 %{{.*}}
+; CHECK: ret i32 %{{.*}}
;
entry:
br label %for.body
@@ -373,7 +373,7 @@ for.cond.cleanup: ; preds = %for.body
define i33 @test_i33_load(ptr %ddst) {
; CHECK-LABEL: @test_i33_load
; CHECK-NOT: vector.body:
-; CHECk: ret i33 %{{.*}}
+; CHECK: ret i33 %{{.*}}
;
entry:
br label %for.body
@@ -395,7 +395,7 @@ for.cond.cleanup: ; preds = %for.body
define i40 @test_i40_load(ptr %ddst) {
; CHECK-LABEL: @test_i40_load
; CHECK-NOT: vector.body:
-; CHECk: ret i40 %{{.*}}
+; CHECK: ret i40 %{{.*}}
;
entry:
br label %for.body
@@ -418,7 +418,7 @@ define i64 @test_i64_load(ptr %ddst) {
; CHECK-LABEL: @test_i64_load
; CHECK-LABEL: vector.body:
; CHECK: load <4 x i64>, ptr {{.*}}, align 4, !nontemporal !0
-; CHECk: ret i64 %{{.*}}
+; CHECK: ret i64 %{{.*}}
;
entry:
br label %for.body
@@ -441,7 +441,7 @@ define double @test_double_load(ptr %ddst) {
; CHECK-LABEL: @test_double_load
; CHECK-LABEL: vector.body:
; CHECK: load <4 x double>, ptr {{.*}}, align 4, !nontemporal !0
-; CHECk: ret double %{{.*}}
+; CHECK: ret double %{{.*}}
;
entry:
br label %for.body
@@ -464,7 +464,7 @@ define i128 @test_i128_load(ptr %ddst) {
; CHECK-LABEL: @test_i128_load
; CHECK-LABEL: vector.body:
; CHECK: load <4 x i128>, ptr {{.*}}, align 4, !nontemporal !0
-; CHECk: ret i128 %{{.*}}
+; CHECK: ret i128 %{{.*}}
;
entry:
br label %for.body
@@ -486,7 +486,7 @@ for.cond.cleanup: ; preds = %for.body
define i256 @test_256_load(ptr %ddst) {
; CHECK-LABEL: @test_256_load
; CHECK-NOT: vector.body:
-; CHECk: ret i256 %{{.*}}
+; CHECK: ret i256 %{{.*}}
;
entry:
br label %for.body
diff --git a/llvm/test/tools/llvm-cov/Inputs/binary-formats.canonical.json b/llvm/test/tools/llvm-cov/Inputs/binary-formats.canonical.json
index ce13fc2ff6e34..33c517da91b5e 100644
--- a/llvm/test/tools/llvm-cov/Inputs/binary-formats.canonical.json
+++ b/llvm/test/tools/llvm-cov/Inputs/binary-formats.canonical.json
@@ -29,7 +29,7 @@ CHECK-SAME: {"branches":{"count":0,"covered":0,"notcovered":0,"percent":0},
CHECK-SAME: "functions":{"count":1,"covered":1,"percent":100},
CHECK-SAME: "instantiations":{"count":1,"covered":1,"percent":100},
CHECK-SAME: "lines":{"count":1,"covered":1,"percent":100},
-CHECk-SAME: "mcdc":{"count":0,"covered":0,"notcovered":0,"percent":0},
+CHECK-SAME: "mcdc":{"count":0,"covered":0,"notcovered":0,"percent":0},
CHECK-SAME: "regions":{"count":1,"covered":1,"notcovered":0,"percent":100}}}
CHECK-SAME: ],
CHECK-SAME: "type":"llvm.coverage.json.export"
diff --git a/mlir/test/Conversion/BufferizationToMemRef/bufferization-to-memref.mlir b/mlir/test/Conversion/BufferizationToMemRef/bufferization-to-memref.mlir
index 1eb387ce0e5b7..f58a2afa1a896 100644
--- a/mlir/test/Conversion/BufferizationToMemRef/bufferization-to-memref.mlir
+++ b/mlir/test/Conversion/BufferizationToMemRef/bufferization-to-memref.mlir
@@ -79,7 +79,7 @@ func.func @conversion_dealloc_simple(%arg0: memref<2xf32>, %arg1: i1) {
return
}
-// CHECk: scf.if [[ARG1]] {
-// CHECk-NEXT: memref.dealloc [[ARG0]] : memref<2xf32>
-// CHECk-NEXT: }
-// CHECk-NEXT: return
+// CHECK: scf.if [[ARG1]] {
+// CHECK-NEXT: memref.dealloc [[ARG0]] : memref<2xf32>
+// CHECK-NEXT: }
+// CHECK-NEXT: return
diff --git a/mlir/test/Dialect/Bufferization/Transforms/lower-deallocations-func.mlir b/mlir/test/Dialect/Bufferization/Transforms/lower-deallocations-func.mlir
index 03cf10aa0c05b..3de3a6a693cfb 100644
--- a/mlir/test/Dialect/Bufferization/Transforms/lower-deallocations-func.mlir
+++ b/mlir/test/Dialect/Bufferization/Transforms/lower-deallocations-func.mlir
@@ -9,10 +9,10 @@ func.func @conversion_dealloc_simple(%arg0: memref<2xf32>, %arg1: i1) {
return
}
-// CHECk: scf.if [[ARG1]] {
-// CHECk-NEXT: memref.dealloc [[ARG0]] : memref<2xf32>
-// CHECk-NEXT: }
-// CHECk-NEXT: return
+// CHECK: scf.if [[ARG1]] {
+// CHECK-NEXT: memref.dealloc [[ARG0]] : memref<2xf32>
+// CHECK-NEXT: }
+// CHECK-NEXT: return
// -----
diff --git a/mlir/test/Dialect/Bufferization/Transforms/lower-deallocations.mlir b/mlir/test/Dialect/Bufferization/Transforms/lower-deallocations.mlir
index 2c69fcab08a8d..5fedd45555fcd 100644
--- a/mlir/test/Dialect/Bufferization/Transforms/lower-deallocations.mlir
+++ b/mlir/test/Dialect/Bufferization/Transforms/lower-deallocations.mlir
@@ -29,10 +29,10 @@ func.func @conversion_dealloc_simple(%arg0: memref<2xf32>, %arg1: i1) {
return
}
-// CHECk: scf.if [[ARG1]] {
-// CHECk-NEXT: memref.dealloc [[ARG0]] : memref<2xf32>
-// CHECk-NEXT: }
-// CHECk-NEXT: return
+// CHECK: scf.if [[ARG1]] {
+// CHECK-NEXT: memref.dealloc [[ARG0]] : memref<2xf32>
+// CHECK-NEXT: }
+// CHECK-NEXT: return
// -----
>From 84f6d02a9a0f22ad7f29826379002c4b8bb4a93a Mon Sep 17 00:00:00 2001
From: klensy <klensy at users.noreply.github.com>
Date: Sat, 11 May 2024 19:03:47 +0300
Subject: [PATCH 6/6] few more; something odd
---
clang/test/CodeGen/constantexpr-fneg.c | 2 +-
clang/test/CodeGen/fp-floatcontrol-pragma.cpp | 6 +++---
clang/test/CodeGenOpenCL/builtins-amdgcn.cl | 10 +++++-----
clang/test/ExtractAPI/objc_property.m | 2 +-
flang/test/Lower/Intrinsics/any.f90 | 2 +-
flang/test/Lower/Intrinsics/parity.f90 | 2 +-
.../test/Lower/OpenMP/wsloop-reduction-array.f90 | 6 +++---
.../Lower/OpenMP/wsloop-reduction-array2.f90 | 2 +-
flang/test/Lower/array.f90 | 6 +++---
flang/test/Lower/control-flow.f90 | 2 +-
flang/test/Lower/module_use.f90 | 10 +++++-----
flang/test/Lower/pause-statement.f90 | 2 +-
flang/test/Transforms/simplifyintrinsics.fir | 4 ++--
llvm/test/Assembler/bfloat.ll | 8 ++++----
.../test/CodeGen/AArch64/arm64ec-entry-thunks.ll | 2 +-
.../CodeGen/AArch64/speculation-hardening-sls.ll | 4 ++--
.../AArch64/vec3-loads-ext-trunc-stores.ll | 4 ++--
.../CodeGen/ARM/speculation-hardening-sls.ll | 2 +-
llvm/test/CodeGen/NVPTX/global-variable-big.ll | 2 +-
llvm/test/CodeGen/NVPTX/idioms.ll | 10 +++++-----
llvm/test/CodeGen/SPARC/inlineasm-bad.ll | 2 +-
llvm/test/CodeGen/SPARC/inlineasm.ll | 2 +-
llvm/test/CodeGen/X86/rot32.ll | 2 +-
.../MIR/InstrRef/single-assign-propagation.mir | 6 +++---
llvm/test/FileCheck/check-count.txt | 6 +++---
llvm/test/Transforms/Inline/AArch64/binop.ll | 16 ++++++++--------
.../SampleProfile/pseudo-probe-selectionDAG.ll | 4 ++--
.../tools/llvm-objdump/ELF/ARM/v5te-subarch.s | 2 +-
.../test/Analysis/DataFlow/test-next-access.mlir | 4 ++--
.../pdl-to-pdl-interp-matcher.mlir | 6 +++---
.../Dialect/Arith/unsigned-when-equivalent.mlir | 4 ++--
mlir/test/Dialect/GPU/barrier-elimination.mlir | 2 +-
mlir/test/Dialect/GPU/ops.mlir | 2 +-
mlir/test/Dialect/LLVMIR/nvvm.mlir | 8 ++++----
mlir/test/Dialect/Math/expand-math.mlir | 2 +-
mlir/test/Dialect/SCF/transform-ops.mlir | 2 +-
mlir/test/IR/parser.mlir | 2 +-
.../Target/LLVMIR/Import/global-variables.ll | 2 +-
mlir/test/Target/LLVMIR/llvmir-debug.mlir | 2 +-
.../CodeGen/alias_metadata_too_many_arrays.ll | 2 +-
40 files changed, 83 insertions(+), 83 deletions(-)
diff --git a/clang/test/CodeGen/constantexpr-fneg.c b/clang/test/CodeGen/constantexpr-fneg.c
index 3cd4db34f61ac..25eede7eab3fb 100644
--- a/clang/test/CodeGen/constantexpr-fneg.c
+++ b/clang/test/CodeGen/constantexpr-fneg.c
@@ -4,7 +4,7 @@
// Test case for PR45426. Make sure we do not crash while writing bitcode
// containing a simplify-able fneg constant expression.
//
-// CHECK-LABEL define i32 @main()
+// CHECK-LABEL: define{{.*}} i32 @main()
// CHECK: entry:
// CHECK-NEXT: %retval = alloca i32
// CHECK-NEXT: store i32 0, ptr %retval
diff --git a/clang/test/CodeGen/fp-floatcontrol-pragma.cpp b/clang/test/CodeGen/fp-floatcontrol-pragma.cpp
index 966eaf6053970..5861e93df5959 100644
--- a/clang/test/CodeGen/fp-floatcontrol-pragma.cpp
+++ b/clang/test/CodeGen/fp-floatcontrol-pragma.cpp
@@ -150,7 +150,7 @@ float check_precise(float x, float y) {
}
float fma_test2(float a, float b, float c) {
-// CHECK-LABEL define{{.*}} float @_Z9fma_test2fff{{.*}}
+// CHECK-LABEL: define{{.*}} float @_Z9fma_test2fff{{.*}}
#pragma float_control(precise, off)
float x = a * b + c;
//CHECK: fmuladd
@@ -158,7 +158,7 @@ float fma_test2(float a, float b, float c) {
}
float fma_test1(float a, float b, float c) {
-// CHECK-LABEL define{{.*}} float @_Z9fma_test1fff{{.*}}
+// CHECK-LABEL: define{{.*}} float @_Z9fma_test1fff{{.*}}
#pragma float_control(precise, on)
float x = a * b + c;
//CHECK: fmuladd
@@ -181,7 +181,7 @@ float test_OperatorCall() {
return add(1.0f, 2.0f);
//CHECK: llvm.experimental.constrained.fadd{{.*}}fpexcept.strict
}
-// CHECK-LABEL define{{.*}} float {{.*}}test_OperatorCall{{.*}}
+// CHECK-LABEL: define{{.*}} float {{.*}}test_OperatorCall{{.*}}
#if FENV_ON
#pragma STDC FENV_ACCESS ON
diff --git a/clang/test/CodeGenOpenCL/builtins-amdgcn.cl b/clang/test/CodeGenOpenCL/builtins-amdgcn.cl
index c2ef9ea947e93..9df38c8d90c28 100644
--- a/clang/test/CodeGenOpenCL/builtins-amdgcn.cl
+++ b/clang/test/CodeGenOpenCL/builtins-amdgcn.cl
@@ -812,7 +812,7 @@ kernel void test_s_setreg(uint val) {
__builtin_amdgcn_s_setreg(8193, val);
}
-// CHECK-LABEL test_atomic_inc_dec(
+// CHECK-LABEL: test_atomic_inc_dec(
void test_atomic_inc_dec(local uint *lptr, global uint *gptr, uint val) {
uint res;
@@ -832,14 +832,14 @@ void test_atomic_inc_dec(local uint *lptr, global uint *gptr, uint val) {
res = __builtin_amdgcn_atomic_dec32((volatile global uint*)gptr, val, __ATOMIC_SEQ_CST, "");
}
-// CHECK-LABEL test_wavefrontsize(
+// CHECK-LABEL: test_wavefrontsize(
unsigned test_wavefrontsize() {
// CHECK: call i32 @llvm.amdgcn.wavefrontsize()
return __builtin_amdgcn_wavefrontsize();
}
-// CHECK-LABEL test_flt_rounds(
+// CHECK-LABEL: test_flt_rounds(
unsigned test_flt_rounds() {
// CHECK: call i32 @llvm.get.rounding()
@@ -851,13 +851,13 @@ unsigned test_flt_rounds() {
return mode;
}
-// CHECK-LABEL test_get_fpenv(
+// CHECK-LABEL: test_get_fpenv(
unsigned long test_get_fpenv() {
// CHECK: call i64 @llvm.get.fpenv.i64()
return __builtin_amdgcn_get_fpenv();
}
-// CHECK-LABEL test_set_fpenv(
+// CHECK-LABEL: test_set_fpenv(
void test_set_fpenv(unsigned long env) {
// CHECK: call void @llvm.set.fpenv.i64(i64 %[[ENV:.+]])
__builtin_amdgcn_set_fpenv(env);
diff --git a/clang/test/ExtractAPI/objc_property.m b/clang/test/ExtractAPI/objc_property.m
index 68869295f8c04..0c0b17c9c000f 100644
--- a/clang/test/ExtractAPI/objc_property.m
+++ b/clang/test/ExtractAPI/objc_property.m
@@ -20,7 +20,7 @@ @interface Interface (Category) <Protocol>
@property(class) int myCategoryTypeProp;
// CHECK-DAG: "!testRelLabel": "memberOf $ c:objc(cs)Interface(cpy)myCategoryTypeProp $ c:objc(cs)Interface"
@property int myCategoryInstanceProp;
-// CHECK-DAG "!testRelLabel": "memberOf $ c:objc(cs)Interface(py)myCategoryInstanceProp $ c:objc(cs)Interface"
+// CHECK-DAG: "!testRelLabel": "memberOf $ c:objc(cs)Interface(py)myCategoryInstanceProp $ c:objc(cs)Interface"
@end
// expected-no-diagnostics
diff --git a/flang/test/Lower/Intrinsics/any.f90 b/flang/test/Lower/Intrinsics/any.f90
index 1ea22d9706744..896001b2e031a 100644
--- a/flang/test/Lower/Intrinsics/any.f90
+++ b/flang/test/Lower/Intrinsics/any.f90
@@ -27,5 +27,5 @@ subroutine any_test2(mask, d, rslt)
! CHECK: %[[r1:.*]] = fir.call @_FortranAAnyDim(%[[a6:.*]], %[[a7:.*]], %[[a1:.*]], %{{.*}}, %{{.*}}) {{.*}}: (!fir.ref<!fir.box<none>>, !fir.box<none>, i32, !fir.ref<i8>, i32) -> none
! CHECK-DAG: %[[a10:.*]] = fir.load %[[a0:.*]] : !fir.ref<!fir.box<!fir.heap<!fir.array<?x!fir.logical<4>>>>>
! CHECK-DAG: %[[a12:.*]] = fir.box_addr %[[a10:.*]] : (!fir.box<!fir.heap<!fir.array<?x!fir.logical<4>>>>) -> !fir.heap<!fir.array<?x!fir.logical<4>>>
-! CHECK-DAG fir.freemem %[[a12:.*]]
+! CHECK-DAG: fir.freemem %[[a12:.*]]
end subroutine
diff --git a/flang/test/Lower/Intrinsics/parity.f90 b/flang/test/Lower/Intrinsics/parity.f90
index 6771b7d703275..32a2ea2e51d31 100644
--- a/flang/test/Lower/Intrinsics/parity.f90
+++ b/flang/test/Lower/Intrinsics/parity.f90
@@ -28,5 +28,5 @@ subroutine parity_test2(mask, d, rslt)
! CHECK: %[[r1:.*]] = fir.call @_FortranAParityDim(%[[a6:.*]], %[[a7:.*]], %[[a1:.*]], %{{.*}}, %{{.*}}) {{.*}}: (!fir.ref<!fir.box<none>>, !fir.box<none>, i32, !fir.ref<i8>, i32) -> none
! CHECK-DAG: %[[a10:.*]] = fir.load %[[a0:.*]] : !fir.ref<!fir.box<!fir.heap<!fir.array<?x!fir.logical<4>>>>>
! CHECK-DAG: %[[a12:.*]] = fir.box_addr %[[a10:.*]] : (!fir.box<!fir.heap<!fir.array<?x!fir.logical<4>>>>) -> !fir.heap<!fir.array<?x!fir.logical<4>>>
- ! CHECK-DAG fir.freemem %[[a12:.*]]
+ ! CHECK-DAG: fir.freemem %[[a12:.*]]
end subroutine parity_test2
diff --git a/flang/test/Lower/OpenMP/wsloop-reduction-array.f90 b/flang/test/Lower/OpenMP/wsloop-reduction-array.f90
index 7aecf870cf800..5f65d24531867 100644
--- a/flang/test/Lower/OpenMP/wsloop-reduction-array.f90
+++ b/flang/test/Lower/OpenMP/wsloop-reduction-array.f90
@@ -14,7 +14,7 @@ program reduce
print *,r
end program
-! CHECK-LABEL omp.declare_reduction @add_reduction_byref_box_2xi32 : !fir.ref<!fir.box<!fir.array<2xi32>>> init {
+! CHECK-LABEL: omp.declare_reduction @add_reduction_byref_box_2xi32 : !fir.ref<!fir.box<!fir.array<2xi32>>> init {
! CHECK: ^bb0(%[[VAL_0:.*]]: !fir.ref<!fir.box<!fir.array<2xi32>>>):
! CHECK: %[[VAL_2:.*]] = arith.constant 0 : i32
! CHECK: %[[VAL_3:.*]] = fir.load %[[VAL_0]] : !fir.ref<!fir.box<!fir.array<2xi32>>>
@@ -32,7 +32,7 @@ program reduce
! CHECK: fir.store %[[VAL_7]] to %[[VAL_8]] : !fir.ref<!fir.box<!fir.array<2xi32>>>
! CHECK: omp.yield(%[[VAL_8]] : !fir.ref<!fir.box<!fir.array<2xi32>>>)
-! CHECK-LABEL } combiner {
+! CHECK-LABEL: } combiner {
! CHECK: ^bb0(%[[VAL_0:.*]]: !fir.ref<!fir.box<!fir.array<2xi32>>>, %[[VAL_1:.*]]: !fir.ref<!fir.box<!fir.array<2xi32>>>):
! CHECK: %[[VAL_2:.*]] = fir.load %[[VAL_0]] : !fir.ref<!fir.box<!fir.array<2xi32>>>
! CHECK: %[[VAL_3:.*]] = fir.load %[[VAL_1]] : !fir.ref<!fir.box<!fir.array<2xi32>>>
@@ -63,7 +63,7 @@ program reduce
! CHECK: omp.yield
! CHECK: }
-! CHECK-LABEL func.func @_QQmain() attributes {fir.bindc_name = "reduce"} {
+! CHECK-LABEL: func.func @_QQmain() attributes {fir.bindc_name = "reduce"} {
! CHECK: %[[VAL_0:.*]] = fir.address_of(@_QFEi) : !fir.ref<i32>
! CHECK: %[[VAL_1:.*]]:2 = hlfir.declare %[[VAL_0]] {uniq_name = "_QFEi"} : (!fir.ref<i32>) -> (!fir.ref<i32>, !fir.ref<i32>)
! CHECK: %[[VAL_2:.*]] = fir.address_of(@_QFEr) : !fir.ref<!fir.array<2xi32>>
diff --git a/flang/test/Lower/OpenMP/wsloop-reduction-array2.f90 b/flang/test/Lower/OpenMP/wsloop-reduction-array2.f90
index d1d8a2c599444..fcfd5bbf6aca6 100644
--- a/flang/test/Lower/OpenMP/wsloop-reduction-array2.f90
+++ b/flang/test/Lower/OpenMP/wsloop-reduction-array2.f90
@@ -14,7 +14,7 @@ program reduce
print *,r
end program
-! CHECK-LABEL omp.declare_reduction @add_reduction_byref_box_2xi32 : !fir.ref<!fir.box<!fir.array<2xi32>>> init {
+! CHECK-LABEL: omp.declare_reduction @add_reduction_byref_box_2xi32 : !fir.ref<!fir.box<!fir.array<2xi32>>> init {
! CHECK: ^bb0(%[[VAL_0:.*]]: !fir.ref<!fir.box<!fir.array<2xi32>>>):
! CHECK: %[[VAL_2:.*]] = arith.constant 0 : i32
! CHECK: %[[VAL_3:.*]] = fir.load %[[VAL_0]] : !fir.ref<!fir.box<!fir.array<2xi32>>>
diff --git a/flang/test/Lower/array.f90 b/flang/test/Lower/array.f90
index a2ab3d1384955..898f700727465 100644
--- a/flang/test/Lower/array.f90
+++ b/flang/test/Lower/array.f90
@@ -96,7 +96,7 @@ subroutine s(i,j,k,ii,jj,kk,a1,a2,a3,a4,a5,a6,a7)
end subroutine s
-! CHECK-LABEL range
+! CHECK-LABEL: range
subroutine range()
! Compile-time initalized arrays
integer, dimension(10) :: a0
@@ -132,14 +132,14 @@ end subroutine range
! c0 array constructor
! CHECK: fir.global internal @_QQro.2x3xz4.{{.*}}(dense<{{\[}}[(1.000000e+00,1.500000e+00), (2.000000e+00,2.500000e+00)], [(3.000000e+00,3.500000e+00), (4.000000e+00,4.500000e+00)], [(5.000000e+00,5.500000e+00), (6.000000e+00,6.500000e+00)]]> : tensor<3x2xcomplex<f32>>) constant : !fir.array<2x3x!fir.complex<4>>
-! CHECK-LABEL rangeGlobal
+! CHECK-LABEL: rangeGlobal
subroutine rangeGlobal()
! CHECK: fir.global internal @_QFrangeglobal{{.*}}(dense<[1, 1, 2, 2, 3, 3]> : tensor<6xi32>) : !fir.array<6xi32>
integer, dimension(6) :: a0 = (/ 1, 1, 2, 2, 3, 3 /)
end subroutine rangeGlobal
-! CHECK-LABEL hugeGlobal
+! CHECK-LABEL: hugeGlobal
subroutine hugeGlobal()
integer, parameter :: D = 500
integer, dimension(D, D) :: a
diff --git a/flang/test/Lower/control-flow.f90 b/flang/test/Lower/control-flow.f90
index d605aaf0a9d94..ef66c9e22c8d1 100644
--- a/flang/test/Lower/control-flow.f90
+++ b/flang/test/Lower/control-flow.f90
@@ -3,7 +3,7 @@
! RUN: bbc -emit-fir -hlfir=false %s -o - | FileCheck %s
! check the lowering of a RETURN in the body of a SUBROUTINE
-! CHECK-LABEL one
+! CHECK-LABEL: one
subroutine one(a,b,c)
d = 1.0
if (a .ne. b) then
diff --git a/flang/test/Lower/module_use.f90 b/flang/test/Lower/module_use.f90
index 21458bb488430..135fba7d5a5f3 100644
--- a/flang/test/Lower/module_use.f90
+++ b/flang/test/Lower/module_use.f90
@@ -18,15 +18,15 @@ real function m1use()
end function
! TODO: test equivalences once front-end fix in module file is pushed.
-!! CHECK-LABEL func @_QPmodeq1use()
+!! CHECK-LABEL: func @_QPmodeq1use()
!real function modEq1use()
! use modEq1
-! ! CHECK-DAG fir.address_of(@_QMmodeq1Ex1) : !fir.ref<tuple<!fir.array<36xi8>, !fir.array<40xi8>>>
-! ! CHECK-DAG fir.address_of(@_QMmodeq1Ey1) : !fir.ref<tuple<!fir.array<16xi8>, !fir.array<24xi8>>>
+! ! CHECK-DAG: fir.address_of(@_QMmodeq1Ex1) : !fir.ref<tuple<!fir.array<36xi8>, !fir.array<40xi8>>>
+! ! CHECK-DAG: fir.address_of(@_QMmodeq1Ey1) : !fir.ref<tuple<!fir.array<16xi8>, !fir.array<24xi8>>>
! modEq1use = x2(1) + y1
!end function
-! CHECK-DAG fir.global @_QMmodeq1Ex1 : tuple<!fir.array<36xi8>, !fir.array<40xi8>>
-! CHECK-DAG fir.global @_QMmodeq1Ey1 : tuple<!fir.array<16xi8>, !fir.array<24xi8>>
+! CHECK-DAG: fir.global @_QMmodeq1Ex1 : tuple<!fir.array<36xi8>, !fir.array<40xi8>>
+! CHECK-DAG: fir.global @_QMmodeq1Ey1 : tuple<!fir.array<16xi8>, !fir.array<24xi8>>
! CHECK-LABEL: func @_QPmodcommon1use()
real function modCommon1Use()
diff --git a/flang/test/Lower/pause-statement.f90 b/flang/test/Lower/pause-statement.f90
index e4cba98dc8a79..f4c8f6fbc4385 100644
--- a/flang/test/Lower/pause-statement.f90
+++ b/flang/test/Lower/pause-statement.f90
@@ -1,6 +1,6 @@
! RUN: bbc %s -emit-fir --canonicalize -o - | FileCheck %s
-! CHECK-LABEL pause_test
+! CHECK-LABEL: pause_test
subroutine pause_test()
! CHECK: fir.call @_Fortran{{.*}}PauseStatement()
! CHECK-NEXT: return
diff --git a/flang/test/Transforms/simplifyintrinsics.fir b/flang/test/Transforms/simplifyintrinsics.fir
index f21776e03ded8..c9b509a0aaa3f 100644
--- a/flang/test/Transforms/simplifyintrinsics.fir
+++ b/flang/test/Transforms/simplifyintrinsics.fir
@@ -428,7 +428,7 @@ module attributes {fir.defaultkind = "a1c4d8i4l4r4", fir.kindmap = "", llvm.targ
}
// Just check that SOMETHING is being output.
-// CHECK-LABEL @sum_dim() {
+// CHECK-LABEL: @sum_dim() {
// CHECK: return
@@ -459,7 +459,7 @@ module attributes {fir.defaultkind = "a1c4d8i4l4r4", fir.kindmap = "", llvm.targ
}
// Just check that SOMETHING is being output.
-// CHECK-LABEL @sum_1d_unknown() {
+// CHECK-LABEL: @sum_1d_unknown(
// CHECK: return
// -----
diff --git a/llvm/test/Assembler/bfloat.ll b/llvm/test/Assembler/bfloat.ll
index 3a3b4c2b277db..6f935c5dac154 100644
--- a/llvm/test/Assembler/bfloat.ll
+++ b/llvm/test/Assembler/bfloat.ll
@@ -37,25 +37,25 @@ define float @check_bfloat_convert() {
ret float %tmp
}
-; ASSEM-DISASS-LABEL @snan_bfloat
+; ASSEM-DISASS-LABEL: @snan_bfloat
define bfloat @snan_bfloat() {
; ASSEM-DISASS: ret bfloat 0xR7F81
ret bfloat 0xR7F81
}
-; ASSEM-DISASS-LABEL @qnan_bfloat
+; ASSEM-DISASS-LABEL: @qnan_bfloat
define bfloat @qnan_bfloat() {
; ASSEM-DISASS: ret bfloat 0xR7FC0
ret bfloat 0xR7FC0
}
-; ASSEM-DISASS-LABEL @pos_inf_bfloat
+; ASSEM-DISASS-LABEL: @pos_inf_bfloat
define bfloat @pos_inf_bfloat() {
; ASSEM-DISASS: ret bfloat 0xR7F80
ret bfloat 0xR7F80
}
-; ASSEM-DISASS-LABEL @neg_inf_bfloat
+; ASSEM-DISASS-LABEL: @neg_inf_bfloat
define bfloat @neg_inf_bfloat() {
; ASSEM-DISASS: ret bfloat 0xRFF80
ret bfloat 0xRFF80
diff --git a/llvm/test/CodeGen/AArch64/arm64ec-entry-thunks.ll b/llvm/test/CodeGen/AArch64/arm64ec-entry-thunks.ll
index c00c9bfe127e8..5ba02539c92bb 100644
--- a/llvm/test/CodeGen/AArch64/arm64ec-entry-thunks.ll
+++ b/llvm/test/CodeGen/AArch64/arm64ec-entry-thunks.ll
@@ -1,7 +1,7 @@
; RUN: llc -mtriple=arm64ec-pc-windows-msvc < %s | FileCheck %s
define void @no_op() nounwind {
-; CHECK-LABEL .def $ientry_thunk$cdecl$v$v;
+; CHECK-LABEL: .def $ientry_thunk$cdecl$v$v;
; CHECK: .section .wowthk$aa,"xr",discard,$ientry_thunk$cdecl$v$v
; CHECK: // %bb.0:
; CHECK-NEXT: stp q6, q7, [sp, #-176]! // 32-byte Folded Spill
diff --git a/llvm/test/CodeGen/AArch64/speculation-hardening-sls.ll b/llvm/test/CodeGen/AArch64/speculation-hardening-sls.ll
index f380b2d05d863..fe08fa5642574 100644
--- a/llvm/test/CodeGen/AArch64/speculation-hardening-sls.ll
+++ b/llvm/test/CodeGen/AArch64/speculation-hardening-sls.ll
@@ -192,7 +192,7 @@ entry:
; CHECK: .Lfunc_end
}
-; HARDEN-label: __llvm_slsblr_thunk_x0:
+; HARDEN-LABEL: __llvm_slsblr_thunk_x0:
; HARDEN: mov x16, x0
; HARDEN: br x16
; ISBDSB-NEXT: dsb sy
@@ -208,7 +208,7 @@ entry:
; HARDEN-COMDAT-OFF-NOT: .hidden __llvm_slsblr_thunk_x19
; HARDEN-COMDAT-OFF-NOT: .weak __llvm_slsblr_thunk_x19
; HARDEN-COMDAT-OFF: .type __llvm_slsblr_thunk_x19, at function
-; HARDEN-label: __llvm_slsblr_thunk_x19:
+; HARDEN-LABEL: __llvm_slsblr_thunk_x19:
; HARDEN: mov x16, x19
; HARDEN: br x16
; ISBDSB-NEXT: dsb sy
diff --git a/llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll b/llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll
index b2107b7dc0f83..f13cd0d5032c0 100644
--- a/llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll
+++ b/llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll
@@ -217,7 +217,7 @@ define <4 x i32> @load_v3i8_to_4xi32_const_offset_3(ptr %src) {
}
define <4 x i32> @volatile_load_v3i8_to_4xi32(ptr %src) {
-; check-label: volatile_load_v3i8_to_4xi32:
+; check-LABEL: volatile_load_v3i8_to_4xi32:
; check: ; %bb.0:
; check-NEXT: sub sp, sp, #16
; check-NEXT: .cfi_def_cfa_offset 16
@@ -234,7 +234,7 @@ define <4 x i32> @volatile_load_v3i8_to_4xi32(ptr %src) {
; check-NEXT: add sp, sp, #16
; check-NEXT: ret
;
-; be-label: volatile_load_v3i8_to_4xi32:
+; be-LABEL: volatile_load_v3i8_to_4xi32:
; be: // %bb.0:
; be-NEXT: sub sp, sp, #16
; be-NEXT: .cfi_def_cfa_offset 16
diff --git a/llvm/test/CodeGen/ARM/speculation-hardening-sls.ll b/llvm/test/CodeGen/ARM/speculation-hardening-sls.ll
index f25d73a12246f..1f60f120dc86a 100644
--- a/llvm/test/CodeGen/ARM/speculation-hardening-sls.ll
+++ b/llvm/test/CodeGen/ARM/speculation-hardening-sls.ll
@@ -248,7 +248,7 @@ entry:
; HARDEN-COMDAT-OFF-NOT: .hidden {{__llvm_slsblr_thunk_(arm|thumb)_r5}}
; HARDEN-COMDAT-OFF-NOT: .weak {{__llvm_slsblr_thunk_(arm|thumb)_r5}}
; HARDEN-COMDAT-OFF: .type {{__llvm_slsblr_thunk_(arm|thumb)_r5}},%function
-; HARDEN-label: {{__llvm_slsblr_thunk_(arm|thumb)_r5}}:
+; HARDEN-LABEL: {{__llvm_slsblr_thunk_(arm|thumb)_r5}}:
; HARDEN: bx r5
; ISBDSB-NEXT: dsb sy
; ISBDSB-NEXT: isb
diff --git a/llvm/test/CodeGen/NVPTX/global-variable-big.ll b/llvm/test/CodeGen/NVPTX/global-variable-big.ll
index f4194df4434df..505d494ec6e51 100644
--- a/llvm/test/CodeGen/NVPTX/global-variable-big.ll
+++ b/llvm/test/CodeGen/NVPTX/global-variable-big.ll
@@ -11,7 +11,7 @@ target triple = "nvptx64-nvidia-cuda"
; CHECK: .visible .global .align 16 .b8 gv[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};
; Make sure that we do not overflow on large number of elements.
-; CHECK-LABEL large_data
+; CHECK-LABEL: large_data
; CHECK: .visible .global .align 1 .b8 large_data[4831838208]
@large_data = global [4831838208 x i8] zeroinitializer
diff --git a/llvm/test/CodeGen/NVPTX/idioms.ll b/llvm/test/CodeGen/NVPTX/idioms.ll
index e8fe47c303f92..0669d2a3717cb 100644
--- a/llvm/test/CodeGen/NVPTX/idioms.ll
+++ b/llvm/test/CodeGen/NVPTX/idioms.ll
@@ -42,7 +42,7 @@ define %struct.S16 @i32_to_2xi16(i32 noundef %in) {
%high = trunc i32 %high32 to i16
; CHECK: ld.param.u32 %[[R32:r[0-9]+]], [i32_to_2xi16_param_0];
; CHECK-DAG: cvt.u16.u32 %rs{{[0-9+]}}, %[[R32]];
-; CHECK-DAG mov.b32 {tmp, %rs{{[0-9+]}}}, %[[R32]];
+; CHECK-DAG: mov.b32 {tmp, %rs{{[0-9+]}}}, %[[R32]];
%s1 = insertvalue %struct.S16 poison, i16 %low, 0
%s = insertvalue %struct.S16 %s1, i16 %high, 1
ret %struct.S16 %s
@@ -56,7 +56,7 @@ define %struct.S16 @i32_to_2xi16_lh(i32 noundef %in) {
%low = trunc i32 %in to i16
; CHECK: ld.param.u32 %[[R32:r[0-9]+]], [i32_to_2xi16_lh_param_0];
; CHECK-DAG: cvt.u16.u32 %rs{{[0-9+]}}, %[[R32]];
-; CHECK-DAG mov.b32 {tmp, %rs{{[0-9+]}}}, %[[R32]];
+; CHECK-DAG: mov.b32 {tmp, %rs{{[0-9+]}}}, %[[R32]];
%s1 = insertvalue %struct.S16 poison, i16 %low, 0
%s = insertvalue %struct.S16 %s1, i16 %high, 1
ret %struct.S16 %s
@@ -84,7 +84,7 @@ define %struct.S32 @i64_to_2xi32(i64 noundef %in) {
%high = trunc i64 %high64 to i32
; CHECK: ld.param.u64 %[[R64:rd[0-9]+]], [i64_to_2xi32_param_0];
; CHECK-DAG: cvt.u32.u64 %r{{[0-9+]}}, %[[R64]];
-; CHECK-DAG mov.b64 {tmp, %r{{[0-9+]}}}, %[[R64]];
+; CHECK-DAG: mov.b64 {tmp, %r{{[0-9+]}}}, %[[R64]];
%s1 = insertvalue %struct.S32 poison, i32 %low, 0
%s = insertvalue %struct.S32 %s1, i32 %high, 1
ret %struct.S32 %s
@@ -114,8 +114,8 @@ define %struct.S16 @i32_to_2xi16_shr(i32 noundef %i){
%h = trunc i32 %h32 to i16
; CHECK: ld.param.u32 %[[R32:r[0-9]+]], [i32_to_2xi16_shr_param_0];
; CHECK: shr.s32 %[[R32H:r[0-9]+]], %[[R32]], 16;
-; CHECK-DAG mov.b32 {tmp, %rs{{[0-9+]}}}, %[[R32]];
-; CHECK-DAG mov.b32 {tmp, %rs{{[0-9+]}}}, %[[R32H]];
+; CHECK-DAG: mov.b32 {tmp, %rs{{[0-9+]}}}, %[[R32]];
+; CHECK-DAG: mov.b32 {tmp, %rs{{[0-9+]}}}, %[[R32H]];
%s0 = insertvalue %struct.S16 poison, i16 %l, 0
%s1 = insertvalue %struct.S16 %s0, i16 %h, 1
ret %struct.S16 %s1
diff --git a/llvm/test/CodeGen/SPARC/inlineasm-bad.ll b/llvm/test/CodeGen/SPARC/inlineasm-bad.ll
index 07eb67df6e5f7..bc85540cbc3b7 100644
--- a/llvm/test/CodeGen/SPARC/inlineasm-bad.ll
+++ b/llvm/test/CodeGen/SPARC/inlineasm-bad.ll
@@ -12,7 +12,7 @@ entry:
ret void
}
-; CHECK-label:test_twinword_error
+; CHECK-LABEL:test_twinword_error
; CHECK: error: Hi part of pair should point to an even-numbered register
; CHECK: error: (note that in some cases it might be necessary to manually bind the input/output registers instead of relying on automatic allocation)
diff --git a/llvm/test/CodeGen/SPARC/inlineasm.ll b/llvm/test/CodeGen/SPARC/inlineasm.ll
index 9817d7c6971f5..786e9f3eb1e13 100644
--- a/llvm/test/CodeGen/SPARC/inlineasm.ll
+++ b/llvm/test/CodeGen/SPARC/inlineasm.ll
@@ -144,7 +144,7 @@ entry:
ret void
}
-; CHECK-label:test_twinword
+; CHECK-LABEL:test_twinword
; CHECK: rd %asr5, %i1
; CHECK: srlx %i1, 32, %i0
diff --git a/llvm/test/CodeGen/X86/rot32.ll b/llvm/test/CodeGen/X86/rot32.ll
index d8edd31c3c06a..5590674cdee57 100644
--- a/llvm/test/CodeGen/X86/rot32.ll
+++ b/llvm/test/CodeGen/X86/rot32.ll
@@ -285,7 +285,7 @@ define i32 @xunp(ptr %p) nounwind readnone {
; BMI264-NEXT: rorxl $7, (%rdi), %eax
; BMI264-NEXT: retq
entry:
-; shld-label: xunp:
+; shld-LABEL: xunp:
; shld: shldl $25
%x = load i32, ptr %p
%a = lshr i32 %x, 7
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/single-assign-propagation.mir b/llvm/test/DebugInfo/MIR/InstrRef/single-assign-propagation.mir
index 8f43a55b34001..3649b136d3900 100644
--- a/llvm/test/DebugInfo/MIR/InstrRef/single-assign-propagation.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/single-assign-propagation.mir
@@ -55,11 +55,11 @@
## to bb.3, but not into bb.4 because of the intervening out-of-scope block.
## Disabled actual testing of this because it's just for comparison purposes.
#
-# varloc-label: bb.1:
+# varloc-LABEL: bb.1:
# varloc: DBG_VALUE
-# varloc-label: bb.2:
+# varloc-LABEL: bb.2:
## No location here because it's out-of-scope.
-# varloc-label: bb.3:
+# varloc-LABEL: bb.3:
# varloc: DBG_VALUE
#
## Common tail for 'test2' -- this is checking that the assignment of undef or
diff --git a/llvm/test/FileCheck/check-count.txt b/llvm/test/FileCheck/check-count.txt
index 31881687f78c1..85b179bde59ee 100644
--- a/llvm/test/FileCheck/check-count.txt
+++ b/llvm/test/FileCheck/check-count.txt
@@ -58,7 +58,7 @@ CHECK-CNT3-NOT: {{^}}this is duplicate
CHECK-CNT4-COUNT-5: this is duplicate
CHECK-CNT4-EMPTY:
-Many-label:
+Many-LABEL:
-many-
-many-
@@ -79,7 +79,7 @@ Many-label:
; RUN: FileCheck %s --input-file %s --check-prefix=CHECK-CNTMANY
CHECK-CNTMANY-COUNT-2: this is duplicate
-CHECK-CNTMANY-LABEL: Many-label:
+CHECK-CNTMANY-LABEL: Many-LABEL:
CHECK-CNTMANY-EMPTY:
CHECK-CNTMANY-COUNT-16: {{^}}-many-
CHECK-CNTMANY-EMPTY:
@@ -107,7 +107,7 @@ MISCOUNT2: [[@LINE-2]]:22: error: CHECK-MIS2-COUNT: expected string not found in
; RUN: | FileCheck %s --check-prefix=MISCOUNT3
CHECK-MIS3-COUNT-5: this is duplicate
CHECK-MIS3-EMPTY:
-CHECK-MIS3-LABEL: Many-label:
+CHECK-MIS3-LABEL: Many-LABEL:
CHECK-MIS3-EMPTY:
CHECK-MIS3-COUNT-160: {{^}}-many-
CHECK-MIS3-EMPTY:
diff --git a/llvm/test/Transforms/Inline/AArch64/binop.ll b/llvm/test/Transforms/Inline/AArch64/binop.ll
index 86f4c045b5687..2221afbbe8d3e 100644
--- a/llvm/test/Transforms/Inline/AArch64/binop.ll
+++ b/llvm/test/Transforms/Inline/AArch64/binop.ll
@@ -189,14 +189,14 @@ define i32 @shr(i32 %a, i32 %b) {
define i1 @outer_and1(i1 %a) {
-; check-label: @outer_and1(
+; check-LABEL: @outer_and1(
; check-NOT: call i1 @and1
%c = call i1 @and1(i1 %a, i1 false)
ret i1 %c
}
define i1 @outer_and2(i1 %a) {
-; check-label: @outer_and2(
+; check-LABEL: @outer_and2(
; check-NOT: call i1 @and1
%c = call i1 @and1(i1 %a, i1 true)
ret i1 %c
@@ -211,7 +211,7 @@ define i1 @and1(i1 %a, i1 %b) {
define i1 @outer_and3(i1 %a) {
-; check-label: @outer_and3(
+; check-LABEL: @outer_and3(
; check-NOT: call i1 @and2
%c = call i1 @and2(i1 %a)
ret i1 %c
@@ -226,14 +226,14 @@ define i1 @and2(i1 %a) {
define i1 @outer_or1(i1 %a) {
-; check-label: @outer_or1(
+; check-LABEL: @outer_or1(
; check-NOT: call i1 @or1
%c = call i1 @or1(i1 %a, i1 false)
ret i1 %c
}
define i1 @outer_or2(i1 %a) {
-; check-label: @outer_or2(
+; check-LABEL: @outer_or2(
; check-NOT: call i1 @or1
%c = call i1 @or1(i1 %a, i1 true)
ret i1 %c
@@ -248,7 +248,7 @@ define i1 @or1(i1 %a, i1 %b) {
define i1 @outer_or3(i1 %a) {
-; check-label: @outer_or3(
+; check-LABEL: @outer_or3(
; check-NOT: call i1 @or2
%c = call i1 @or2(i1 %a)
ret i1 %c
@@ -263,7 +263,7 @@ define i1 @or2(i1 %a) {
define i1 @outer_xor1(i1 %a) {
-; check-label: @outer_xor1(
+; check-LABEL: @outer_xor1(
; check-NOT: call i1 @xor
%c = call i1 @xor1(i1 %a, i1 false)
ret i1 %c
@@ -278,7 +278,7 @@ define i1 @xor1(i1 %a, i1 %b) {
define i1 @outer_xor3(i1 %a) {
-; check-label: @outer_xor3(
+; check-LABEL: @outer_xor3(
; check-NOT: call i1 @xor
%c = call i1 @xor2(i1 %a)
ret i1 %c
diff --git a/llvm/test/Transforms/SampleProfile/pseudo-probe-selectionDAG.ll b/llvm/test/Transforms/SampleProfile/pseudo-probe-selectionDAG.ll
index 5d01e78221e38..3bc18c7cdd7bf 100644
--- a/llvm/test/Transforms/SampleProfile/pseudo-probe-selectionDAG.ll
+++ b/llvm/test/Transforms/SampleProfile/pseudo-probe-selectionDAG.ll
@@ -10,7 +10,7 @@ entry:
if.end: ; preds = %entry
;; Check pseudo probes are next to each other at the beginning of this block.
-; IR-label: if.end
+; IR-LABEL: if.end
; IR: call void @llvm.pseudoprobe(i64 5116412291814990879, i64 1, i32 0, i64 -1)
; IR: call void @llvm.pseudoprobe(i64 5116412291814990879, i64 3, i32 0, i64 -1)
call void @llvm.pseudoprobe(i64 5116412291814990879, i64 1, i32 0, i64 -1)
@@ -19,7 +19,7 @@ if.end: ; preds = %entry
%2 = and i16 %1, 16
%3 = icmp eq i16 %2, 0
;; Check the load-and-cmp sequence is fold into a test instruction.
-; MIR-label: bb.1.if.end
+; MIR-LABEL: bb.1.if.end
; MIR: %[[#REG:]]:gr64 = IMPLICIT_DEF
; MIR: TEST8mi killed %[[#REG]], 1, $noreg, 0, $noreg, 16
; MIR: JCC_1
diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/v5te-subarch.s b/llvm/test/tools/llvm-objdump/ELF/ARM/v5te-subarch.s
index 771bce5023933..37271fb902b4d 100644
--- a/llvm/test/tools/llvm-objdump/ELF/ARM/v5te-subarch.s
+++ b/llvm/test/tools/llvm-objdump/ELF/ARM/v5te-subarch.s
@@ -5,6 +5,6 @@
strd:
strd r0, r1, [r2, +r3]
-@ CHECK-LABEL strd
+@ CHECK-LABEL: strd
@ CHECK: e18200f3 strd r0, r1, [r2, r3]
diff --git a/mlir/test/Analysis/DataFlow/test-next-access.mlir b/mlir/test/Analysis/DataFlow/test-next-access.mlir
index 8825c699dd130..700a23aa8bc40 100644
--- a/mlir/test/Analysis/DataFlow/test-next-access.mlir
+++ b/mlir/test/Analysis/DataFlow/test-next-access.mlir
@@ -63,7 +63,7 @@ func.func @branch(%arg0: memref<f32>, %arg1: f32, %arg2: i1) -> f32 {
return %phi : f32
}
-// CHECK-LABEL @dead_branch
+// CHECK-LABEL: @dead_branch
func.func @dead_branch(%arg0: memref<f32>, %arg1: f32) -> f32 {
// CHECK: name = "store"
// CHECK-SAME: next_access = ["unknown", ["load 2"]]
@@ -191,7 +191,7 @@ func.func @loop_cf(%arg0: memref<?xf32>, %arg1: f32, %arg2: index, %arg3: index,
return %8 : f32
}
-// CHECK-LABEL @conditional_cf
+// CHECK-LABEL: @conditional_cf
func.func @conditional_cf(%arg0: i1, %arg1: memref<f32>) {
// CHECK: name = "pre"
// CHECK-SAME: next_access = {{\[}}["then", "post"]]
diff --git a/mlir/test/Conversion/PDLToPDLInterp/pdl-to-pdl-interp-matcher.mlir b/mlir/test/Conversion/PDLToPDLInterp/pdl-to-pdl-interp-matcher.mlir
index 92afb765b5ab4..d2abaee149854 100644
--- a/mlir/test/Conversion/PDLToPDLInterp/pdl-to-pdl-interp-matcher.mlir
+++ b/mlir/test/Conversion/PDLToPDLInterp/pdl-to-pdl-interp-matcher.mlir
@@ -588,7 +588,7 @@ module @variadic_results_all {
// CHECK-DAG: %[[OPS:.*]] = pdl_interp.get_users of %[[VAL0]] : !pdl.value
// CHECK-DAG: pdl_interp.foreach %[[OP:.*]] : !pdl.operation in %[[OPS]]
// CHECK-DAG: %[[OPERANDS:.*]] = pdl_interp.get_operands of %[[OP]]
- // CHECK-DAG pdl_interp.are_equal %[[VALS]], %[[OPERANDS]] -> ^{{.*}}, ^[[CONTINUE:.*]]
+ // CHECK-DAG: pdl_interp.are_equal %[[VALS]], %[[OPERANDS]] -> ^{{.*}}, ^[[CONTINUE:.*]]
// CHECK-DAG: pdl_interp.is_not_null %[[OP]]
// CHECK-DAG: pdl_interp.check_result_count of %[[OP]] is 0
pdl.pattern @variadic_results_all : benefit(1) {
@@ -701,7 +701,7 @@ module @common_connector {
// CHECK-DAG: pdl_interp.are_equal %[[ROOTA_OP]], %[[VAL0]] : !pdl.value
// CHECK-DAG: %[[ROOTB_OP:.*]] = pdl_interp.get_operand 0 of %[[ROOTB]]
// CHECK-DAG: pdl_interp.are_equal %[[ROOTB_OP]], %[[VAL0]] : !pdl.value
- // CHECK-DAG } -> ^[[CONTA:.*]]
+ // CHECK-DAG: } -> ^[[CONTA:.*]]
pdl.pattern @common_connector : benefit(1) {
%type = type
%op = operation -> (%type, %type : !pdl.type, !pdl.type)
@@ -742,7 +742,7 @@ module @common_connector_range {
// CHECK-DAG: pdl_interp.are_equal %[[ROOTA_OPS]], %[[VALS0]] : !pdl.range<value>
// CHECK-DAG: %[[ROOTB_OPS:.*]] = pdl_interp.get_operands of %[[ROOTB]]
// CHECK-DAG: pdl_interp.are_equal %[[ROOTB_OPS]], %[[VALS0]] : !pdl.range<value>
- // CHECK-DAG } -> ^[[CONTA:.*]]
+ // CHECK-DAG: } -> ^[[CONTA:.*]]
pdl.pattern @common_connector_range : benefit(1) {
%types = types
%op = operation -> (%types, %types : !pdl.range<type>, !pdl.range<type>)
diff --git a/mlir/test/Dialect/Arith/unsigned-when-equivalent.mlir b/mlir/test/Dialect/Arith/unsigned-when-equivalent.mlir
index ce77d3d2f4251..49bd74cfe9124 100644
--- a/mlir/test/Dialect/Arith/unsigned-when-equivalent.mlir
+++ b/mlir/test/Dialect/Arith/unsigned-when-equivalent.mlir
@@ -1,6 +1,6 @@
// RUN: mlir-opt -arith-unsigned-when-equivalent %s | FileCheck %s
-// CHECK-LABEL func @not_with_maybe_overflow
+// CHECK-LABEL: func @not_with_maybe_overflow
// CHECK: arith.divsi
// CHECK: arith.ceildivsi
// CHECK: arith.floordivsi
@@ -32,7 +32,7 @@ func.func @not_with_maybe_overflow(%arg0 : i32) {
func.return
}
-// CHECK-LABEL func @yes_with_no_overflow
+// CHECK-LABEL: func @yes_with_no_overflow
// CHECK: arith.divui
// CHECK: arith.ceildivui
// CHECK: arith.divui
diff --git a/mlir/test/Dialect/GPU/barrier-elimination.mlir b/mlir/test/Dialect/GPU/barrier-elimination.mlir
index 844dc7dd6ac00..1f5b84937deb0 100644
--- a/mlir/test/Dialect/GPU/barrier-elimination.mlir
+++ b/mlir/test/Dialect/GPU/barrier-elimination.mlir
@@ -61,7 +61,7 @@ func.func @write_in_a_loop(%arg0: memref<?xf32>, %arg1: f32) attributes {__paral
return
}
-// CHECK-LABEL @read_read_write_loop
+// CHECK-LABEL: @read_read_write_loop
func.func @read_read_write_loop(%arg0: memref<?xf32>, %arg1: f32) attributes {__parallel_region_boundary_for_test} {
%c0 = arith.constant 0 : index
%c42 = arith.constant 42 : index
diff --git a/mlir/test/Dialect/GPU/ops.mlir b/mlir/test/Dialect/GPU/ops.mlir
index 511b018877476..ba7897f4e80cb 100644
--- a/mlir/test/Dialect/GPU/ops.mlir
+++ b/mlir/test/Dialect/GPU/ops.mlir
@@ -227,7 +227,7 @@ module attributes {gpu.container_module} {
gpu.return
}
- // CHECK-LABEL gpu.func @printf_test
+ // CHECK-LABEL: gpu.func @printf_test
// CHECK: (%[[ARG0:.*]]: i32)
// CHECK: gpu.printf "Value: %d" %[[ARG0]] : i32
gpu.func @printf_test(%arg0 : i32) {
diff --git a/mlir/test/Dialect/LLVMIR/nvvm.mlir b/mlir/test/Dialect/LLVMIR/nvvm.mlir
index de2904d15b647..1e12a7e5ab0f9 100644
--- a/mlir/test/Dialect/LLVMIR/nvvm.mlir
+++ b/mlir/test/Dialect/LLVMIR/nvvm.mlir
@@ -464,14 +464,14 @@ llvm.func private @mbarrier_test_wait_shared(%barrier: !llvm.ptr<3>, %token : i6
llvm.return
}
-// CHECK-LABEL : @wgmma_fence_aligned
+// CHECK-LABEL: @wgmma_fence_aligned
func.func @wgmma_fence_aligned() {
// CHECK : nvvm.wgmma.fence.aligned
nvvm.wgmma.fence.aligned
return
}
-// CHECK-LABEL : @wgmma_commit_group_sync_aligned
+// CHECK-LABEL: @wgmma_commit_group_sync_aligned
func.func @wgmma_commit_group_sync_aligned() {
// CHECK : nvvm.wgmma.commit.group.sync.aligned
nvvm.wgmma.commit.group.sync.aligned
@@ -479,7 +479,7 @@ func.func @wgmma_commit_group_sync_aligned() {
}
-// CHECK-LABEL : @wgmma_commit_group_sync_aligned
+// CHECK-LABEL: @wgmma_commit_group_sync_aligned
func.func @wgmma_wait_group_sync_aligned() {
// CHECK : nvvm.wgmma.wait.group.sync.aligned
nvvm.wgmma.wait.group.sync.aligned 0
@@ -495,7 +495,7 @@ gpu.module @module_1 [#nvvm.target<chip = "sm_90", features = "+ptx70", link = [
gpu.module @module_2 [#nvvm.target<chip = "sm_90">, #nvvm.target<chip = "sm_80">, #nvvm.target<chip = "sm_70">] {
}
-// CHECK-LABEL : nvvm.grid_constant
+// CHECK-LABEL: nvvm.grid_constant
llvm.func @kernel_func(%arg0: !llvm.ptr {llvm.byval = i32, nvvm.grid_constant}) attributes {nvvm.kernel} {
llvm.return
}
diff --git a/mlir/test/Dialect/Math/expand-math.mlir b/mlir/test/Dialect/Math/expand-math.mlir
index 3d94b55126d09..e842fd7db66d4 100644
--- a/mlir/test/Dialect/Math/expand-math.mlir
+++ b/mlir/test/Dialect/Math/expand-math.mlir
@@ -221,7 +221,7 @@ func.func @roundf_func(%a: f32) -> f32 {
// CHECK-LABEL: func @powf_func
// CHECK-SAME: ([[ARG0:%.+]]: f64, [[ARG1:%.+]]: f64)
func.func @powf_func(%a: f64, %b: f64) ->f64 {
- // CHECK-DAG = [[CST0:%.+]] = arith.constant 0.000000e+00
+ // CHECK-DAG: [[CST0:%.+]] = arith.constant 0.000000e+00
// CHECK-DAG: [[TWO:%.+]] = arith.constant 2.000000e+00
// CHECK-DAG: [[NEGONE:%.+]] = arith.constant -1.000000e+00
// CHECK-DAG: [[SQR:%.+]] = arith.mulf [[ARG0]], [[ARG0]]
diff --git a/mlir/test/Dialect/SCF/transform-ops.mlir b/mlir/test/Dialect/SCF/transform-ops.mlir
index f4b0db7fb1f92..4ac009662eb84 100644
--- a/mlir/test/Dialect/SCF/transform-ops.mlir
+++ b/mlir/test/Dialect/SCF/transform-ops.mlir
@@ -10,7 +10,7 @@
// CHECK: scf.for
// CHECK: arith.addi
//
-// CHECK-LABEL @loop_outline_op
+// CHECK-LABEL: @loop_outline_op
func.func @loop_outline_op(%arg0: index, %arg1: index, %arg2: index) {
// CHECK: scf.for
// CHECK-NOT: scf.for
diff --git a/mlir/test/IR/parser.mlir b/mlir/test/IR/parser.mlir
index 020942e7f4c11..bcc146ea0101b 100644
--- a/mlir/test/IR/parser.mlir
+++ b/mlir/test/IR/parser.mlir
@@ -597,7 +597,7 @@ func.func @funcattrwithblock() -> ()
return
}
-// CHECK-label func @funcsimplemap
+// CHECK-LABEL: func @funcsimplemap
#map_simple0 = affine_map<()[] -> (10)>
#map_simple1 = affine_map<()[s0] -> (s0)>
#map_non_simple0 = affine_map<(d0)[] -> (d0)>
diff --git a/mlir/test/Target/LLVMIR/Import/global-variables.ll b/mlir/test/Target/LLVMIR/Import/global-variables.ll
index 9d9734045988a..b6e92d586f3c1 100644
--- a/mlir/test/Target/LLVMIR/Import/global-variables.ll
+++ b/mlir/test/Target/LLVMIR/Import/global-variables.ll
@@ -36,7 +36,7 @@
; CHECK-DAG: %[[ADDR:[0-9]+]] = llvm.mlir.addressof @global_int : !llvm.ptr
; CHECK-DAG: %[[IDX:[0-9]+]] = llvm.mlir.constant(2 : i32) : i32
; CHECK-DAG: %[[GEP:[0-9]+]] = llvm.getelementptr %[[ADDR]][%[[IDX]]] : (!llvm.ptr, i32) -> !llvm.ptr
-; CHECK-DAG llvm.return %[[GEP]] : !llvm.ptr
+; CHECK-DAG: llvm.return %[[GEP]] : !llvm.ptr
@global_gep_const_expr = internal constant ptr getelementptr (i32, ptr @global_int, i32 2)
; // -----
diff --git a/mlir/test/Target/LLVMIR/llvmir-debug.mlir b/mlir/test/Target/LLVMIR/llvmir-debug.mlir
index 1f0fc969364ac..a7089b18f41c5 100644
--- a/mlir/test/Target/LLVMIR/llvmir-debug.mlir
+++ b/mlir/test/Target/LLVMIR/llvmir-debug.mlir
@@ -228,7 +228,7 @@ llvm.func @func_with_inlined_dbg_value(%arg0: i32) -> (i32) {
// CHECK-DAG: ![[LEXICAL_BLOCK_FILE:.*]] = distinct !DILexicalBlockFile(scope: ![[INNER_FUNC]], file: ![[FILE]], discriminator: 0)
// CHECK-DAG: ![[VAR_LOC0]] = !DILocalVariable(name: "a", scope: ![[OUTER_FUNC]], file: ![[FILE]]
// CHECK-DAG: ![[VAR_LOC1]] = !DILocalVariable(name: "b", scope: ![[LEXICAL_BLOCK_FILE]], file: ![[FILE]]
-// CHECK-DAG ![[LABEL]] = !DILabel(scope: ![[LEXICAL_BLOCK_FILE]], name: "label", file: ![[FILE]], line: 42)
+// CHECK-DAG: ![[LABEL]] = !DILabel(scope: ![[LEXICAL_BLOCK_FILE]], name: "label", file: ![[FILE]], line: 42)
// -----
diff --git a/polly/test/CodeGen/alias_metadata_too_many_arrays.ll b/polly/test/CodeGen/alias_metadata_too_many_arrays.ll
index 7c5ca012a3783..b9633defa0661 100644
--- a/polly/test/CodeGen/alias_metadata_too_many_arrays.ll
+++ b/polly/test/CodeGen/alias_metadata_too_many_arrays.ll
@@ -16,7 +16,7 @@
; }
; }
;
-; CHECK-LABEL @manyarrays
+; CHECK-LABEL: @manyarrays
; CHECK: load{{.*}}!alias.scope
; CHECK: store{{.*}}!alias.scope
; CHECK: load{{.*}}!alias.scope
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