[flang-commits] [flang] [flang] Add a test for fir.real debug conversion. (PR #90726)

[Abid Qadeer via flang-commits]

https://github.com/abidh created https://github.com/llvm/llvm-project/pull/90726

This is an accompanying test for the fix done in #90683. It checks that fir.real conversion works ok.

The failing fortran source in the #90683 generates fir.real type in the target-rewrite pass which caused the original issue.

>From 7755bb7f9644443791a1dddddb1ed03a063a54f0 Mon Sep 17 00:00:00 2001
From: Abid Qadeer <haqadeer at amd.com>
Date: Wed, 1 May 2024 12:41:55 +0100
Subject: [PATCH] [flang] Add a test for fir.real debug conversion.

This is an accompanying test for the fix done in #90683.
It checks that fir.real conversion works ok.

The failing fortran source in the #90683 generates fir.real type in
the target-rewrite pass which caused the original issue.
---
 flang/test/Transforms/debug-90683.fir | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)
 create mode 100644 flang/test/Transforms/debug-90683.fir

diff --git a/flang/test/Transforms/debug-90683.fir b/flang/test/Transforms/debug-90683.fir
new file mode 100644
index 00000000000000..9da0e5347d3f8f
--- /dev/null
+++ b/flang/test/Transforms/debug-90683.fir
@@ -0,0 +1,25 @@
+// RUN: fir-opt --add-debug-info --mlir-print-debuginfo %s -o - | FileCheck %s
+
+// This test checks that debug information for fir.real type works ok.
+
+module attributes {} {
+  func.func @_QPfn1(%arg0: !fir.ref<!fir.complex<8>> {fir.bindc_name = "a"} ) {
+    %0 = fir.declare %arg0 {uniq_name = "_QFfn1Ea"} : (!fir.ref<!fir.complex<8>>) -> !fir.ref<!fir.complex<8>>
+    %1 = fir.alloca f32 {bindc_name = "abserror", uniq_name = "_QFfn1Eabserror"}
+    %2 = fir.declare %1 {uniq_name = "_QFfn1Eabserror"} : (!fir.ref<f32>) -> !fir.ref<f32>
+    %3 = fir.load %0 : !fir.ref<!fir.complex<8>>
+    %4 = fir.extract_value %3, [0 : i32] : (!fir.complex<8>) -> !fir.real<8>
+    %5 = fir.extract_value %3, [1 : i32] : (!fir.complex<8>) -> !fir.real<8>
+    %6 = fir.call @cabs(%4, %5) : (!fir.real<8>, !fir.real<8>) -> f64
+    %7 = fir.convert %6 : (f64) -> f32
+    fir.store %7 to %2 : !fir.ref<f32>
+    return
+  } loc(#loc1)
+  func.func private @cabs(!fir.real<8>, !fir.real<8>) -> f64 attributes {fir.bindc_name = "cabs", fir.runtime}
+} loc(#loc)
+#loc1 = loc("test.f90":5:1)
+#loc = loc("test.f90":0:0)
+
+// CHECK-DAG: #[[TY:.*]] = #llvm.di_basic_type<tag = DW_TAG_base_type, name = "real", sizeInBits = 64, encoding = DW_ATE_float>
+// CHECK-DAG: #[[TY1:.*]] = #llvm.di_subroutine_type<callingConvention = DW_CC_normal, types = #[[TY]], #[[TY]], #[[TY]]>
+// CHECK-DAG: #{{.*}} = #llvm.di_subprogram<scope = #{{.*}}, name = "cabs", linkageName = "cabs", file = #{{.*}}, line = {{.*}}, scopeLine = {{.*}}, type = #[[TY1]]>