[flang-commits] [libunwind] [clang-tools-extra] [lld] [flang] [libc] [compiler-rt] [libcxx] [clang] [libcxxabi] [lldb] [llvm] [PowerPC] Combine sub within setcc back to sext (PR #66978)

[Kai Luo via flang-commits]

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@@ -14428,15 +14431,52 @@ SDValue PPCTargetLowering::combineSetCC(SDNode *N,
     // x != 0-y --> x+y != 0
     if (RHS.getOpcode() == ISD::SUB && isNullConstant(RHS.getOperand(0)) &&
         RHS.hasOneUse()) {
-      SDLoc DL(N);
-      SelectionDAG &DAG = DCI.DAG;
-      EVT VT = N->getValueType(0);
-      EVT OpVT = LHS.getValueType();
       SDValue Add = DAG.getNode(ISD::ADD, DL, OpVT, LHS, RHS.getOperand(1));
       return DAG.getSetCC(DL, VT, Add, DAG.getConstant(0, DL, OpVT), CC);
     }
   }
 
+  if (CC == ISD::SETULT && isa<ConstantSDNode>(RHS)) {
+    uint64_t RHSVal = cast<ConstantSDNode>(RHS)->getZExtValue();
+    if (LHS.getOpcode() == ISD::ADD && isa<ConstantSDNode>(LHS.getOperand(1))) {
+      uint64_t Addend = cast<ConstantSDNode>(LHS.getOperand(1))->getZExtValue();
+      if (OpVT == MVT::i64) {
+        uint64_t ShiftVal = ~Addend + 1;
+        uint64_t CmpVal = ~RHSVal + 1;
+        if (isPowerOf2_64(ShiftVal) && ShiftVal << 1 == CmpVal) {
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bzEq wrote:

Add comment for the DAG pattern found. Better provide alive2 prove in the PR summary.

https://github.com/llvm/llvm-project/pull/66978