[flang-commits] [flang] [flang][openacc] Lower loop directive to the new acc.loop op design (PR #65417)
Valentin Clement バレンタイン クレメン via flang-commits
flang-commits at lists.llvm.org
Fri Jan 5 15:29:51 PST 2024
https://github.com/clementval updated https://github.com/llvm/llvm-project/pull/65417
>From fef13363b69bd706946c78dc97a00d22a5f4a730 Mon Sep 17 00:00:00 2001
From: Valentin Clement <clementval at gmail.com>
Date: Fri, 1 Sep 2023 11:10:59 -0700
Subject: [PATCH] [flang][openacc] Lower loop directive to the new acc.loop op
design
acc.loop was redesigned in https://reviews.llvm.org/D159229. This patch
updates the lowering to match the new op.
DO CONCURRENT construct will be added in a follow up patch.
---
flang/include/flang/Lower/OpenACC.h | 5 +
flang/lib/Lower/Bridge.cpp | 36 ++-
flang/lib/Lower/OpenACC.cpp | 189 ++++++++++++----
flang/test/Lower/OpenACC/acc-kernels-loop.f90 | 162 +++++--------
flang/test/Lower/OpenACC/acc-loop-exit.f90 | 10 +-
flang/test/Lower/OpenACC/acc-loop.f90 | 213 ++++++++----------
.../test/Lower/OpenACC/acc-parallel-loop.f90 | 172 ++++++--------
flang/test/Lower/OpenACC/acc-private.f90 | 14 +-
flang/test/Lower/OpenACC/acc-reduction.f90 | 48 ++--
flang/test/Lower/OpenACC/acc-serial-loop.f90 | 150 +++++-------
flang/test/Lower/OpenACC/locations.f90 | 32 ++-
11 files changed, 514 insertions(+), 517 deletions(-)
diff --git a/flang/include/flang/Lower/OpenACC.h b/flang/include/flang/Lower/OpenACC.h
index f23e4726f33e00..fbf61e7184ae27 100644
--- a/flang/include/flang/Lower/OpenACC.h
+++ b/flang/include/flang/Lower/OpenACC.h
@@ -35,6 +35,7 @@ class FirOpBuilder;
namespace Fortran {
namespace parser {
+struct AccClauseList;
struct OpenACCConstruct;
struct OpenACCDeclarativeConstruct;
struct OpenACCRoutineConstruct;
@@ -64,6 +65,8 @@ static constexpr llvm::StringRef declarePreDeallocSuffix =
static constexpr llvm::StringRef declarePostDeallocSuffix =
"_acc_declare_update_desc_post_dealloc";
+static constexpr llvm::StringRef privatizationRecipePrefix = "privatization";
+
mlir::Value genOpenACCConstruct(AbstractConverter &,
Fortran::semantics::SemanticsContext &,
pft::Evaluation &,
@@ -113,6 +116,8 @@ void attachDeclarePostDeallocAction(AbstractConverter &, fir::FirOpBuilder &,
void genOpenACCTerminator(fir::FirOpBuilder &, mlir::Operation *,
mlir::Location);
+int64_t getCollapseValue(const Fortran::parser::AccClauseList &);
+
bool isInOpenACCLoop(fir::FirOpBuilder &);
void setInsertionPointAfterOpenACCLoopIfInside(fir::FirOpBuilder &);
diff --git a/flang/lib/Lower/Bridge.cpp b/flang/lib/Lower/Bridge.cpp
index 2bceee09b4f0f2..d572039074ca06 100644
--- a/flang/lib/Lower/Bridge.cpp
+++ b/flang/lib/Lower/Bridge.cpp
@@ -2391,13 +2391,43 @@ class FirConverter : public Fortran::lower::AbstractConverter {
localSymbols.pushScope();
mlir::Value exitCond = genOpenACCConstruct(
*this, bridge.getSemanticsContext(), getEval(), acc);
- for (Fortran::lower::pft::Evaluation &e : getEval().getNestedEvaluations())
+
+ const Fortran::parser::OpenACCLoopConstruct *accLoop =
+ std::get_if<Fortran::parser::OpenACCLoopConstruct>(&acc.u);
+ const Fortran::parser::OpenACCCombinedConstruct *accCombined =
+ std::get_if<Fortran::parser::OpenACCCombinedConstruct>(&acc.u);
+
+ Fortran::lower::pft::Evaluation *curEval = &getEval();
+
+ if (accLoop || accCombined) {
+ int64_t collapseValue;
+ if (accLoop) {
+ const Fortran::parser::AccBeginLoopDirective &beginLoopDir =
+ std::get<Fortran::parser::AccBeginLoopDirective>(accLoop->t);
+ const Fortran::parser::AccClauseList &clauseList =
+ std::get<Fortran::parser::AccClauseList>(beginLoopDir.t);
+ collapseValue = Fortran::lower::getCollapseValue(clauseList);
+ } else if (accCombined) {
+ const Fortran::parser::AccBeginCombinedDirective &beginCombinedDir =
+ std::get<Fortran::parser::AccBeginCombinedDirective>(
+ accCombined->t);
+ const Fortran::parser::AccClauseList &clauseList =
+ std::get<Fortran::parser::AccClauseList>(beginCombinedDir.t);
+ collapseValue = Fortran::lower::getCollapseValue(clauseList);
+ }
+
+ if (curEval->lowerAsStructured()) {
+ curEval = &curEval->getFirstNestedEvaluation();
+ for (int64_t i = 1; i < collapseValue; i++)
+ curEval = &*std::next(curEval->getNestedEvaluations().begin());
+ }
+ }
+
+ for (Fortran::lower::pft::Evaluation &e : curEval->getNestedEvaluations())
genFIR(e);
localSymbols.popScope();
builder->restoreInsertionPoint(insertPt);
- const Fortran::parser::OpenACCLoopConstruct *accLoop =
- std::get_if<Fortran::parser::OpenACCLoopConstruct>(&acc.u);
if (accLoop && exitCond) {
Fortran::lower::pft::FunctionLikeUnit *funit =
getEval().getOwningProcedure();
diff --git a/flang/lib/Lower/OpenACC.cpp b/flang/lib/Lower/OpenACC.cpp
index d24c369d81bed4..c9d12d41fd7763 100644
--- a/flang/lib/Lower/OpenACC.cpp
+++ b/flang/lib/Lower/OpenACC.cpp
@@ -787,7 +787,8 @@ genPrivatizations(const Fortran::parser::AccObjectList &objectList,
mlir::Type retTy = getTypeFromBounds(bounds, info.addr.getType());
if constexpr (std::is_same_v<RecipeOp, mlir::acc::PrivateRecipeOp>) {
std::string recipeName =
- fir::getTypeAsString(retTy, converter.getKindMap(), "privatization");
+ fir::getTypeAsString(retTy, converter.getKindMap(),
+ Fortran::lower::privatizationRecipePrefix);
recipe = Fortran::lower::createOrGetPrivateRecipe(builder, recipeName,
operandLocation, retTy);
auto op = createDataEntryOp<mlir::acc::PrivateOp>(
@@ -1412,15 +1413,17 @@ static void addOperand(llvm::SmallVectorImpl<mlir::Value> &operands,
}
template <typename Op, typename Terminator>
-static Op createRegionOp(fir::FirOpBuilder &builder, mlir::Location loc,
- Fortran::lower::pft::Evaluation &eval,
- const llvm::SmallVectorImpl<mlir::Value> &operands,
- const llvm::SmallVectorImpl<int32_t> &operandSegments,
- bool outerCombined = false,
- llvm::SmallVector<mlir::Type> retTy = {},
- mlir::Value yieldValue = {}) {
+static Op
+createRegionOp(fir::FirOpBuilder &builder, mlir::Location loc,
+ mlir::Location returnLoc, Fortran::lower::pft::Evaluation &eval,
+ const llvm::SmallVectorImpl<mlir::Value> &operands,
+ const llvm::SmallVectorImpl<int32_t> &operandSegments,
+ bool outerCombined = false,
+ llvm::SmallVector<mlir::Type> retTy = {},
+ mlir::Value yieldValue = {}, mlir::TypeRange argsTy = {},
+ llvm::SmallVector<mlir::Location> locs = {}) {
Op op = builder.create<Op>(loc, retTy, operands);
- builder.createBlock(&op.getRegion());
+ builder.createBlock(&op.getRegion(), op.getRegion().end(), argsTy, locs);
mlir::Block &block = op.getRegion().back();
builder.setInsertionPointToStart(&block);
@@ -1439,13 +1442,13 @@ static Op createRegionOp(fir::FirOpBuilder &builder, mlir::Location loc,
if (yieldValue) {
if constexpr (std::is_same_v<Terminator, mlir::acc::YieldOp>) {
- Terminator yieldOp = builder.create<Terminator>(loc, yieldValue);
+ Terminator yieldOp = builder.create<Terminator>(returnLoc, yieldValue);
yieldValue.getDefiningOp()->moveBefore(yieldOp);
} else {
- builder.create<Terminator>(loc);
+ builder.create<Terminator>(returnLoc);
}
} else {
- builder.create<Terminator>(loc);
+ builder.create<Terminator>(returnLoc);
}
builder.setInsertionPointToStart(&block);
return op;
@@ -1584,18 +1587,28 @@ genWaitClause(Fortran::lower::AbstractConverter &converter,
}
}
+mlir::Type getTypeFromIvTypeSize(fir::FirOpBuilder &builder,
+ const Fortran::semantics::Symbol &ivSym) {
+ std::size_t ivTypeSize = ivSym.size();
+ if (ivTypeSize == 0)
+ llvm::report_fatal_error("unexpected induction variable size");
+ // ivTypeSize is in bytes and IntegerType needs to be in bits.
+ return builder.getIntegerType(ivTypeSize * 8);
+}
+
static mlir::acc::LoopOp
createLoopOp(Fortran::lower::AbstractConverter &converter,
mlir::Location currentLocation,
- Fortran::lower::pft::Evaluation &eval,
Fortran::semantics::SemanticsContext &semanticsContext,
Fortran::lower::StatementContext &stmtCtx,
+ const Fortran::parser::DoConstruct &outerDoConstruct,
+ Fortran::lower::pft::Evaluation &eval,
const Fortran::parser::AccClauseList &accClauseList,
bool needEarlyReturnHandling = false) {
fir::FirOpBuilder &builder = converter.getFirOpBuilder();
- llvm::SmallVector<mlir::Value> tileOperands, privateOperands,
+ llvm::SmallVector<mlir::Value> tileOperands, privateOperands, ivPrivate,
reductionOperands, cacheOperands, vectorOperands, workerNumOperands,
- gangOperands;
+ gangOperands, lowerbounds, upperbounds, steps;
llvm::SmallVector<mlir::Attribute> privatizations, reductionRecipes;
llvm::SmallVector<int32_t> tileOperandsSegments, gangOperandsSegments;
llvm::SmallVector<int64_t> collapseValues;
@@ -1611,6 +1624,74 @@ createLoopOp(Fortran::lower::AbstractConverter &converter,
auto crtDeviceTypeAttr = mlir::acc::DeviceTypeAttr::get(
builder.getContext(), mlir::acc::DeviceType::None);
+ llvm::SmallVector<mlir::Type> ivTypes;
+ llvm::SmallVector<mlir::Location> ivLocs;
+ llvm::SmallVector<bool> inclusiveBounds;
+
+ if (outerDoConstruct.IsDoConcurrent())
+ TODO(currentLocation, "OpenACC loop with DO CONCURRENT");
+
+ llvm::SmallVector<mlir::Location> locs;
+ locs.push_back(currentLocation); // Location of the directive
+
+ int64_t collapseValue = Fortran::lower::getCollapseValue(accClauseList);
+ Fortran::lower::pft::Evaluation *crtEval = &eval.getFirstNestedEvaluation();
+ for (unsigned i = 0; i < collapseValue; ++i) {
+ const Fortran::parser::LoopControl *loopControl;
+ if (i == 0) {
+ loopControl = &*outerDoConstruct.GetLoopControl();
+ locs.push_back(converter.genLocation(
+ Fortran::parser::FindSourceLocation(outerDoConstruct)));
+ } else {
+ auto *doCons = crtEval->getIf<Fortran::parser::DoConstruct>();
+ assert(doCons && "expect do construct");
+ loopControl = &*doCons->GetLoopControl();
+ locs.push_back(
+ converter.genLocation(Fortran::parser::FindSourceLocation(*doCons)));
+ }
+
+ const Fortran::parser::LoopControl::Bounds *bounds =
+ std::get_if<Fortran::parser::LoopControl::Bounds>(&loopControl->u);
+ assert(bounds && "Expected bounds on the loop construct");
+ lowerbounds.push_back(fir::getBase(converter.genExprValue(
+ *Fortran::semantics::GetExpr(bounds->lower), stmtCtx)));
+ upperbounds.push_back(fir::getBase(converter.genExprValue(
+ *Fortran::semantics::GetExpr(bounds->upper), stmtCtx)));
+ if (bounds->step)
+ steps.push_back(fir::getBase(converter.genExprValue(
+ *Fortran::semantics::GetExpr(bounds->step), stmtCtx)));
+ else // If `step` is not present, assume it as `1`.
+ steps.push_back(builder.createIntegerConstant(
+ currentLocation, upperbounds[upperbounds.size() - 1].getType(), 1));
+
+ Fortran::semantics::Symbol &ivSym =
+ bounds->name.thing.symbol->GetUltimate();
+
+ mlir::Type ivTy = getTypeFromIvTypeSize(builder, ivSym);
+ mlir::Value ivValue = converter.getSymbolAddress(ivSym);
+ ivTypes.push_back(ivTy);
+ ivLocs.push_back(currentLocation);
+ std::string recipeName =
+ fir::getTypeAsString(ivValue.getType(), converter.getKindMap(),
+ Fortran::lower::privatizationRecipePrefix);
+ auto recipe = Fortran::lower::createOrGetPrivateRecipe(
+ builder, recipeName, currentLocation, ivValue.getType());
+ std::stringstream asFortran;
+ auto op = createDataEntryOp<mlir::acc::PrivateOp>(
+ builder, currentLocation, ivValue, asFortran, {}, true,
+ /*implicit=*/true, mlir::acc::DataClause::acc_private,
+ ivValue.getType());
+
+ privateOperands.push_back(op.getAccPtr());
+ ivPrivate.push_back(op.getAccPtr());
+ privatizations.push_back(mlir::SymbolRefAttr::get(
+ builder.getContext(), recipe.getSymName().str()));
+ inclusiveBounds.push_back(true);
+ converter.bindSymbol(ivSym, op.getAccPtr());
+ if (i < collapseValue - 1)
+ crtEval = &*std::next(crtEval->getNestedEvaluations().begin());
+ }
+
for (const Fortran::parser::AccClause &clause : accClauseList.v) {
mlir::Location clauseLocation = converter.genLocation(clause.source);
if (const auto *gangClause =
@@ -1741,6 +1822,9 @@ createLoopOp(Fortran::lower::AbstractConverter &converter,
// Prepare the operand segment size attribute and the operands value range.
llvm::SmallVector<mlir::Value> operands;
llvm::SmallVector<int32_t> operandSegments;
+ addOperands(operands, operandSegments, lowerbounds);
+ addOperands(operands, operandSegments, upperbounds);
+ addOperands(operands, operandSegments, steps);
addOperands(operands, operandSegments, gangOperands);
addOperands(operands, operandSegments, workerNumOperands);
addOperands(operands, operandSegments, vectorOperands);
@@ -1758,8 +1842,15 @@ createLoopOp(Fortran::lower::AbstractConverter &converter,
}
auto loopOp = createRegionOp<mlir::acc::LoopOp, mlir::acc::YieldOp>(
- builder, currentLocation, eval, operands, operandSegments,
- /*outerCombined=*/false, retTy, yieldValue);
+ builder, builder.getFusedLoc(locs), currentLocation, eval, operands,
+ operandSegments, /*outerCombined=*/false, retTy, yieldValue, ivTypes,
+ ivLocs);
+
+ for (auto [arg, value] : llvm::zip(
+ loopOp.getLoopRegions().front()->front().getArguments(), ivPrivate))
+ builder.create<fir::StoreOp>(currentLocation, arg, value);
+
+ loopOp.setInclusiveUpperbound(inclusiveBounds);
if (!gangDeviceTypes.empty())
loopOp.setGangAttr(builder.getArrayAttr(gangDeviceTypes));
@@ -1846,15 +1937,19 @@ genACC(Fortran::lower::AbstractConverter &converter,
converter.genLocation(beginLoopDirective.source);
Fortran::lower::StatementContext stmtCtx;
- if (loopDirective.v == llvm::acc::ACCD_loop) {
- const auto &accClauseList =
- std::get<Fortran::parser::AccClauseList>(beginLoopDirective.t);
- auto loopOp =
- createLoopOp(converter, currentLocation, eval, semanticsContext,
- stmtCtx, accClauseList, needEarlyExitHandling);
- if (needEarlyExitHandling)
- return loopOp.getResult(0);
- }
+ assert(loopDirective.v == llvm::acc::ACCD_loop &&
+ "Unsupported OpenACC loop construct");
+
+ const auto &accClauseList =
+ std::get<Fortran::parser::AccClauseList>(beginLoopDirective.t);
+ const auto &outerDoConstruct =
+ std::get<std::optional<Fortran::parser::DoConstruct>>(loopConstruct.t);
+ auto loopOp = createLoopOp(converter, currentLocation, semanticsContext,
+ stmtCtx, *outerDoConstruct, eval, accClauseList,
+ needEarlyExitHandling);
+ if (needEarlyExitHandling)
+ return loopOp.getResult(0);
+
return mlir::Value{};
}
@@ -2144,12 +2239,12 @@ createComputeOp(Fortran::lower::AbstractConverter &converter,
Op computeOp;
if constexpr (std::is_same_v<Op, mlir::acc::KernelsOp>)
computeOp = createRegionOp<Op, mlir::acc::TerminatorOp>(
- builder, currentLocation, eval, operands, operandSegments,
- outerCombined);
+ builder, currentLocation, currentLocation, eval, operands,
+ operandSegments, outerCombined);
else
computeOp = createRegionOp<Op, mlir::acc::YieldOp>(
- builder, currentLocation, eval, operands, operandSegments,
- outerCombined);
+ builder, currentLocation, currentLocation, eval, operands,
+ operandSegments, outerCombined);
if (addSelfAttr)
computeOp.setSelfAttrAttr(builder.getUnitAttr());
@@ -2350,7 +2445,8 @@ static void genACCDataOp(Fortran::lower::AbstractConverter &converter,
return;
auto dataOp = createRegionOp<mlir::acc::DataOp, mlir::acc::TerminatorOp>(
- builder, currentLocation, eval, operands, operandSegments);
+ builder, currentLocation, currentLocation, eval, operands,
+ operandSegments);
if (!asyncDeviceTypes.empty())
dataOp.setAsyncDeviceTypeAttr(builder.getArrayAttr(asyncDeviceTypes));
@@ -2439,7 +2535,8 @@ genACCHostDataOp(Fortran::lower::AbstractConverter &converter,
auto hostDataOp =
createRegionOp<mlir::acc::HostDataOp, mlir::acc::TerminatorOp>(
- builder, currentLocation, eval, operands, operandSegments);
+ builder, currentLocation, currentLocation, eval, operands,
+ operandSegments);
if (addIfPresentAttr)
hostDataOp.setIfPresentAttr(builder.getUnitAttr());
@@ -2492,6 +2589,9 @@ genACC(Fortran::lower::AbstractConverter &converter,
std::get<Fortran::parser::AccCombinedDirective>(beginCombinedDirective.t);
const auto &accClauseList =
std::get<Fortran::parser::AccClauseList>(beginCombinedDirective.t);
+ const auto &outerDoConstruct =
+ std::get<std::optional<Fortran::parser::DoConstruct>>(
+ combinedConstruct.t);
mlir::Location currentLocation =
converter.genLocation(beginCombinedDirective.source);
@@ -2501,20 +2601,20 @@ genACC(Fortran::lower::AbstractConverter &converter,
createComputeOp<mlir::acc::KernelsOp>(
converter, currentLocation, eval, semanticsContext, stmtCtx,
accClauseList, /*outerCombined=*/true);
- createLoopOp(converter, currentLocation, eval, semanticsContext, stmtCtx,
- accClauseList);
+ createLoopOp(converter, currentLocation, semanticsContext, stmtCtx,
+ *outerDoConstruct, eval, accClauseList);
} else if (combinedDirective.v == llvm::acc::ACCD_parallel_loop) {
createComputeOp<mlir::acc::ParallelOp>(
converter, currentLocation, eval, semanticsContext, stmtCtx,
accClauseList, /*outerCombined=*/true);
- createLoopOp(converter, currentLocation, eval, semanticsContext, stmtCtx,
- accClauseList);
+ createLoopOp(converter, currentLocation, semanticsContext, stmtCtx,
+ *outerDoConstruct, eval, accClauseList);
} else if (combinedDirective.v == llvm::acc::ACCD_serial_loop) {
createComputeOp<mlir::acc::SerialOp>(converter, currentLocation, eval,
semanticsContext, stmtCtx,
accClauseList, /*outerCombined=*/true);
- createLoopOp(converter, currentLocation, eval, semanticsContext, stmtCtx,
- accClauseList);
+ createLoopOp(converter, currentLocation, semanticsContext, stmtCtx,
+ *outerDoConstruct, eval, accClauseList);
} else {
llvm::report_fatal_error("Unknown combined construct encountered");
}
@@ -3835,3 +3935,16 @@ void Fortran::lower::genEarlyReturnInOpenACCLoop(fir::FirOpBuilder &builder,
builder.createIntegerConstant(loc, builder.getI1Type(), 1);
builder.create<mlir::acc::YieldOp>(loc, yieldValue);
}
+
+int64_t Fortran::lower::getCollapseValue(
+ const Fortran::parser::AccClauseList &clauseList) {
+ for (const Fortran::parser::AccClause &clause : clauseList.v) {
+ if (const auto *collapseClause =
+ std::get_if<Fortran::parser::AccClause::Collapse>(&clause.u)) {
+ const parser::AccCollapseArg &arg = collapseClause->v;
+ const auto &collapseValue{std::get<parser::ScalarIntConstantExpr>(arg.t)};
+ return *Fortran::semantics::GetIntValue(collapseValue);
+ }
+ }
+ return 1;
+}
diff --git a/flang/test/Lower/OpenACC/acc-kernels-loop.f90 b/flang/test/Lower/OpenACC/acc-kernels-loop.f90
index b17f2e2c80b20f..47e77ab24a6fb7 100644
--- a/flang/test/Lower/OpenACC/acc-kernels-loop.f90
+++ b/flang/test/Lower/OpenACC/acc-kernels-loop.f90
@@ -43,8 +43,7 @@ subroutine acc_kernels_loop
END DO
! CHECK: acc.kernels {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -57,8 +56,7 @@ subroutine acc_kernels_loop
!$acc end kernels loop
! CHECK: acc.kernels {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -71,8 +69,7 @@ subroutine acc_kernels_loop
! CHECK: [[ASYNC1:%.*]] = arith.constant 1 : i32
! CHECK: acc.kernels async([[ASYNC1]] : i32) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -85,8 +82,7 @@ subroutine acc_kernels_loop
! CHECK: [[ASYNC2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
! CHECK: acc.kernels async([[ASYNC2]] : i32) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -98,8 +94,7 @@ subroutine acc_kernels_loop
END DO
! CHECK: acc.kernels {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -112,8 +107,7 @@ subroutine acc_kernels_loop
! CHECK: [[WAIT1:%.*]] = arith.constant 1 : i32
! CHECK: acc.kernels wait({[[WAIT1]] : i32}) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -127,8 +121,7 @@ subroutine acc_kernels_loop
! CHECK: [[WAIT2:%.*]] = arith.constant 1 : i32
! CHECK: [[WAIT3:%.*]] = arith.constant 2 : i32
! CHECK: acc.kernels wait({[[WAIT2]] : i32, [[WAIT3]] : i32}) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -142,8 +135,7 @@ subroutine acc_kernels_loop
! CHECK: [[WAIT4:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
! CHECK: [[WAIT5:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
! CHECK: acc.kernels wait({[[WAIT4]] : i32, [[WAIT5]] : i32}) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -156,8 +148,7 @@ subroutine acc_kernels_loop
! CHECK: [[NUMGANGS1:%.*]] = arith.constant 1 : i32
! CHECK: acc.kernels num_gangs({[[NUMGANGS1]] : i32}) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -170,8 +161,7 @@ subroutine acc_kernels_loop
! CHECK: [[NUMGANGS2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
! CHECK: acc.kernels num_gangs({[[NUMGANGS2]] : i32}) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -184,8 +174,7 @@ subroutine acc_kernels_loop
! CHECK: [[NUMWORKERS1:%.*]] = arith.constant 10 : i32
! CHECK: acc.kernels num_workers([[NUMWORKERS1]] : i32) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -198,8 +187,7 @@ subroutine acc_kernels_loop
! CHECK: [[NUMWORKERS2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
! CHECK: acc.kernels num_workers([[NUMWORKERS2]] : i32) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -212,8 +200,7 @@ subroutine acc_kernels_loop
! CHECK: [[VECTORLENGTH1:%.*]] = arith.constant 128 : i32
! CHECK: acc.kernels vector_length([[VECTORLENGTH1]] : i32) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -226,8 +213,7 @@ subroutine acc_kernels_loop
! CHECK: [[VECTORLENGTH2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
! CHECK: acc.kernels vector_length([[VECTORLENGTH2]] : i32) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -240,8 +226,7 @@ subroutine acc_kernels_loop
! CHECK: [[IF1:%.*]] = arith.constant true
! CHECK: acc.kernels if([[IF1]]) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -255,8 +240,7 @@ subroutine acc_kernels_loop
! CHECK: [[IFCOND:%.*]] = fir.load %{{.*}} : !fir.ref<!fir.logical<4>>
! CHECK: [[IF2:%.*]] = fir.convert [[IFCOND]] : (!fir.logical<4>) -> i1
! CHECK: acc.kernels if([[IF2]]) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -269,8 +253,7 @@ subroutine acc_kernels_loop
! CHECK: [[SELF1:%.*]] = arith.constant true
! CHECK: acc.kernels self([[SELF1]]) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -282,8 +265,7 @@ subroutine acc_kernels_loop
END DO
! CHECK: acc.kernels {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -297,8 +279,7 @@ subroutine acc_kernels_loop
! CHECK: %[[SELF2:.*]] = fir.convert %[[DECLIFCONDITION]]#1 : (!fir.ref<!fir.logical<4>>) -> i1
! CHECK: acc.kernels self(%[[SELF2]]) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -313,8 +294,7 @@ subroutine acc_kernels_loop
! CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copy>, name = "a"}
! CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copy>, name = "b"}
! CHECK: acc.kernels dataOperands(%[[COPYIN_A]], %[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -330,8 +310,7 @@ subroutine acc_kernels_loop
! CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copy>, name = "a"}
! CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copy>, name = "b"}
! CHECK: acc.kernels dataOperands(%[[COPYIN_A]], %[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -347,8 +326,7 @@ subroutine acc_kernels_loop
! CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
! CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copyin_readonly>, name = "b"}
! CHECK: acc.kernels dataOperands(%[[COPYIN_A]], %[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -362,8 +340,7 @@ subroutine acc_kernels_loop
! CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copyout>, name = "a"}
! CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copyout>, name = "b"}
! CHECK: acc.kernels dataOperands(%[[CREATE_A]], %[[CREATE_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -379,8 +356,7 @@ subroutine acc_kernels_loop
! CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
! CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_create_zero>, name = "a"}
! CHECK: acc.kernels dataOperands(%[[CREATE_B]], %[[CREATE_A]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -396,8 +372,7 @@ subroutine acc_kernels_loop
! CHECK: %[[NOCREATE_A:.*]] = acc.nocreate varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
! CHECK: %[[NOCREATE_B:.*]] = acc.nocreate varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
! CHECK: acc.kernels dataOperands(%[[NOCREATE_A]], %[[NOCREATE_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -411,8 +386,7 @@ subroutine acc_kernels_loop
! CHECK: %[[PRESENT_A:.*]] = acc.present varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
! CHECK: %[[PRESENT_B:.*]] = acc.present varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
! CHECK: acc.kernels dataOperands(%[[PRESENT_A]], %[[PRESENT_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -426,8 +400,7 @@ subroutine acc_kernels_loop
! CHECK: %[[DEVICEPTR_A:.*]] = acc.deviceptr varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
! CHECK: %[[DEVICEPTR_B:.*]] = acc.deviceptr varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
! CHECK: acc.kernels dataOperands(%[[DEVICEPTR_A]], %[[DEVICEPTR_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -445,8 +418,7 @@ subroutine acc_kernels_loop
! CHECK: %[[BOX_ADDR_G:.*]] = fir.box_addr %[[BOX_G]] : (!fir.box<!fir.ptr<f32>>) -> !fir.ptr<f32>
! CHECK: %[[ATTACH_G:.*]] = acc.attach varPtr(%[[BOX_ADDR_G]] : !fir.ptr<f32>) -> !fir.ptr<f32> {name = "g"}
! CHECK: acc.kernels dataOperands(%[[ATTACH_F]], %[[ATTACH_G]] : !fir.ptr<f32>, !fir.ptr<f32>) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -458,10 +430,9 @@ subroutine acc_kernels_loop
END DO
! CHECK: acc.kernels {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {seq = [#acc.device_type<none>]}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<none>]}
! CHECK: acc.terminator
! CHECK-NEXT: }{{$}}
@@ -471,10 +442,9 @@ subroutine acc_kernels_loop
END DO
! CHECK: acc.kernels {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>]}
+! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}
! CHECK: acc.terminator
! CHECK-NEXT: }{{$}}
@@ -484,10 +454,9 @@ subroutine acc_kernels_loop
END DO
! CHECK: acc.kernels {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {independent = [#acc.device_type<none>]}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
! CHECK: acc.terminator
! CHECK-NEXT: }{{$}}
@@ -497,10 +466,9 @@ subroutine acc_kernels_loop
END DO
! CHECK: acc.kernels {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {gang = [#acc.device_type<none>]}{{$}}
+! CHECK-NEXT: } attributes {gang = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}{{$}}
! CHECK: acc.terminator
! CHECK-NEXT: }{{$}}
@@ -511,8 +479,7 @@ subroutine acc_kernels_loop
! CHECK: acc.kernels {
! CHECK: [[GANGNUM1:%.*]] = arith.constant 8 : i32
-! CHECK-NEXT: acc.loop gang({num=[[GANGNUM1]] : i32}) {
-! CHECK: fir.do_loop
+! CHECK-NEXT: acc.loop gang({num=[[GANGNUM1]] : i32}) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -525,8 +492,7 @@ subroutine acc_kernels_loop
! CHECK: acc.kernels {
! CHECK: [[GANGNUM2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-! CHECK-NEXT: acc.loop gang({num=[[GANGNUM2]] : i32}) {
-! CHECK: fir.do_loop
+! CHECK-NEXT: acc.loop gang({num=[[GANGNUM2]] : i32}) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -538,8 +504,7 @@ subroutine acc_kernels_loop
END DO
! CHECK: acc.kernels {
-! CHECK: acc.loop gang({num=%{{.*}} : i32, static=%{{.*}} : i32}) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop gang({num=%{{.*}} : i32, static=%{{.*}} : i32})
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -550,10 +515,9 @@ subroutine acc_kernels_loop
a(i) = b(i)
END DO
! CHECK: acc.kernels {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {vector = [#acc.device_type<none>]}{{$}}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, vector = [#acc.device_type<none>]}{{$}}
! CHECK: acc.terminator
! CHECK-NEXT: }{{$}}
@@ -564,8 +528,7 @@ subroutine acc_kernels_loop
! CHECK: acc.kernels {
! CHECK: [[CONSTANT128:%.*]] = arith.constant 128 : i32
-! CHECK: acc.loop vector([[CONSTANT128]] : i32) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop vector([[CONSTANT128]] : i32) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -578,8 +541,7 @@ subroutine acc_kernels_loop
! CHECK: acc.kernels {
! CHECK: [[VECTORLENGTH:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-! CHECK: acc.loop vector([[VECTORLENGTH]] : i32) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop vector([[VECTORLENGTH]] : i32) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -591,10 +553,9 @@ subroutine acc_kernels_loop
END DO
! CHECK: acc.kernels {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {worker = [#acc.device_type<none>]}{{$}}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, worker = [#acc.device_type<none>]}{{$}}
! CHECK: acc.terminator
! CHECK-NEXT: }{{$}}
@@ -605,8 +566,7 @@ subroutine acc_kernels_loop
! CHECK: acc.kernels {
! CHECK: [[WORKER128:%.*]] = arith.constant 128 : i32
-! CHECK: acc.loop worker([[WORKER128]] : i32) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop worker([[WORKER128]] : i32) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -620,11 +580,9 @@ subroutine acc_kernels_loop
END DO
! CHECK: acc.kernels {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {collapse = [2], collapseDeviceType = [#acc.device_type<none>]}
+! CHECK-NEXT: } attributes {collapse = [2], collapseDeviceType = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true, true>}
! CHECK: acc.terminator
! CHECK-NEXT: }{{$}}
@@ -637,10 +595,8 @@ subroutine acc_kernels_loop
END DO
! CHECK: acc.kernels {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -655,8 +611,7 @@ subroutine acc_kernels_loop
! CHECK: acc.kernels {
! CHECK: [[TILESIZE:%.*]] = arith.constant 2 : i32
-! CHECK: acc.loop tile({[[TILESIZE]] : i32}) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} tile({[[TILESIZE]] : i32}) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -669,8 +624,7 @@ subroutine acc_kernels_loop
! CHECK: acc.kernels {
! CHECK: [[TILESIZEM1:%.*]] = arith.constant -1 : i32
-! CHECK: acc.loop tile({[[TILESIZEM1]] : i32}) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} tile({[[TILESIZEM1]] : i32}) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -686,8 +640,7 @@ subroutine acc_kernels_loop
! CHECK: acc.kernels {
! CHECK: [[TILESIZE1:%.*]] = arith.constant 2 : i32
! CHECK: [[TILESIZE2:%.*]] = arith.constant 2 : i32
-! CHECK: acc.loop tile({[[TILESIZE1]] : i32, [[TILESIZE2]] : i32}) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} tile({[[TILESIZE1]] : i32, [[TILESIZE2]] : i32}) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -699,8 +652,7 @@ subroutine acc_kernels_loop
END DO
! CHECK: acc.kernels {
-! CHECK: acc.loop tile({%{{.*}} : i32}) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} tile({%{{.*}} : i32}) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -714,8 +666,7 @@ subroutine acc_kernels_loop
END DO
! CHECK: acc.kernels {
-! CHECK: acc.loop tile({%{{.*}} : i32, %{{.*}} : i32}) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} tile({%{{.*}} : i32, %{{.*}} : i32}) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
@@ -730,8 +681,7 @@ subroutine acc_kernels_loop
! CHECK: %[[COPYINREDR:.*]] = acc.copyin varPtr(%{{.*}} : !fir.ref<f32>) -> !fir.ref<f32> {dataClause = #acc<data_clause acc_reduction>, implicit = true, name = "reduction_r"}
! CHECK: %[[COPYINREDI:.*]] = acc.copyin varPtr(%{{.*}} : !fir.ref<i32>) -> !fir.ref<i32> {dataClause = #acc<data_clause acc_reduction>, implicit = true, name = "reduction_i"}
! CHECK: acc.kernels dataOperands(%[[COPYINREDR]], %[[COPYINREDI]] : !fir.ref<f32>, !fir.ref<i32>) {
-! CHECK: acc.loop reduction(@reduction_add_ref_f32 -> %{{.*}} : !fir.ref<f32>, @reduction_mul_ref_i32 -> %{{.*}} : !fir.ref<i32>) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} reduction(@reduction_add_ref_f32 -> %{{.*}} : !fir.ref<f32>, @reduction_mul_ref_i32 -> %{{.*}} : !fir.ref<i32>) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.terminator
diff --git a/flang/test/Lower/OpenACC/acc-loop-exit.f90 b/flang/test/Lower/OpenACC/acc-loop-exit.f90
index 75f1c307332722..c1ea057af66739 100644
--- a/flang/test/Lower/OpenACC/acc-loop-exit.f90
+++ b/flang/test/Lower/OpenACC/acc-loop-exit.f90
@@ -15,11 +15,15 @@ subroutine sub1(x, a)
! CHECK-LABEL: func.func @_QPsub1
! CHECK: %[[A:.*]]:2 = hlfir.declare %arg1 {uniq_name = "_QFsub1Ea"} : (!fir.ref<i32>) -> (!fir.ref<i32>, !fir.ref<i32>)
-! CHECK: %[[EXIT_COND:.*]] = acc.loop {
+! CHECK: %[[I:.*]]:2 = hlfir.declare %2 {uniq_name = "_QFsub1Ei"} : (!fir.ref<i32>) -> (!fir.ref<i32>, !fir.ref<i32>)
+! CHECK: %[[I:.*]]:2 = hlfir.declare %6 {uniq_name = "_QFsub1Ei"} : (!fir.ref<i32>) -> (!fir.ref<i32>, !fir.ref<i32>)
+! CHECK: %[[EXIT_COND:.*]] = acc.loop
! CHECK: ^bb{{.*}}:
! CHECK: ^bb{{.*}}:
-! CHECK: %[[LOAD_A:.*]] = fir.load %[[A]]#0 : !fir.ref<i32>
-! CHECK: %[[CMP:.*]] = arith.cmpi eq, %15, %[[LOAD_A]] : i32
+! CHECK: %[[LOAD_I:.*]] = fir.load %[[I]]#0 : !fir.ref<i32>
+! CHECK: %[[LOAD_I:.*]] = fir.load %[[I]]#0 : !fir.ref<i32>
+! CHECK: %[[LOAD_A:.*]] = fir.load %[[A]]#0 : !fir.ref<i32>
+! CHECK: %[[CMP:.*]] = arith.cmpi eq, %[[LOAD_I]], %[[LOAD_A]] : i32
! CHECK: cf.cond_br %[[CMP]], ^[[EARLY_RET:.*]], ^[[NO_RET:.*]]
! CHECK: ^[[EARLY_RET]]:
! CHECK: acc.yield %true : i1
diff --git a/flang/test/Lower/OpenACC/acc-loop.f90 b/flang/test/Lower/OpenACC/acc-loop.f90
index e7f65770498fe2..ce9b7774bf567e 100644
--- a/flang/test/Lower/OpenACC/acc-loop.f90
+++ b/flang/test/Lower/OpenACC/acc-loop.f90
@@ -27,185 +27,168 @@ program acc_loop
a(i) = b(i)
END DO
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.loop private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) (%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}{{$}}
!$acc loop seq
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: } attributes {seq = [#acc.device_type<none>]}
+! CHECK: acc.loop private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) (%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<none>]}
!$acc loop auto
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>]}
+! CHECK: acc.loop private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) (%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}
!$acc loop independent
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: } attributes {independent = [#acc.device_type<none>]}
+! CHECK: acc.loop private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) (%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
!$acc loop gang
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: } attributes {gang = [#acc.device_type<none>]}{{$}}
+! CHECK: acc.loop private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) (%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {gang = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}
!$acc loop gang(num: 8)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[GANGNUM1:%.*]] = arith.constant 8 : i32
-!CHECK-NEXT: acc.loop gang({num=[[GANGNUM1]] : i32}) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[GANGNUM1:%.*]] = arith.constant 8 : i32
+! CHECK-NEXT: acc.loop gang({num=[[GANGNUM1]] : i32}) private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) (%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
!$acc loop gang(num: gangNum)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[GANGNUM2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK-NEXT: acc.loop gang({num=[[GANGNUM2]] : i32}) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[GANGNUM2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK-NEXT: acc.loop gang({num=[[GANGNUM2]] : i32}) private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) (%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
!$acc loop gang(num: gangNum, static: gangStatic)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.loop gang({num=%{{.*}} : i32, static=%{{.*}} : i32}) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.loop gang({num=%{{.*}} : i32, static=%{{.*}} : i32}) private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) (%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
!$acc loop vector
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: } attributes {vector = [#acc.device_type<none>]}{{$}}
+! CHECK: acc.loop private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) (%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, vector = [#acc.device_type<none>]}
!$acc loop vector(128)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[CONSTANT128:%.*]] = arith.constant 128 : i32
-!CHECK: acc.loop vector([[CONSTANT128]] : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[CONSTANT128:%.*]] = arith.constant 128 : i32
+! CHECK: acc.loop vector([[CONSTANT128]] : i32) private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) (%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc loop vector(vectorLength)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[VECTORLENGTH:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK: acc.loop vector([[VECTORLENGTH]] : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[VECTORLENGTH:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK: acc.loop vector([[VECTORLENGTH]] : i32) private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) (%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
!$acc loop worker
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: } attributes {worker = [#acc.device_type<none>]}{{$}}
+! CHECK: acc.loop private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) (%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, worker = [#acc.device_type<none>]}
!$acc loop worker(128)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[WORKER128:%.*]] = arith.constant 128 : i32
-!CHECK: acc.loop worker([[WORKER128]] : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[WORKER128:%.*]] = arith.constant 128 : i32
+! CHECK: acc.loop worker([[WORKER128]] : i32) private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) (%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
!$acc loop private(c)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.loop private(@privatization_ref_10x10xf32 -> %{{.*}} : !fir.ref<!fir.array<10x10xf32>>) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.loop private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>, @privatization_ref_10x10xf32 -> %{{.*}} : !fir.ref<!fir.array<10x10xf32>>) (%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
!$acc loop private(c, d)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.loop private(@privatization_ref_10x10xf32 -> %{{.*}} : !fir.ref<!fir.array<10x10xf32>>, @privatization_ref_10x10xf32 -> %{{.*}} : !fir.ref<!fir.array<10x10xf32>>) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.loop private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>, @privatization_ref_10x10xf32 -> %{{.*}} : !fir.ref<!fir.array<10x10xf32>>, @privatization_ref_10x10xf32 -> %{{.*}} : !fir.ref<!fir.array<10x10xf32>>) (%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
!$acc loop private(c) private(d)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.loop private(@privatization_ref_10x10xf32 -> %{{.*}} : !fir.ref<!fir.array<10x10xf32>>, @privatization_ref_10x10xf32 -> %{{.*}} : !fir.ref<!fir.array<10x10xf32>>) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.loop private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>, @privatization_ref_10x10xf32 -> %{{.*}} : !fir.ref<!fir.array<10x10xf32>>, @privatization_ref_10x10xf32 -> %{{.*}} : !fir.ref<!fir.array<10x10xf32>>) (%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
!$acc loop tile(2)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[TILESIZE:%.*]] = arith.constant 2 : i32
-!CHECK: acc.loop tile({[[TILESIZE]] : i32}) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+
+! CHECK: [[TILESIZE:%.*]] = arith.constant 2 : i32
+! CHECK: acc.loop {{.*}} tile({[[TILESIZE]] : i32}) (%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
!$acc loop tile(*)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[TILESIZEM1:%.*]] = arith.constant -1 : i32
-!CHECK: acc.loop tile({[[TILESIZEM1]] : i32}) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[TILESIZEM1:%.*]] = arith.constant -1 : i32
+! CHECK: acc.loop {{.*}} tile({[[TILESIZEM1]] : i32}) (%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
!$acc loop tile(2, 2)
DO i = 1, n
@@ -214,22 +197,20 @@ program acc_loop
END DO
END DO
-!CHECK: [[TILESIZE1:%.*]] = arith.constant 2 : i32
-!CHECK: [[TILESIZE2:%.*]] = arith.constant 2 : i32
-!CHECK: acc.loop tile({[[TILESIZE1]] : i32, [[TILESIZE2]] : i32}) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[TILESIZE1:%.*]] = arith.constant 2 : i32
+! CHECK: [[TILESIZE2:%.*]] = arith.constant 2 : i32
+! CHECK: acc.loop {{.*}} tile({[[TILESIZE1]] : i32, [[TILESIZE2]] : i32}) (%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
!$acc loop tile(tileSize)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.loop tile({%{{.*}} : i32}) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.loop {{.*}} tile({%{{.*}} : i32}) (%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
!$acc loop tile(tileSize, tileSize)
DO i = 1, n
@@ -238,10 +219,9 @@ program acc_loop
END DO
END DO
-!CHECK: acc.loop tile({%{{.*}} : i32, %{{.*}} : i32}) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.loop {{.*}} tile({%{{.*}} : i32, %{{.*}} : i32}) (%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
!$acc loop collapse(2)
DO i = 1, n
@@ -250,11 +230,11 @@ program acc_loop
END DO
END DO
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: } attributes {collapse = [2], collapseDeviceType = [#acc.device_type<none>]}
+! CHECK: acc.loop {{.*}} (%arg0 : i32, %arg1 : i32) = (%{{.*}} : i32, i32) to (%{{.*}} : i32, i32) step (%{{.*}} : i32, i32) {
+! CHECK: fir.store %arg0 to %{{.*}} : !fir.ref<i32>
+! CHECK: fir.store %arg1 to %{{.*}} : !fir.ref<i32>
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {collapse = [2], collapseDeviceType = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true, true>}
!$acc loop
DO i = 1, n
@@ -264,14 +244,12 @@ program acc_loop
END DO
END DO
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.loop {{.*}} (%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
+! CHECK: acc.loop {{.*}} (%arg1 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
!$acc loop reduction(+:reduction_r) reduction(*:reduction_i)
do i = 1, n
@@ -279,31 +257,27 @@ program acc_loop
reduction_i = 1
end do
-! CHECK: acc.loop reduction(@reduction_add_ref_f32 -> %{{.*}} : !fir.ref<f32>, @reduction_mul_ref_i32 -> %{{.*}} : !fir.ref<i32>) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) reduction(@reduction_add_ref_f32 -> %{{.*}} : !fir.ref<f32>, @reduction_mul_ref_i32 -> %{{.*}} : !fir.ref<i32>) (%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
!$acc loop gang(dim: gangDim, static: gangStatic)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.loop gang({dim=%{{.*}}, static=%{{.*}} : i32}) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.loop gang({dim=%{{.*}}, static=%{{.*}} : i32}) {{.*}} (%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
!$acc loop gang(dim: 1)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[GANGDIM1:%.*]] = arith.constant 1 : i32
-!CHECK-NEXT: acc.loop gang({dim=[[GANGDIM1]] : i32}) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.loop gang({dim={{.*}} : i32}) {{.*}} (%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
!$acc loop
DO i = 1, n
@@ -312,12 +286,11 @@ program acc_loop
END DO
! CHECK: %[[CACHE:.*]] = acc.cache varPtr(%{{.*}} : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
-! CHECK: acc.loop cache(%[[CACHE]] : !fir.ref<!fir.array<10xf32>>)
+! CHECK: acc.loop {{.*}} cache(%[[CACHE]] : !fir.ref<!fir.array<10xf32>>)
!$acc loop
do 100 i=0, n
100 continue
! CHECK: acc.loop
-! CHECK: fir.do_loop
end program
diff --git a/flang/test/Lower/OpenACC/acc-parallel-loop.f90 b/flang/test/Lower/OpenACC/acc-parallel-loop.f90
index e9150a71f3826b..78bacd73a16bb0 100644
--- a/flang/test/Lower/OpenACC/acc-parallel-loop.f90
+++ b/flang/test/Lower/OpenACC/acc-parallel-loop.f90
@@ -45,8 +45,7 @@ subroutine acc_parallel_loop
END DO
! CHECK: acc.parallel {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -59,8 +58,7 @@ subroutine acc_parallel_loop
!$acc end parallel loop
! CHECK: acc.parallel {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -73,8 +71,7 @@ subroutine acc_parallel_loop
! CHECK: [[ASYNC1:%.*]] = arith.constant 1 : i32
! CHECK: acc.parallel async([[ASYNC1]] : i32) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -87,8 +84,7 @@ subroutine acc_parallel_loop
! CHECK: [[ASYNC2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
! CHECK: acc.parallel async([[ASYNC2]] : i32) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -100,8 +96,7 @@ subroutine acc_parallel_loop
END DO
! CHECK: acc.parallel {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -114,8 +109,7 @@ subroutine acc_parallel_loop
! CHECK: [[WAIT1:%.*]] = arith.constant 1 : i32
! CHECK: acc.parallel wait({[[WAIT1]] : i32}) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -129,8 +123,7 @@ subroutine acc_parallel_loop
! CHECK: [[WAIT2:%.*]] = arith.constant 1 : i32
! CHECK: [[WAIT3:%.*]] = arith.constant 2 : i32
! CHECK: acc.parallel wait({[[WAIT2]] : i32, [[WAIT3]] : i32}) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -144,8 +137,7 @@ subroutine acc_parallel_loop
! CHECK: [[WAIT4:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
! CHECK: [[WAIT5:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
! CHECK: acc.parallel wait({[[WAIT4]] : i32, [[WAIT5]] : i32}) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -158,8 +150,7 @@ subroutine acc_parallel_loop
! CHECK: [[NUMGANGS1:%.*]] = arith.constant 1 : i32
! CHECK: acc.parallel num_gangs({[[NUMGANGS1]] : i32}) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -172,8 +163,7 @@ subroutine acc_parallel_loop
! CHECK: [[NUMGANGS2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
! CHECK: acc.parallel num_gangs({[[NUMGANGS2]] : i32}) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -186,8 +176,7 @@ subroutine acc_parallel_loop
! CHECK: [[NUMWORKERS1:%.*]] = arith.constant 10 : i32
! CHECK: acc.parallel num_workers([[NUMWORKERS1]] : i32) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -200,8 +189,7 @@ subroutine acc_parallel_loop
! CHECK: [[NUMWORKERS2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
! CHECK: acc.parallel num_workers([[NUMWORKERS2]] : i32) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -214,8 +202,7 @@ subroutine acc_parallel_loop
! CHECK: [[VECTORLENGTH1:%.*]] = arith.constant 128 : i32
! CHECK: acc.parallel vector_length([[VECTORLENGTH1]] : i32) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -228,8 +215,7 @@ subroutine acc_parallel_loop
! CHECK: [[VECTORLENGTH2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
! CHECK: acc.parallel vector_length([[VECTORLENGTH2]] : i32) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -242,8 +228,7 @@ subroutine acc_parallel_loop
! CHECK: [[IF1:%.*]] = arith.constant true
! CHECK: acc.parallel if([[IF1]]) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -257,8 +242,7 @@ subroutine acc_parallel_loop
! CHECK: [[IFCOND:%.*]] = fir.load %{{.*}} : !fir.ref<!fir.logical<4>>
! CHECK: [[IF2:%.*]] = fir.convert [[IFCOND]] : (!fir.logical<4>) -> i1
! CHECK: acc.parallel if([[IF2]]) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -271,8 +255,7 @@ subroutine acc_parallel_loop
! CHECK: [[SELF1:%.*]] = arith.constant true
! CHECK: acc.parallel self([[SELF1]]) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -284,8 +267,7 @@ subroutine acc_parallel_loop
END DO
! CHECK: acc.parallel {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -298,8 +280,7 @@ subroutine acc_parallel_loop
! CHECK: %[[SELF2:.*]] = fir.convert %[[DECLIFCONDITION]]#1 : (!fir.ref<!fir.logical<4>>) -> i1
! CHECK: acc.parallel self(%[[SELF2]]) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -313,8 +294,7 @@ subroutine acc_parallel_loop
! CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copy>, name = "a"}
! CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copy>, name = "b"}
! CHECK: acc.parallel dataOperands(%[[COPYIN_A]], %[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -330,8 +310,7 @@ subroutine acc_parallel_loop
! CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copy>, name = "a"}
! CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copy>, name = "b"}
! CHECK: acc.parallel dataOperands(%[[COPYIN_A]], %[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -347,8 +326,7 @@ subroutine acc_parallel_loop
! CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
! CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copyin_readonly>, name = "b"}
! CHECK: acc.parallel dataOperands(%[[COPYIN_A]], %[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -362,8 +340,7 @@ subroutine acc_parallel_loop
! CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copyout>, name = "a"}
! CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copyout>, name = "b"}
! CHECK: acc.parallel dataOperands(%[[CREATE_A]], %[[CREATE_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -379,8 +356,7 @@ subroutine acc_parallel_loop
! CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
! CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_create_zero>, name = "a"}
! CHECK: acc.parallel dataOperands(%[[CREATE_B]], %[[CREATE_A]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -396,8 +372,7 @@ subroutine acc_parallel_loop
! CHECK: %[[NOCREATE_A:.*]] = acc.nocreate varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
! CHECK: %[[NOCREATE_B:.*]] = acc.nocreate varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
! CHECK: acc.parallel dataOperands(%[[NOCREATE_A]], %[[NOCREATE_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -411,8 +386,7 @@ subroutine acc_parallel_loop
! CHECK: %[[PRESENT_A:.*]] = acc.present varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
! CHECK: %[[PRESENT_B:.*]] = acc.present varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
! CHECK: acc.parallel dataOperands(%[[PRESENT_A]], %[[PRESENT_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -426,8 +400,7 @@ subroutine acc_parallel_loop
! CHECK: %[[DEVICEPTR_A:.*]] = acc.deviceptr varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
! CHECK: %[[DEVICEPTR_B:.*]] = acc.deviceptr varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
! CHECK: acc.parallel dataOperands(%[[DEVICEPTR_A]], %[[DEVICEPTR_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -445,8 +418,7 @@ subroutine acc_parallel_loop
! CHECK: %[[BOX_ADDR_G:.*]] = fir.box_addr %[[BOX_G]] : (!fir.box<!fir.ptr<f32>>) -> !fir.ptr<f32>
! CHECK: %[[ATTACH_G:.*]] = acc.attach varPtr(%[[BOX_ADDR_G]] : !fir.ptr<f32>) -> !fir.ptr<f32> {name = "g"}
! CHECK: acc.parallel dataOperands(%[[ATTACH_F]], %[[ATTACH_G]] : !fir.ptr<f32>, !fir.ptr<f32>) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -460,8 +432,8 @@ subroutine acc_parallel_loop
! CHECK: %[[ACC_PRIVATE_B:.*]] = acc.firstprivate varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
! CHECK: acc.parallel firstprivate(@firstprivatization_section_ext10_ref_10xf32 -> %[[ACC_PRIVATE_B]] : !fir.ref<!fir.array<10xf32>>) {
! CHECK: %[[ACC_PRIVATE_A:.*]] = acc.private varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
-! CHECK: acc.loop private(@privatization_ref_10xf32 -> %[[ACC_PRIVATE_A]] : !fir.ref<!fir.array<10xf32>>) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop private({{.*}}@privatization_ref_10xf32 -> %[[ACC_PRIVATE_A]] : !fir.ref<!fir.array<10xf32>>)
+! CHECK-NOT: fir.do_loop
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -473,10 +445,9 @@ subroutine acc_parallel_loop
END DO
! CHECK: acc.parallel {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {seq = [#acc.device_type<none>]}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<none>]}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -486,10 +457,9 @@ subroutine acc_parallel_loop
END DO
! CHECK: acc.parallel {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>]}
+! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -499,10 +469,9 @@ subroutine acc_parallel_loop
END DO
! CHECK: acc.parallel {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {independent = [#acc.device_type<none>]}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -512,10 +481,9 @@ subroutine acc_parallel_loop
END DO
! CHECK: acc.parallel {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {gang = [#acc.device_type<none>]}{{$}}
+! CHECK-NEXT: } attributes {gang = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}{{$}}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -526,8 +494,7 @@ subroutine acc_parallel_loop
! CHECK: acc.parallel {
! CHECK: [[GANGNUM1:%.*]] = arith.constant 8 : i32
-! CHECK-NEXT: acc.loop gang({num=[[GANGNUM1]] : i32}) {
-! CHECK: fir.do_loop
+! CHECK-NEXT: acc.loop gang({num=[[GANGNUM1]] : i32})
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -540,8 +507,7 @@ subroutine acc_parallel_loop
! CHECK: acc.parallel {
! CHECK: [[GANGNUM2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-! CHECK-NEXT: acc.loop gang({num=[[GANGNUM2]] : i32}) {
-! CHECK: fir.do_loop
+! CHECK-NEXT: acc.loop gang({num=[[GANGNUM2]] : i32})
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -553,8 +519,7 @@ subroutine acc_parallel_loop
END DO
! CHECK: acc.parallel {
-! CHECK: acc.loop gang({num=%{{.*}} : i32, static=%{{.*}} : i32}) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop gang({num=%{{.*}} : i32, static=%{{.*}} : i32})
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -565,10 +530,9 @@ subroutine acc_parallel_loop
a(i) = b(i)
END DO
! CHECK: acc.parallel {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {vector = [#acc.device_type<none>]}{{$}}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, vector = [#acc.device_type<none>]}{{$}}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -579,8 +543,7 @@ subroutine acc_parallel_loop
! CHECK: acc.parallel {
! CHECK: [[CONSTANT128:%.*]] = arith.constant 128 : i32
-! CHECK: acc.loop vector([[CONSTANT128]] : i32) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop vector([[CONSTANT128]] : i32) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -593,8 +556,8 @@ subroutine acc_parallel_loop
! CHECK: acc.parallel {
! CHECK: [[VECTORLENGTH:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-! CHECK: acc.loop vector([[VECTORLENGTH]] : i32) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop vector([[VECTORLENGTH]] : i32) {{.*}} {
+! CHECK-NOT: fir.do_loop
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -606,10 +569,10 @@ subroutine acc_parallel_loop
END DO
! CHECK: acc.parallel {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
+! CHECK-NOT: fir.do_loop
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {worker = [#acc.device_type<none>]}{{$}}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, worker = [#acc.device_type<none>]}{{$}}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -620,8 +583,8 @@ subroutine acc_parallel_loop
! CHECK: acc.parallel {
! CHECK: [[WORKER128:%.*]] = arith.constant 128 : i32
-! CHECK: acc.loop worker([[WORKER128]] : i32) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop worker([[WORKER128]] : i32) {{.*}} {
+! CHECK-NOT: fir.do_loop
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -635,11 +598,9 @@ subroutine acc_parallel_loop
END DO
! CHECK: acc.parallel {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {collapse = [2], collapseDeviceType = [#acc.device_type<none>]}
+! CHECK-NEXT: } attributes {collapse = [2], collapseDeviceType = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true, true>}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -652,10 +613,8 @@ subroutine acc_parallel_loop
END DO
! CHECK: acc.parallel {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -670,8 +629,7 @@ subroutine acc_parallel_loop
! CHECK: acc.parallel {
! CHECK: [[TILESIZE:%.*]] = arith.constant 2 : i32
-! CHECK: acc.loop tile({[[TILESIZE]] : i32}) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} tile({[[TILESIZE]] : i32}) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -684,8 +642,7 @@ subroutine acc_parallel_loop
! CHECK: acc.parallel {
! CHECK: [[TILESIZEM1:%.*]] = arith.constant -1 : i32
-! CHECK: acc.loop tile({[[TILESIZEM1]] : i32}) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} tile({[[TILESIZEM1]] : i32}) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -701,8 +658,7 @@ subroutine acc_parallel_loop
! CHECK: acc.parallel {
! CHECK: [[TILESIZE1:%.*]] = arith.constant 2 : i32
! CHECK: [[TILESIZE2:%.*]] = arith.constant 2 : i32
-! CHECK: acc.loop tile({[[TILESIZE1]] : i32, [[TILESIZE2]] : i32}) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} tile({[[TILESIZE1]] : i32, [[TILESIZE2]] : i32}) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -714,8 +670,7 @@ subroutine acc_parallel_loop
END DO
! CHECK: acc.parallel {
-! CHECK: acc.loop tile({%{{.*}} : i32}) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} tile({%{{.*}} : i32}) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -729,8 +684,7 @@ subroutine acc_parallel_loop
END DO
! CHECK: acc.parallel {
-! CHECK: acc.loop tile({%{{.*}} : i32, %{{.*}} : i32}) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} tile({%{{.*}} : i32, %{{.*}} : i32}) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -745,8 +699,7 @@ subroutine acc_parallel_loop
! CHECK: %[[COPYINREDR:.*]] = acc.copyin varPtr(%{{.*}} : !fir.ref<f32>) -> !fir.ref<f32> {dataClause = #acc<data_clause acc_reduction>, implicit = true, name = "reduction_r"}
! CHECK: %[[COPYINREDI:.*]] = acc.copyin varPtr(%{{.*}} : !fir.ref<i32>) -> !fir.ref<i32> {dataClause = #acc<data_clause acc_reduction>, implicit = true, name = "reduction_i"}
! CHECK: acc.parallel dataOperands(%[[COPYINREDR]], %[[COPYINREDI]] : !fir.ref<f32>, !fir.ref<i32>) {
-! CHECK: acc.loop reduction(@reduction_add_ref_f32 -> %{{.*}} : !fir.ref<f32>, @reduction_mul_ref_i32 -> %{{.*}} : !fir.ref<i32>) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} reduction(@reduction_add_ref_f32 -> %{{.*}} : !fir.ref<f32>, @reduction_mul_ref_i32 -> %{{.*}} : !fir.ref<i32>) {{.*}}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -754,11 +707,12 @@ subroutine acc_parallel_loop
! CHECK: acc.copyout accPtr(%[[COPYINREDR]] : !fir.ref<f32>) to varPtr(%{{.*}} : !fir.ref<f32>) {dataClause = #acc<data_clause acc_reduction>, implicit = true, name = "reduction_r"}
! CHECK: acc.copyout accPtr(%[[COPYINREDI]] : !fir.ref<i32>) to varPtr(%{{.*}} : !fir.ref<i32>) {dataClause = #acc<data_clause acc_reduction>, implicit = true, name = "reduction_i"}
+
!$acc parallel loop
do 10 i=0, n
10 continue
! CHECK: acc.parallel
! CHECK: acc.loop
-! CHECK: fir.do_loop
+! CHECK-NOT: fir.do_loop
end subroutine acc_parallel_loop
diff --git a/flang/test/Lower/OpenACC/acc-private.f90 b/flang/test/Lower/OpenACC/acc-private.f90
index 042596568bd774..c0bcb5e2ffd567 100644
--- a/flang/test/Lower/OpenACC/acc-private.f90
+++ b/flang/test/Lower/OpenACC/acc-private.f90
@@ -189,7 +189,7 @@ program acc_private
END DO
! CHECK: %[[C_PRIVATE:.*]] = acc.private varPtr(%[[DECLC]]#1 : !fir.ref<i32>) -> !fir.ref<i32> {name = "c"}
-! CHECK: acc.loop private(@privatization_ref_i32 -> %[[C_PRIVATE]] : !fir.ref<i32>)
+! CHECK: acc.loop private({{.*}}@privatization_ref_i32 -> %[[C_PRIVATE]] : !fir.ref<i32>)
! CHECK: acc.yield
!$acc loop private(b)
@@ -203,7 +203,7 @@ program acc_private
! CHECK: %[[UB:.*]] = arith.subi %{{.*}}, %[[C1]] : index
! CHECK: %[[BOUND:.*]] = acc.bounds lowerbound(%[[LB]] : index) upperbound(%[[UB]] : index) extent(%{{.*}} : index) stride(%[[C1]] : index) startIdx(%[[C1]] : index)
! CHECK: %[[B_PRIVATE:.*]] = acc.private varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<100xf32>>) bounds(%[[BOUND]]) -> !fir.ref<!fir.array<100xf32>> {name = "b"}
-! CHECK: acc.loop private(@privatization_ref_100xf32 -> %[[B_PRIVATE]] : !fir.ref<!fir.array<100xf32>>) {
+! CHECK: acc.loop private({{.*}}@privatization_ref_100xf32 -> %[[B_PRIVATE]] : !fir.ref<!fir.array<100xf32>>)
! CHECK: acc.yield
!$acc loop private(b(1:50))
@@ -217,7 +217,7 @@ program acc_private
! CHECK: %[[UB:.*]] = arith.constant 49 : index
! CHECK: %[[BOUND:.*]] = acc.bounds lowerbound(%[[LB]] : index) upperbound(%[[UB]] : index) extent(%{{.*}} : index) stride(%[[C1]] : index) startIdx(%[[C1]] : index)
! CHECK: %[[B_PRIVATE:.*]] = acc.private varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<100xf32>>) bounds(%[[BOUND]]) -> !fir.ref<!fir.array<50xf32>> {name = "b(1:50)"}
-! CHECK: acc.loop private(@privatization_ref_50xf32 -> %[[B_PRIVATE]] : !fir.ref<!fir.array<50xf32>>)
+! CHECK: acc.loop private({{.*}}@privatization_ref_50xf32 -> %[[B_PRIVATE]] : !fir.ref<!fir.array<50xf32>>)
!$acc parallel loop firstprivate(c)
DO i = 1, n
@@ -273,7 +273,7 @@ subroutine acc_private_assumed_shape(a, n)
! CHECK: acc.parallel {
! CHECK: %[[ADDR:.*]] = fir.box_addr %[[DECL_A]]#1 : (!fir.box<!fir.array<?xi32>>) -> !fir.ref<!fir.array<?xi32>>
! CHECK: %[[PRIVATE:.*]] = acc.private varPtr(%[[ADDR]] : !fir.ref<!fir.array<?xi32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<?xi32>> {name = "a"}
-! CHECK: acc.loop private(@privatization_box_Uxi32 -> %[[PRIVATE]] : !fir.ref<!fir.array<?xi32>>) {
+! CHECK: acc.loop private({{.*}}@privatization_box_Uxi32 -> %[[PRIVATE]] : !fir.ref<!fir.array<?xi32>>)
subroutine acc_private_allocatable_array(a, n)
integer, allocatable :: a(:)
@@ -296,7 +296,7 @@ subroutine acc_private_allocatable_array(a, n)
! CHECK: %[[BOX:.*]] = fir.load %[[DECLA_A]]#1 : !fir.ref<!fir.box<!fir.heap<!fir.array<?xi32>>>>
! CHECK: %[[BOX_ADDR:.*]] = fir.box_addr %[[BOX]] : (!fir.box<!fir.heap<!fir.array<?xi32>>>) -> !fir.heap<!fir.array<?xi32>>
! CHECK: %[[PRIVATE:.*]] = acc.private varPtr(%[[BOX_ADDR]] : !fir.heap<!fir.array<?xi32>>) bounds(%{{.*}}) -> !fir.heap<!fir.array<?xi32>> {name = "a"}
-! CHECK: acc.loop private(@privatization_box_heap_Uxi32 -> %[[PRIVATE]] : !fir.heap<!fir.array<?xi32>>)
+! CHECK: acc.loop private({{.*}}@privatization_box_heap_Uxi32 -> %[[PRIVATE]] : !fir.heap<!fir.array<?xi32>>)
! CHECK: acc.serial private(@privatization_box_heap_Uxi32 -> %{{.*}} : !fir.heap<!fir.array<?xi32>>)
subroutine acc_private_pointer_array(a, n)
@@ -316,7 +316,7 @@ subroutine acc_private_pointer_array(a, n)
! CHECK: %[[BOX:.*]] = fir.load %[[DECLA_A]]#1 : !fir.ref<!fir.box<!fir.ptr<!fir.array<?xi32>>>>
! CHECK: %[[BOX_ADDR:.*]] = fir.box_addr %[[BOX]] : (!fir.box<!fir.ptr<!fir.array<?xi32>>>) -> !fir.ptr<!fir.array<?xi32>>
! CHECK: %[[PRIVATE:.*]] = acc.private varPtr(%[[BOX_ADDR]] : !fir.ptr<!fir.array<?xi32>>) bounds(%{{.*}}) -> !fir.ptr<!fir.array<?xi32>> {name = "a"}
-! CHECK: acc.loop private(@privatization_box_ptr_Uxi32 -> %[[PRIVATE]] : !fir.ptr<!fir.array<?xi32>>)
+! CHECK: acc.loop private({{.*}}@privatization_box_ptr_Uxi32 -> %[[PRIVATE]] : !fir.ptr<!fir.array<?xi32>>)
subroutine acc_private_dynamic_extent(a, n)
integer :: n, i
@@ -334,7 +334,7 @@ subroutine acc_private_dynamic_extent(a, n)
! CHECK: %[[DECL_A:.*]]:2 = hlfir.declare %[[ARG0]](%16) {uniq_name = "_QFacc_private_dynamic_extentEa"} : (!fir.ref<!fir.array<?x?x2xi32>>, !fir.shape<3>) -> (!fir.box<!fir.array<?x?x2xi32>>, !fir.ref<!fir.array<?x?x2xi32>>)
! CHECK: acc.parallel {
! CHECK: %[[PRIV:.*]] = acc.private varPtr(%[[DECL_A]]#1 : !fir.ref<!fir.array<?x?x2xi32>>) bounds(%{{.*}}, %{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<?x?x2xi32>> {name = "a"}
-! CHECK: acc.loop private(@privatization_ref_UxUx2xi32 -> %[[PRIV]] : !fir.ref<!fir.array<?x?x2xi32>>)
+! CHECK: acc.loop private({{.*}}@privatization_ref_UxUx2xi32 -> %[[PRIV]] : !fir.ref<!fir.array<?x?x2xi32>>)
subroutine acc_firstprivate_assumed_shape(a, n)
integer :: a(:), i, n
diff --git a/flang/test/Lower/OpenACC/acc-reduction.f90 b/flang/test/Lower/OpenACC/acc-reduction.f90
index dcfa77c9f97dbe..d1dad61e2ff6bc 100644
--- a/flang/test/Lower/OpenACC/acc-reduction.f90
+++ b/flang/test/Lower/OpenACC/acc-reduction.f90
@@ -706,7 +706,7 @@ subroutine acc_reduction_add_int(a, b)
! HLFIR: %[[DECLB:.*]]:2 = hlfir.declare %[[B]]
! FIR: %[[RED_B:.*]] = acc.reduction varPtr(%[[B]] : !fir.ref<i32>) -> !fir.ref<i32> {name = "b"}
! HLFIR: %[[RED_B:.*]] = acc.reduction varPtr(%[[DECLB]]#1 : !fir.ref<i32>) -> !fir.ref<i32> {name = "b"}
-! CHECK: acc.loop reduction(@reduction_add_ref_i32 -> %[[RED_B]] : !fir.ref<i32>)
+! CHECK: acc.loop {{.*}} reduction(@reduction_add_ref_i32 -> %[[RED_B]] : !fir.ref<i32>)
subroutine acc_reduction_add_int_array_1d(a, b)
integer :: a(100)
@@ -723,7 +723,7 @@ subroutine acc_reduction_add_int_array_1d(a, b)
! HLFIR: %[[DECLB:.*]]:2 = hlfir.declare %[[B]]
! FIR: %[[RED_B:.*]] = acc.reduction varPtr(%[[B]] : !fir.ref<!fir.array<100xi32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<100xi32>> {name = "b"}
! HLFIR: %[[RED_B:.*]] = acc.reduction varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<100xi32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<100xi32>> {name = "b"}
-! CHECK: acc.loop reduction(@reduction_add_section_ext100_ref_100xi32 -> %[[RED_B]] : !fir.ref<!fir.array<100xi32>>)
+! CHECK: acc.loop {{.*}} reduction(@reduction_add_section_ext100_ref_100xi32 -> %[[RED_B]] : !fir.ref<!fir.array<100xi32>>)
subroutine acc_reduction_add_int_array_2d(a, b)
integer :: a(100, 10), b(100, 10)
@@ -742,8 +742,8 @@ subroutine acc_reduction_add_int_array_2d(a, b)
! HLFIR: %[[DECLARG1:.*]]:2 = hlfir.declare %[[ARG1]]
! FIR: %[[RED_ARG1:.*]] = acc.reduction varPtr(%[[ARG1]] : !fir.ref<!fir.array<100x10xi32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<100x10xi32>> {name = "b"}
! HLFIR: %[[RED_ARG1:.*]] = acc.reduction varPtr(%[[DECLARG1]]#1 : !fir.ref<!fir.array<100x10xi32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<100x10xi32>> {name = "b"}
-! CHECK: acc.loop reduction(@reduction_add_section_ext100xext10_ref_100x10xi32 -> %[[RED_ARG1]] : !fir.ref<!fir.array<100x10xi32>>) {
-! CHECK: } attributes {collapse = [2], collapseDeviceType = [#acc.device_type<none>]}
+! CHECK: acc.loop {{.*}} reduction(@reduction_add_section_ext100xext10_ref_100x10xi32 -> %[[RED_ARG1]] : !fir.ref<!fir.array<100x10xi32>>)
+! CHECK: } attributes {collapse = [2]{{.*}}
subroutine acc_reduction_add_int_array_3d(a, b)
integer :: a(100, 10, 2), b(100, 10, 2)
@@ -764,8 +764,8 @@ subroutine acc_reduction_add_int_array_3d(a, b)
! HLFIR: %[[DECLARG1:.*]]:2 = hlfir.declare %[[ARG1]]
! FIR: %[[RED_ARG1:.*]] = acc.reduction varPtr(%[[ARG1]] : !fir.ref<!fir.array<100x10x2xi32>>) bounds(%{{.*}}, %{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<100x10x2xi32>> {name = "b"}
! HLFIR: %[[RED_ARG1:.*]] = acc.reduction varPtr(%[[DECLARG1]]#1 : !fir.ref<!fir.array<100x10x2xi32>>) bounds(%{{.*}}, %{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<100x10x2xi32>> {name = "b"}
-! CHECK: acc.loop reduction(@reduction_add_section_ext100xext10xext2_ref_100x10x2xi32 -> %[[RED_ARG1]] : !fir.ref<!fir.array<100x10x2xi32>>)
-! CHECK: } attributes {collapse = [3], collapseDeviceType = [#acc.device_type<none>]}
+! CHECK: acc.loop {{.*}} reduction(@reduction_add_section_ext100xext10xext2_ref_100x10x2xi32 -> %[[RED_ARG1]] : !fir.ref<!fir.array<100x10x2xi32>>)
+! CHECK: } attributes {collapse = [3]{{.*}}
subroutine acc_reduction_add_float(a, b)
real :: a(100), b
@@ -782,7 +782,7 @@ subroutine acc_reduction_add_float(a, b)
! HLFIR: %[[DECLB:.*]]:2 = hlfir.declare %[[B]]
! FIR: %[[RED_B:.*]] = acc.reduction varPtr(%[[B]] : !fir.ref<f32>) -> !fir.ref<f32> {name = "b"}
! HLFIR: %[[RED_B:.*]] = acc.reduction varPtr(%[[DECLB]]#1 : !fir.ref<f32>) -> !fir.ref<f32> {name = "b"}
-! CHECK: acc.loop reduction(@reduction_add_ref_f32 -> %[[RED_B]] : !fir.ref<f32>)
+! CHECK: acc.loop {{.*}} reduction(@reduction_add_ref_f32 -> %[[RED_B]] : !fir.ref<f32>)
subroutine acc_reduction_add_float_array_1d(a, b)
real :: a(100), b(100)
@@ -799,7 +799,7 @@ subroutine acc_reduction_add_float_array_1d(a, b)
! HLFIR: %[[DECLB:.*]]:2 = hlfir.declare %[[B]]
! FIR: %[[RED_B:.*]] = acc.reduction varPtr(%[[B]] : !fir.ref<!fir.array<100xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<100xf32>> {name = "b"}
! HLFIR: %[[RED_B:.*]] = acc.reduction varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<100xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<100xf32>> {name = "b"}
-! CHECK: acc.loop reduction(@reduction_add_section_ext100_ref_100xf32 -> %[[RED_B]] : !fir.ref<!fir.array<100xf32>>)
+! CHECK: acc.loop {{.*}} reduction(@reduction_add_section_ext100_ref_100xf32 -> %[[RED_B]] : !fir.ref<!fir.array<100xf32>>)
subroutine acc_reduction_mul_int(a, b)
integer :: a(100)
@@ -816,7 +816,7 @@ subroutine acc_reduction_mul_int(a, b)
! HLFIR: %[[DECLB:.*]]:2 = hlfir.declare %[[B]]
! FIR: %[[RED_B:.*]] = acc.reduction varPtr(%[[B]] : !fir.ref<i32>) -> !fir.ref<i32> {name = "b"}
! HLFIR: %[[RED_B:.*]] = acc.reduction varPtr(%[[DECLB]]#1 : !fir.ref<i32>) -> !fir.ref<i32> {name = "b"}
-! CHECK: acc.loop reduction(@reduction_mul_ref_i32 -> %[[RED_B]] : !fir.ref<i32>)
+! CHECK: acc.loop {{.*}} reduction(@reduction_mul_ref_i32 -> %[[RED_B]] : !fir.ref<i32>)
subroutine acc_reduction_mul_int_array_1d(a, b)
integer :: a(100)
@@ -833,7 +833,7 @@ subroutine acc_reduction_mul_int_array_1d(a, b)
! HLFIR: %[[DECLB:.*]]:2 = hlfir.declare %[[B]]
! FIR: %[[RED_B:.*]] = acc.reduction varPtr(%[[B]] : !fir.ref<!fir.array<100xi32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<100xi32>> {name = "b"}
! HLFIR: %[[RED_B:.*]] = acc.reduction varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<100xi32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<100xi32>> {name = "b"}
-! CHECK: acc.loop reduction(@reduction_mul_section_ext100_ref_100xi32 -> %[[RED_B]] : !fir.ref<!fir.array<100xi32>>)
+! CHECK: acc.loop {{.*}} reduction(@reduction_mul_section_ext100_ref_100xi32 -> %[[RED_B]] : !fir.ref<!fir.array<100xi32>>)
subroutine acc_reduction_mul_float(a, b)
real :: a(100), b
@@ -850,7 +850,7 @@ subroutine acc_reduction_mul_float(a, b)
! HLFIR: %[[DECLB:.*]]:2 = hlfir.declare %[[B]]
! FIR: %[[RED_B:.*]] = acc.reduction varPtr(%[[B]] : !fir.ref<f32>) -> !fir.ref<f32> {name = "b"}
! HLFIR: %[[RED_B:.*]] = acc.reduction varPtr(%[[DECLB]]#1 : !fir.ref<f32>) -> !fir.ref<f32> {name = "b"}
-! CHECK: acc.loop reduction(@reduction_mul_ref_f32 -> %[[RED_B]] : !fir.ref<f32>)
+! CHECK: acc.loop {{.*}} reduction(@reduction_mul_ref_f32 -> %[[RED_B]] : !fir.ref<f32>)
subroutine acc_reduction_mul_float_array_1d(a, b)
real :: a(100), b(100)
@@ -865,9 +865,9 @@ subroutine acc_reduction_mul_float_array_1d(a, b)
! CHECK-LABEL: func.func @_QPacc_reduction_mul_float_array_1d(
! CHECK-SAME: %{{.*}}: !fir.ref<!fir.array<100xf32>> {fir.bindc_name = "a"}, %[[B:.*]]: !fir.ref<!fir.array<100xf32>> {fir.bindc_name = "b"})
! HLFIR: %[[DECLB:.*]]:2 = hlfir.declare %[[B]]
-! FIR: %[[RED_B:.*]] = acc.reduction varPtr(%[[B]] : !fir.ref<!fir.array<100xf32>>) bounds(%2) -> !fir.ref<!fir.array<100xf32>> {name = "b"}
+! FIR: %[[RED_B:.*]] = acc.reduction varPtr(%[[B]] : !fir.ref<!fir.array<100xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<100xf32>> {name = "b"}
! HLFIR: %[[RED_B:.*]] = acc.reduction varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<100xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<100xf32>> {name = "b"}
-! CHECK: acc.loop reduction(@reduction_mul_section_ext100_ref_100xf32 -> %[[RED_B]] : !fir.ref<!fir.array<100xf32>>)
+! CHECK: acc.loop {{.*}} reduction(@reduction_mul_section_ext100_ref_100xf32 -> %[[RED_B]] : !fir.ref<!fir.array<100xf32>>)
subroutine acc_reduction_min_int(a, b)
integer :: a(100)
@@ -884,7 +884,7 @@ subroutine acc_reduction_min_int(a, b)
! HLFIR: %[[DECLB:.*]]:2 = hlfir.declare %[[B]]
! FIR: %[[RED_B:.*]] = acc.reduction varPtr(%[[B]] : !fir.ref<i32>) -> !fir.ref<i32> {name = "b"}
! HLFIR: %[[RED_B:.*]] = acc.reduction varPtr(%[[DECLB]]#1 : !fir.ref<i32>) -> !fir.ref<i32> {name = "b"}
-! CHECK: acc.loop reduction(@reduction_min_ref_i32 -> %[[RED_B]] : !fir.ref<i32>)
+! CHECK: acc.loop {{.*}} reduction(@reduction_min_ref_i32 -> %[[RED_B]] : !fir.ref<i32>)
subroutine acc_reduction_min_int_array_1d(a, b)
integer :: a(100), b(100)
@@ -899,9 +899,9 @@ subroutine acc_reduction_min_int_array_1d(a, b)
! CHECK-LABEL: func.func @_QPacc_reduction_min_int_array_1d(
! CHECK-SAME: %{{.*}}: !fir.ref<!fir.array<100xi32>> {fir.bindc_name = "a"}, %[[ARG1:.*]]: !fir.ref<!fir.array<100xi32>> {fir.bindc_name = "b"})
! HLFIR: %[[DECLARG1:.*]]:2 = hlfir.declare %[[ARG1]]
-! FIR: %[[RED_ARG1:.*]] = acc.reduction varPtr(%[[ARG1]] : !fir.ref<!fir.array<100xi32>>) bounds(%2) -> !fir.ref<!fir.array<100xi32>> {name = "b"}
+! FIR: %[[RED_ARG1:.*]] = acc.reduction varPtr(%[[ARG1]] : !fir.ref<!fir.array<100xi32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<100xi32>> {name = "b"}
! HLFIR: %[[RED_ARG1:.*]] = acc.reduction varPtr(%[[DECLARG1]]#1 : !fir.ref<!fir.array<100xi32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<100xi32>> {name = "b"}
-! CHECK: acc.loop reduction(@reduction_min_section_ext100_ref_100xi32 -> %[[RED_ARG1]] : !fir.ref<!fir.array<100xi32>>)
+! CHECK: acc.loop {{.*}} reduction(@reduction_min_section_ext100_ref_100xi32 -> %[[RED_ARG1]] : !fir.ref<!fir.array<100xi32>>)
subroutine acc_reduction_min_float(a, b)
real :: a(100), b
@@ -918,7 +918,7 @@ subroutine acc_reduction_min_float(a, b)
! HLFIR: %[[DECLB:.*]]:2 = hlfir.declare %[[B]]
! FIR: %[[RED_B:.*]] = acc.reduction varPtr(%[[B]] : !fir.ref<f32>) -> !fir.ref<f32> {name = "b"}
! HLFIR: %[[RED_B:.*]] = acc.reduction varPtr(%[[DECLB]]#1 : !fir.ref<f32>) -> !fir.ref<f32> {name = "b"}
-! CHECK: acc.loop reduction(@reduction_min_ref_f32 -> %[[RED_B]] : !fir.ref<f32>)
+! CHECK: acc.loop {{.*}} reduction(@reduction_min_ref_f32 -> %[[RED_B]] : !fir.ref<f32>)
subroutine acc_reduction_min_float_array2d(a, b)
real :: a(100, 10), b(100, 10)
@@ -935,10 +935,10 @@ subroutine acc_reduction_min_float_array2d(a, b)
! CHECK-LABEL: func.func @_QPacc_reduction_min_float_array2d(
! CHECK-SAME: %{{.*}}: !fir.ref<!fir.array<100x10xf32>> {fir.bindc_name = "a"}, %[[ARG1:.*]]: !fir.ref<!fir.array<100x10xf32>> {fir.bindc_name = "b"})
! HLFIR: %[[DECLARG1:.*]]:2 = hlfir.declare %[[ARG1]]
-! FIR: %[[RED_ARG1:.*]] = acc.reduction varPtr(%[[ARG1]] : !fir.ref<!fir.array<100x10xf32>>) bounds(%3, %5) -> !fir.ref<!fir.array<100x10xf32>> {name = "b"}
+! FIR: %[[RED_ARG1:.*]] = acc.reduction varPtr(%[[ARG1]] : !fir.ref<!fir.array<100x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<100x10xf32>> {name = "b"}
! HLFIR: %[[RED_ARG1:.*]] = acc.reduction varPtr(%[[DECLARG1]]#1 : !fir.ref<!fir.array<100x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<100x10xf32>> {name = "b"}
-! CHECK: acc.loop reduction(@reduction_min_section_ext100xext10_ref_100x10xf32 -> %[[RED_ARG1]] : !fir.ref<!fir.array<100x10xf32>>)
-! CHECK: attributes {collapse = [2], collapseDeviceType = [#acc.device_type<none>]}
+! CHECK: acc.loop {{.*}} reduction(@reduction_min_section_ext100xext10_ref_100x10xf32 -> %[[RED_ARG1]] : !fir.ref<!fir.array<100x10xf32>>)
+! CHECK: attributes {collapse = [2]{{.*}}
subroutine acc_reduction_max_int(a, b)
integer :: a(100)
@@ -955,7 +955,7 @@ subroutine acc_reduction_max_int(a, b)
! HLFIR: %[[DECLB:.*]]:2 = hlfir.declare %[[B]]
! FIR: %[[RED_B:.*]] = acc.reduction varPtr(%[[B]] : !fir.ref<i32>) -> !fir.ref<i32> {name = "b"}
! HLFIR: %[[RED_B:.*]] = acc.reduction varPtr(%[[DECLB]]#1 : !fir.ref<i32>) -> !fir.ref<i32> {name = "b"}
-! CHECK: acc.loop reduction(@reduction_max_ref_i32 -> %[[RED_B]] : !fir.ref<i32>)
+! CHECK: acc.loop {{.*}} reduction(@reduction_max_ref_i32 -> %[[RED_B]] : !fir.ref<i32>)
subroutine acc_reduction_max_int_array2d(a, b)
integer :: a(100, 10), b(100, 10)
@@ -974,7 +974,7 @@ subroutine acc_reduction_max_int_array2d(a, b)
! HLFIR: %[[DECLARG1:.*]]:2 = hlfir.declare %[[ARG1]]
! FIR: %[[RED_ARG1:.*]] = acc.reduction varPtr(%[[ARG1]] : !fir.ref<!fir.array<100x10xi32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<100x10xi32>> {name = "b"}
! HLFIR: %[[RED_ARG1:.*]] = acc.reduction varPtr(%[[DECLARG1]]#1 : !fir.ref<!fir.array<100x10xi32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<100x10xi32>> {name = "b"}
-! CHECK: acc.loop reduction(@reduction_max_section_ext100xext10_ref_100x10xi32 -> %[[RED_ARG1]] : !fir.ref<!fir.array<100x10xi32>>)
+! CHECK: acc.loop {{.*}} reduction(@reduction_max_section_ext100xext10_ref_100x10xi32 -> %[[RED_ARG1]] : !fir.ref<!fir.array<100x10xi32>>)
subroutine acc_reduction_max_float(a, b)
real :: a(100), b
@@ -991,7 +991,7 @@ subroutine acc_reduction_max_float(a, b)
! HLFIR: %[[DECLB:.*]]:2 = hlfir.declare %[[B]]
! FIR: %[[RED_B:.*]] = acc.reduction varPtr(%[[B]] : !fir.ref<f32>) -> !fir.ref<f32> {name = "b"}
! HLFIR: %[[RED_B:.*]] = acc.reduction varPtr(%[[DECLB]]#1 : !fir.ref<f32>) -> !fir.ref<f32> {name = "b"}
-! CHECK: acc.loop reduction(@reduction_max_ref_f32 -> %[[RED_B]] : !fir.ref<f32>)
+! CHECK: acc.loop {{.*}} reduction(@reduction_max_ref_f32 -> %[[RED_B]] : !fir.ref<f32>)
subroutine acc_reduction_max_float_array1d(a, b)
real :: a(100), b(100)
@@ -1008,7 +1008,7 @@ subroutine acc_reduction_max_float_array1d(a, b)
! HLFIR: %[[DECLARG1:.*]]:2 = hlfir.declare %[[ARG1]]
! FIR: %[[RED_ARG1:.*]] = acc.reduction varPtr(%[[ARG1]] : !fir.ref<!fir.array<100xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<100xf32>> {name = "b"}
! HLFIR: %[[RED_ARG1:.*]] = acc.reduction varPtr(%[[DECLARG1]]#1 : !fir.ref<!fir.array<100xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<100xf32>> {name = "b"}
-! CHECK: acc.loop reduction(@reduction_max_section_ext100_ref_100xf32 -> %[[RED_ARG1]] : !fir.ref<!fir.array<100xf32>>) {
+! CHECK: acc.loop {{.*}} reduction(@reduction_max_section_ext100_ref_100xf32 -> %[[RED_ARG1]] : !fir.ref<!fir.array<100xf32>>)
subroutine acc_reduction_iand()
integer :: i
diff --git a/flang/test/Lower/OpenACC/acc-serial-loop.f90 b/flang/test/Lower/OpenACC/acc-serial-loop.f90
index 6041e7fb1b4906..ee875f66cb3440 100644
--- a/flang/test/Lower/OpenACC/acc-serial-loop.f90
+++ b/flang/test/Lower/OpenACC/acc-serial-loop.f90
@@ -64,8 +64,7 @@ subroutine acc_serial_loop
END DO
! CHECK: acc.serial {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -78,8 +77,7 @@ subroutine acc_serial_loop
!$acc end serial loop
! CHECK: acc.serial {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -92,8 +90,7 @@ subroutine acc_serial_loop
! CHECK: [[ASYNC1:%.*]] = arith.constant 1 : i32
! CHECK: acc.serial async([[ASYNC1]] : i32) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -106,8 +103,7 @@ subroutine acc_serial_loop
! CHECK: [[ASYNC2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
! CHECK: acc.serial async([[ASYNC2]] : i32) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -119,8 +115,7 @@ subroutine acc_serial_loop
END DO
! CHECK: acc.serial {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -133,8 +128,7 @@ subroutine acc_serial_loop
! CHECK: [[WAIT1:%.*]] = arith.constant 1 : i32
! CHECK: acc.serial wait({[[WAIT1]] : i32}) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -148,8 +142,7 @@ subroutine acc_serial_loop
! CHECK: [[WAIT2:%.*]] = arith.constant 1 : i32
! CHECK: [[WAIT3:%.*]] = arith.constant 2 : i32
! CHECK: acc.serial wait({[[WAIT2]] : i32, [[WAIT3]] : i32}) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -163,8 +156,7 @@ subroutine acc_serial_loop
! CHECK: [[WAIT4:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
! CHECK: [[WAIT5:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
! CHECK: acc.serial wait({[[WAIT4]] : i32, [[WAIT5]] : i32}) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -177,8 +169,7 @@ subroutine acc_serial_loop
! CHECK: [[IF1:%.*]] = arith.constant true
! CHECK: acc.serial if([[IF1]]) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -192,8 +183,7 @@ subroutine acc_serial_loop
! CHECK: [[IFCOND:%.*]] = fir.load %{{.*}} : !fir.ref<!fir.logical<4>>
! CHECK: [[IF2:%.*]] = fir.convert [[IFCOND]] : (!fir.logical<4>) -> i1
! CHECK: acc.serial if([[IF2]]) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -206,8 +196,7 @@ subroutine acc_serial_loop
! CHECK: [[SELF1:%.*]] = arith.constant true
! CHECK: acc.serial self([[SELF1]]) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -219,8 +208,7 @@ subroutine acc_serial_loop
END DO
! CHECK: acc.serial {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -233,8 +221,7 @@ subroutine acc_serial_loop
! CHECK: %[[SELF2:.*]] = fir.convert %[[DECLIFCONDITION]]#1 : (!fir.ref<!fir.logical<4>>) -> i1
! CHECK: acc.serial self(%[[SELF2]]) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -248,8 +235,7 @@ subroutine acc_serial_loop
! CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copy>, name = "a"}
! CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copy>, name = "b"}
! CHECK: acc.serial dataOperands(%[[COPYIN_A]], %[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -265,8 +251,7 @@ subroutine acc_serial_loop
! CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copy>, name = "a"}
! CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copy>, name = "b"}
! CHECK: acc.serial dataOperands(%[[COPYIN_A]], %[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -282,8 +267,7 @@ subroutine acc_serial_loop
! CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
! CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copyin_readonly>, name = "b"}
! CHECK: acc.serial dataOperands(%[[COPYIN_A]], %[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -297,8 +281,7 @@ subroutine acc_serial_loop
! CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copyout>, name = "a"}
! CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copyout>, name = "b"}
! CHECK: acc.serial dataOperands(%[[CREATE_A]], %[[CREATE_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -314,8 +297,7 @@ subroutine acc_serial_loop
! CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
! CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_create_zero>, name = "a"}
! CHECK: acc.serial dataOperands(%[[CREATE_B]], %[[CREATE_A]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -331,8 +313,7 @@ subroutine acc_serial_loop
! CHECK: %[[NOCREATE_A:.*]] = acc.nocreate varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
! CHECK: %[[NOCREATE_B:.*]] = acc.nocreate varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
! CHECK: acc.serial dataOperands(%[[NOCREATE_A]], %[[NOCREATE_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -346,8 +327,7 @@ subroutine acc_serial_loop
! CHECK: %[[PRESENT_A:.*]] = acc.present varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
! CHECK: %[[PRESENT_B:.*]] = acc.present varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
! CHECK: acc.serial dataOperands(%[[PRESENT_A]], %[[PRESENT_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -361,8 +341,7 @@ subroutine acc_serial_loop
! CHECK: %[[DEVICEPTR_A:.*]] = acc.deviceptr varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
! CHECK: %[[DEVICEPTR_B:.*]] = acc.deviceptr varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
! CHECK: acc.serial dataOperands(%[[DEVICEPTR_A]], %[[DEVICEPTR_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -380,8 +359,7 @@ subroutine acc_serial_loop
! CHECK: %[[BOX_ADDR_G:.*]] = fir.box_addr %[[BOX_G]] : (!fir.box<!fir.ptr<f32>>) -> !fir.ptr<f32>
! CHECK: %[[ATTACH_G:.*]] = acc.attach varPtr(%[[BOX_ADDR_G]] : !fir.ptr<f32>) -> !fir.ptr<f32> {name = "g"}
! CHECK: acc.serial dataOperands(%[[ATTACH_F]], %[[ATTACH_G]] : !fir.ptr<f32>, !fir.ptr<f32>) {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -395,8 +373,8 @@ subroutine acc_serial_loop
! CHECK: %[[ACC_FPRIVATE_B:.*]] = acc.firstprivate varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
! CHECK: acc.serial firstprivate(@firstprivatization_section_ext10_ref_10xf32 -> %[[ACC_FPRIVATE_B]] : !fir.ref<!fir.array<10xf32>>) {
! CHECK: %[[ACC_PRIVATE_A:.*]] = acc.private varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
-! CHECK: acc.loop private(@privatization_ref_10xf32 -> %[[ACC_PRIVATE_A]] : !fir.ref<!fir.array<10xf32>>) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop private({{.*}}@privatization_ref_10xf32 -> %[[ACC_PRIVATE_A]] : !fir.ref<!fir.array<10xf32>>)
+! CHECK-NOT: fir.do_loop
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -408,10 +386,9 @@ subroutine acc_serial_loop
END DO
! CHECK: acc.serial {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {seq = [#acc.device_type<none>]}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<none>]}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -421,10 +398,9 @@ subroutine acc_serial_loop
END DO
! CHECK: acc.serial {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>]}
+! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -434,10 +410,9 @@ subroutine acc_serial_loop
END DO
! CHECK: acc.serial {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {independent = [#acc.device_type<none>]}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -447,10 +422,9 @@ subroutine acc_serial_loop
END DO
! CHECK: acc.serial {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {gang = [#acc.device_type<none>]}{{$}}
+! CHECK-NEXT: } attributes {gang = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}{{$}}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -461,8 +435,7 @@ subroutine acc_serial_loop
! CHECK: acc.serial {
! CHECK: [[GANGNUM1:%.*]] = arith.constant 8 : i32
-! CHECK-NEXT: acc.loop gang({num=[[GANGNUM1]] : i32}) {
-! CHECK: fir.do_loop
+! CHECK-NEXT: acc.loop gang({num=[[GANGNUM1]] : i32}) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -475,8 +448,7 @@ subroutine acc_serial_loop
! CHECK: acc.serial {
! CHECK: [[GANGNUM2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-! CHECK-NEXT: acc.loop gang({num=[[GANGNUM2]] : i32}) {
-! CHECK: fir.do_loop
+! CHECK-NEXT: acc.loop gang({num=[[GANGNUM2]] : i32}) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -488,8 +460,7 @@ subroutine acc_serial_loop
END DO
! CHECK: acc.serial {
-! CHECK: acc.loop gang({num=%{{.*}} : i32, static=%{{.*}} : i32}) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop gang({num=%{{.*}} : i32, static=%{{.*}} : i32}) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -500,10 +471,9 @@ subroutine acc_serial_loop
a(i) = b(i)
END DO
! CHECK: acc.serial {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {vector = [#acc.device_type<none>]}{{$}}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, vector = [#acc.device_type<none>]}{{$}}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -514,8 +484,7 @@ subroutine acc_serial_loop
! CHECK: acc.serial {
! CHECK: [[CONSTANT128:%.*]] = arith.constant 128 : i32
-! CHECK: acc.loop vector([[CONSTANT128]] : i32) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop vector([[CONSTANT128]] : i32) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -528,8 +497,7 @@ subroutine acc_serial_loop
! CHECK: acc.serial {
! CHECK: [[VECTORLENGTH:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-! CHECK: acc.loop vector([[VECTORLENGTH]] : i32) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop vector([[VECTORLENGTH]] : i32) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -541,10 +509,9 @@ subroutine acc_serial_loop
END DO
! CHECK: acc.serial {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {worker = [#acc.device_type<none>]}{{$}}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, worker = [#acc.device_type<none>]}{{$}}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -555,8 +522,7 @@ subroutine acc_serial_loop
! CHECK: acc.serial {
! CHECK: [[WORKER128:%.*]] = arith.constant 128 : i32
-! CHECK: acc.loop worker([[WORKER128]] : i32) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop worker([[WORKER128]] : i32) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -570,11 +536,10 @@ subroutine acc_serial_loop
END DO
! CHECK: acc.serial {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
+! CHECK-NOT: fir.do_loop
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {collapse = [2], collapseDeviceType = [#acc.device_type<none>]}
+! CHECK-NEXT: } attributes {collapse = [2], collapseDeviceType = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true, true>}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -587,10 +552,8 @@ subroutine acc_serial_loop
END DO
! CHECK: acc.serial {
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
-! CHECK: acc.loop {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} {
+! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -605,8 +568,7 @@ subroutine acc_serial_loop
! CHECK: acc.serial {
! CHECK: [[TILESIZE:%.*]] = arith.constant 2 : i32
-! CHECK: acc.loop tile({[[TILESIZE]] : i32}) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} tile({[[TILESIZE]] : i32}) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -619,8 +581,7 @@ subroutine acc_serial_loop
! CHECK: acc.serial {
! CHECK: [[TILESIZEM1:%.*]] = arith.constant -1 : i32
-! CHECK: acc.loop tile({[[TILESIZEM1]] : i32}) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} tile({[[TILESIZEM1]] : i32}) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -636,8 +597,7 @@ subroutine acc_serial_loop
! CHECK: acc.serial {
! CHECK: [[TILESIZE1:%.*]] = arith.constant 2 : i32
! CHECK: [[TILESIZE2:%.*]] = arith.constant 2 : i32
-! CHECK: acc.loop tile({[[TILESIZE1]] : i32, [[TILESIZE2]] : i32}) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} tile({[[TILESIZE1]] : i32, [[TILESIZE2]] : i32}) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -649,8 +609,7 @@ subroutine acc_serial_loop
END DO
! CHECK: acc.serial {
-! CHECK: acc.loop tile({%{{.*}} : i32}) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} tile({%{{.*}} : i32}) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -664,8 +623,7 @@ subroutine acc_serial_loop
END DO
! CHECK: acc.serial {
-! CHECK: acc.loop tile({%{{.*}} : i32, %{{.*}} : i32}) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} tile({%{{.*}} : i32, %{{.*}} : i32}) {{.*}} {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
@@ -680,8 +638,8 @@ subroutine acc_serial_loop
! CHECK: %[[COPYINREDR:.*]] = acc.copyin varPtr(%{{.*}} : !fir.ref<f32>) -> !fir.ref<f32> {dataClause = #acc<data_clause acc_reduction>, implicit = true, name = "reduction_r"}
! CHECK: %[[COPYINREDI:.*]] = acc.copyin varPtr(%{{.*}} : !fir.ref<i32>) -> !fir.ref<i32> {dataClause = #acc<data_clause acc_reduction>, implicit = true, name = "reduction_i"}
! CHECK: acc.serial dataOperands(%[[COPYINREDR]], %[[COPYINREDI]] : !fir.ref<f32>, !fir.ref<i32>) {
-! CHECK: acc.loop reduction(@reduction_add_ref_f32 -> %{{.*}} : !fir.ref<f32>, @reduction_mul_ref_i32 -> %{{.*}} : !fir.ref<i32>) {
-! CHECK: fir.do_loop
+! CHECK: acc.loop {{.*}} reduction(@reduction_add_ref_f32 -> %{{.*}} : !fir.ref<f32>, @reduction_mul_ref_i32 -> %{{.*}} : !fir.ref<i32>)
+! CHECK-NOT: fir.do_loop
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
! CHECK: acc.yield
diff --git a/flang/test/Lower/OpenACC/locations.f90 b/flang/test/Lower/OpenACC/locations.f90
index c0114476b57eea..84dd512a5d43fd 100644
--- a/flang/test/Lower/OpenACC/locations.f90
+++ b/flang/test/Lower/OpenACC/locations.f90
@@ -53,7 +53,7 @@ subroutine nested_acc_locations(arr1d)
!CHECK: acc.loop
!CHECK: acc.yield loc("{{.*}}locations.f90":44:11)
- !CHECK-NEXT: } loc("{{.*}}locations.f90":44:11)
+ !CHECK-NEXT: } attributes {{.*}} loc(fused["{{.*}}locations.f90":44:11, "{{.*}}locations.f90":45:5])
!CHECK: acc.yield loc("{{.*}}locations.f90":43:11)
!CHECK-NEXT: } loc("{{.*}}locations.f90":43:11)
@@ -87,7 +87,7 @@ subroutine combined_directive_locations(arr)
!CHECK: acc.parallel
!CHECK: acc.loop
!CHECK: acc.yield loc("{{.*}}locations.f90":82:11)
- !CHECK-NEXT: } loc("{{.*}}locations.f90":82:11)
+ !CHECK-NEXT: } {{.*}} loc(fused["{{.*}}locations.f90":82:11, "{{.*}}locations.f90":83:5])
!CHECK: acc.yield loc("{{.*}}locations.f90":82:11)
!CHECK-NEXT: } loc("{{.*}}locations.f90":82:11)
end subroutine
@@ -106,7 +106,7 @@ subroutine if_clause_expr_location(arr)
!CHECK: acc.parallel
!CHECK: acc.loop
!CHECK: acc.yield loc("{{.*}}locations.f90":99:11)
- !CHECK-NEXT: } loc("{{.*}}locations.f90":99:11)
+ !CHECK-NEXT: } {{.*}} loc(fused["{{.*}}locations.f90":99:11, "{{.*}}locations.f90":100:5])
!CHECK: acc.yield loc("{{.*}}locations.f90":99:11)
!CHECK-NEXT: } loc("{{.*}}locations.f90":99:11)
end subroutine
@@ -150,16 +150,26 @@ subroutine atomic_update_loc()
! CHECK: } loc("{{.*}}locations.f90":142:3)
!$acc atomic update
- z = x * z
-
- ! %3 = fir.load %0 : !fir.ref<i32> loc("/local/home/vclement/llvm-project/flang/test/Lower/OpenACC/locations.f90":142:3)
- ! acc.atomic.update %2 : !fir.ref<i32> {
- ! ^bb0(%arg0: i32 loc("/local/home/vclement/llvm-project/flang/test/Lower/OpenACC/locations.f90":142:3)):
- ! %4 = arith.muli %3, %arg0 : i32 loc("/local/home/vclement/llvm-project/flang/test/Lower/OpenACC/locations.f90":142:3)
- ! acc.yield %4 : i32 loc("/local/home/vclement/llvm-project/flang/test/Lower/OpenACC/locations.f90":142:3)
- ! } loc("/local/home/vclement/llvm-project/flang/test/Lower/OpenACC/locations.f90":142:3)
+ z = x * z
+ end subroutine
+
+ subroutine acc_loop_fused_locations(arr)
+ real, dimension(10,10,10) :: arr
+ integer :: i, j, k
+
+ !$acc loop collapse(3)
+ do i = 1, 10
+ do j = 1, 10
+ do k = 1, 10
+ arr(i,j,k) = arr(i,j,k) * 2
+ end do
+ end do
+ end do
end subroutine
+! CHECK-LABEL: func.func @_QMacc_locationsPacc_loop_fused_locations
+! CHECK: acc.loop
+! CHECK: } attributes {collapse = [3]{{.*}}} loc(fused["{{.*}}locations.f90":160:11, "{{.*}}locations.f90":161:5, "{{.*}}locations.f90":162:7, "{{.*}}locations.f90":163:9])
end module
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