[flang-commits] [compiler-rt] [llvm] [clang-tools-extra] [lld] [clang] [libc] [libcxx] [lldb] [flang] [TTI][RISCV]Improve costs for fixed vector whole reg extract/insert. (PR #80164)

[Philip Reames via flang-commits]

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@@ -326,6 +326,50 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind,
     switch (Kind) {
     default:
       break;
+    case TTI::SK_ExtractSubvector:
+      if (isa<FixedVectorType>(SubTp)) {
+        unsigned TpRegs = getRegUsageForType(Tp);
+        unsigned NumElems =
+            divideCeil(Tp->getElementCount().getFixedValue(), TpRegs);
+        // Whole vector extract - just the vector itself + (possible) vsetvli.
+        // TODO: consider adding the cost for vsetvli.
+        if (Index == 0 || (ST->getRealMaxVLen() == ST->getRealMinVLen() &&
+                           Index % NumElems == 0)) {
+          std::pair<InstructionCost, MVT> SubLT =
+              getTypeLegalizationCost(SubTp);
+          return Index == 0
+                     ? TTI::TCC_Free
+                     : SubLT.first * getRISCVInstructionCost(RISCV::VMV_V_V,
+                                                             SubLT.second,
+                                                             CostKind);
+        }
+      }
+      break;
+    case TTI::SK_InsertSubvector:
+      if (auto *FSubTy = dyn_cast<FixedVectorType>(SubTp)) {
+        unsigned TpRegs = getRegUsageForType(Tp);
----------------
preames wrote:

Same basic style comments as above.

https://github.com/llvm/llvm-project/pull/80164