[flang-commits] [flang] [AMDGPU][MachineScheduler] Alternative way to control excess RP. (PR #68004)

[via flang-commits]

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@@ -959,16 +970,6 @@ void GCNSchedStage::checkScheduling() {
                       << DAG.MinOccupancy << ".\n");
   }
 
-  unsigned MaxVGPRs = ST.getMaxNumVGPRs(MF);
-  unsigned MaxSGPRs = ST.getMaxNumSGPRs(MF);
-  if (PressureAfter.getVGPRNum(false) > MaxVGPRs ||
-      PressureAfter.getAGPRNum() > MaxVGPRs ||
-      PressureAfter.getSGPRNum() > MaxSGPRs) {
-    DAG.RescheduleRegions[RegionIdx] = true;
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alex-t wrote:

Because the ST.getMaxNumVGPRs(MF) would return the same value as the S.VGPRExcessLimit.
The latter gets initialized in GCNSchedStrategy::initialize as `VGPRExcessLimit =
      Context->RegClassInfo->getNumAllocatableRegs(&AMDGPU::VGPR_32RegClass);`
and the RegClassInfo initialize the value in SIRegisterInfo::getReservedRegs as `unsigned MaxNumVGPRs = ST.getMaxNumVGPRs(MF);`
So, yes, they are wavesPerEU aware.

https://github.com/llvm/llvm-project/pull/68004