[flang-commits] [flang] [AMDGPU] Change the representation of double literals in operands (PR #68740)

[Stanislav Mekhanoshin via flang-commits]

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@@ -4309,7 +4312,18 @@ bool AMDGPUAsmParser::validateVOPLiteral(const MCInst &Inst,
       continue;
 
     if (MO.isImm() && !isInlineConstant(Inst, OpIdx)) {
-      uint32_t Value = static_cast<uint32_t>(MO.getImm());
+      uint64_t Value = static_cast<uint64_t>(MO.getImm());
+      bool IsFP = AMDGPU::isSISrcFPOperand(Desc, OpIdx);
+      bool IsValid32Op = AMDGPU::isValid32BitLiteral(Value, IsFP);
+
+      if (!IsValid32Op && !isInt<32>(Value) && !isUInt<32>(Value)) {
+        Error(getLitLoc(Operands), "invalid operand for instruction");
+        return false;
+      }
+
+      if (IsFP && IsValid32Op)
+        Value = Hi_32(Value);
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rampitec wrote:

I need this helper function in at least 3 different patches downstream, one is even approved by you. I am literally stuck without it. I can inline it here but it will be reintroduced anyway.

Yes, I do not like a use of getOperandSize when I can avoid it.

I also do not like changing isValid32BitLiteral's argument to IsFP64 as it brings even more context than it is needed. In fact this is encoding problems, in an ideal world it should not exist at all. I've seen fp32 as a literal to an fp64 instruction and vice versa. This just wraps my mind as I do not understand what does that mean. I mean I really want to keep it simple.

https://github.com/llvm/llvm-project/pull/68740