[flang-commits] [flang] ac8c032 - [flang][openacc] Lower data clause on compute construct to data operand ops
Valentin Clement via flang-commits
flang-commits at lists.llvm.org
Thu May 4 11:15:30 PDT 2023
Author: Valentin Clement
Date: 2023-05-04T11:15:25-07:00
New Revision: ac8c032c85fc9cd063bd44a6dbaee8e4f9ae745c
URL: https://github.com/llvm/llvm-project/commit/ac8c032c85fc9cd063bd44a6dbaee8e4f9ae745c
DIFF: https://github.com/llvm/llvm-project/commit/ac8c032c85fc9cd063bd44a6dbaee8e4f9ae745c.diff
LOG: [flang][openacc] Lower data clause on compute construct to data operand ops
This patch lowers the data clause on the OpenACC compute construct
to their corresponding acc data operand operation.
The decomposition is the same as in D149673.
Note that `private` and `firstprivate` are not lowered to data operand operation as they do not have one and will likely have dedicated design/process.
Depends on D149673
Reviewed By: razvanlupusoru, jeanPerier
Differential Revision: https://reviews.llvm.org/D149785
Added:
Modified:
flang/lib/Lower/OpenACC.cpp
flang/test/Lower/OpenACC/acc-kernels-loop.f90
flang/test/Lower/OpenACC/acc-kernels.f90
flang/test/Lower/OpenACC/acc-parallel-loop.f90
flang/test/Lower/OpenACC/acc-parallel.f90
flang/test/Lower/OpenACC/acc-serial-loop.f90
flang/test/Lower/OpenACC/acc-serial.f90
Removed:
################################################################################
diff --git a/flang/lib/Lower/OpenACC.cpp b/flang/lib/Lower/OpenACC.cpp
index 9701a8fbe077..a778e078f23b 100644
--- a/flang/lib/Lower/OpenACC.cpp
+++ b/flang/lib/Lower/OpenACC.cpp
@@ -783,6 +783,28 @@ static void genACC(Fortran::lower::AbstractConverter &converter,
}
}
+template <typename Op, typename Clause>
+static void genDataOperandOperationsWithModifier(
+ const Clause *x, Fortran::lower::AbstractConverter &converter,
+ Fortran::semantics::SemanticsContext &semanticsContext,
+ Fortran::lower::StatementContext &stmtCtx,
+ Fortran::parser::AccDataModifier::Modifier mod,
+ llvm::SmallVectorImpl<mlir::Value> &dataClauseOperands,
+ const mlir::acc::DataClause clause,
+ const mlir::acc::DataClause clauseWithModifier) {
+ const Fortran::parser::AccObjectListWithModifier &listWithModifier = x->v;
+ const auto &accObjectList =
+ std::get<Fortran::parser::AccObjectList>(listWithModifier.t);
+ const auto &modifier =
+ std::get<std::optional<Fortran::parser::AccDataModifier>>(
+ listWithModifier.t);
+ mlir::acc::DataClause dataClause =
+ (modifier && (*modifier).v == mod) ? clauseWithModifier : clause;
+ genDataOperandOperations<Op>(accObjectList, converter, semanticsContext,
+ stmtCtx, dataClauseOperands, dataClause,
+ /*structured=*/true);
+}
+
template <typename Op>
static Op
createComputeOp(Fortran::lower::AbstractConverter &converter,
@@ -799,11 +821,13 @@ createComputeOp(Fortran::lower::AbstractConverter &converter,
mlir::Value ifCond;
mlir::Value selfCond;
mlir::Value waitDevnum;
- llvm::SmallVector<mlir::Value, 2> waitOperands, reductionOperands,
- copyOperands, copyinOperands, copyinReadonlyOperands, copyoutOperands,
- copyoutZeroOperands, createOperands, createZeroOperands, noCreateOperands,
- presentOperands, devicePtrOperands, attachOperands, firstprivateOperands,
- privateOperands, dataClauseOperands;
+ llvm::SmallVector<mlir::Value> waitOperands, attachEntryOperands,
+ copyEntryOperands, copyoutEntryOperands, createEntryOperands,
+ dataClauseOperands;
+
+ // TODO: need to more work/design.
+ llvm::SmallVector<mlir::Value> reductionOperands, privateOperands,
+ firstprivateOperands;
// Async, wait and self clause have optional values but can be present with
// no value as well. When there is no value, the op has an attribute to
@@ -812,7 +836,7 @@ createComputeOp(Fortran::lower::AbstractConverter &converter,
bool addWaitAttr = false;
bool addSelfAttr = false;
- fir::FirOpBuilder &firOpBuilder = converter.getFirOpBuilder();
+ fir::FirOpBuilder &builder = converter.getFirOpBuilder();
// Lower clauses values mapped to operands.
// Keep track of each group of operands separatly as clauses can appear
@@ -855,8 +879,8 @@ createComputeOp(Fortran::lower::AbstractConverter &converter,
if (*optCondition) {
mlir::Value cond = fir::getBase(converter.genExprValue(
*Fortran::semantics::GetExpr(*optCondition), stmtCtx));
- selfCond = firOpBuilder.createConvert(
- clauseLocation, firOpBuilder.getI1Type(), cond);
+ selfCond = builder.createConvert(clauseLocation,
+ builder.getI1Type(), cond);
}
} else if (const auto *accClauseList =
std::get_if<Fortran::parser::AccObjectList>(
@@ -868,8 +892,8 @@ createComputeOp(Fortran::lower::AbstractConverter &converter,
std::get_if<Fortran::parser::Designator>(&accObject.u)) {
if (const auto *name = getDesignatorNameIfDataRef(*designator)) {
auto cond = converter.getSymbolAddress(*name->symbol);
- selfCond = firOpBuilder.createConvert(
- clauseLocation, firOpBuilder.getI1Type(), cond);
+ selfCond = builder.createConvert(clauseLocation,
+ builder.getI1Type(), cond);
}
}
}
@@ -879,46 +903,62 @@ createComputeOp(Fortran::lower::AbstractConverter &converter,
}
} else if (const auto *copyClause =
std::get_if<Fortran::parser::AccClause::Copy>(&clause.u)) {
- genObjectList(copyClause->v, converter, semanticsContext, stmtCtx,
- copyOperands);
+ genDataOperandOperations<mlir::acc::CopyinOp>(
+ copyClause->v, converter, semanticsContext, stmtCtx,
+ copyEntryOperands, mlir::acc::DataClause::acc_copy,
+ /*structured=*/true);
} else if (const auto *copyinClause =
std::get_if<Fortran::parser::AccClause::Copyin>(&clause.u)) {
- genObjectListWithModifier<Fortran::parser::AccClause::Copyin>(
+ genDataOperandOperationsWithModifier<mlir::acc::CopyinOp,
+ Fortran::parser::AccClause::Copyin>(
copyinClause, converter, semanticsContext, stmtCtx,
Fortran::parser::AccDataModifier::Modifier::ReadOnly,
- copyinReadonlyOperands, copyinOperands);
+ dataClauseOperands, mlir::acc::DataClause::acc_copyin,
+ mlir::acc::DataClause::acc_copyin_readonly);
} else if (const auto *copyoutClause =
std::get_if<Fortran::parser::AccClause::Copyout>(
&clause.u)) {
- genObjectListWithModifier<Fortran::parser::AccClause::Copyout>(
+ genDataOperandOperationsWithModifier<mlir::acc::CreateOp,
+ Fortran::parser::AccClause::Copyout>(
copyoutClause, converter, semanticsContext, stmtCtx,
- Fortran::parser::AccDataModifier::Modifier::Zero, copyoutZeroOperands,
- copyoutOperands);
+ Fortran::parser::AccDataModifier::Modifier::ReadOnly,
+ copyoutEntryOperands, mlir::acc::DataClause::acc_copyout,
+ mlir::acc::DataClause::acc_copyout_zero);
} else if (const auto *createClause =
std::get_if<Fortran::parser::AccClause::Create>(&clause.u)) {
- genObjectListWithModifier<Fortran::parser::AccClause::Create>(
+ genDataOperandOperationsWithModifier<mlir::acc::CreateOp,
+ Fortran::parser::AccClause::Create>(
createClause, converter, semanticsContext, stmtCtx,
- Fortran::parser::AccDataModifier::Modifier::Zero, createZeroOperands,
- createOperands);
+ Fortran::parser::AccDataModifier::Modifier::Zero, createEntryOperands,
+ mlir::acc::DataClause::acc_create,
+ mlir::acc::DataClause::acc_create_zero);
} else if (const auto *noCreateClause =
std::get_if<Fortran::parser::AccClause::NoCreate>(
&clause.u)) {
- genObjectList(noCreateClause->v, converter, semanticsContext, stmtCtx,
- noCreateOperands);
+ genDataOperandOperations<mlir::acc::NoCreateOp>(
+ noCreateClause->v, converter, semanticsContext, stmtCtx,
+ dataClauseOperands, mlir::acc::DataClause::acc_no_create,
+ /*structured=*/true);
} else if (const auto *presentClause =
std::get_if<Fortran::parser::AccClause::Present>(
&clause.u)) {
- genObjectList(presentClause->v, converter, semanticsContext, stmtCtx,
- presentOperands);
+ genDataOperandOperations<mlir::acc::PresentOp>(
+ presentClause->v, converter, semanticsContext, stmtCtx,
+ dataClauseOperands, mlir::acc::DataClause::acc_present,
+ /*structured=*/true);
} else if (const auto *devicePtrClause =
std::get_if<Fortran::parser::AccClause::Deviceptr>(
&clause.u)) {
- genObjectList(devicePtrClause->v, converter, semanticsContext, stmtCtx,
- devicePtrOperands);
+ genDataOperandOperations<mlir::acc::DevicePtrOp>(
+ devicePtrClause->v, converter, semanticsContext, stmtCtx,
+ dataClauseOperands, mlir::acc::DataClause::acc_deviceptr,
+ /*structured=*/true);
} else if (const auto *attachClause =
std::get_if<Fortran::parser::AccClause::Attach>(&clause.u)) {
- genObjectList(attachClause->v, converter, semanticsContext, stmtCtx,
- attachOperands);
+ genDataOperandOperations<mlir::acc::AttachOp>(
+ attachClause->v, converter, semanticsContext, stmtCtx,
+ attachEntryOperands, mlir::acc::DataClause::acc_attach,
+ /*structured=*/true);
} else if (const auto *privateClause =
std::get_if<Fortran::parser::AccClause::Private>(
&clause.u)) {
@@ -934,6 +974,11 @@ createComputeOp(Fortran::lower::AbstractConverter &converter,
}
}
+ dataClauseOperands.append(attachEntryOperands);
+ dataClauseOperands.append(copyEntryOperands);
+ dataClauseOperands.append(copyoutEntryOperands);
+ dataClauseOperands.append(createEntryOperands);
+
// Prepare the operand segment size attribute and the operands value range.
llvm::SmallVector<mlir::Value, 8> operands;
llvm::SmallVector<int32_t, 8> operandSegments;
@@ -948,17 +993,7 @@ createComputeOp(Fortran::lower::AbstractConverter &converter,
addOperand(operands, operandSegments, selfCond);
if constexpr (!std::is_same_v<Op, mlir::acc::KernelsOp>)
addOperands(operands, operandSegments, reductionOperands);
- addOperands(operands, operandSegments, copyOperands);
- addOperands(operands, operandSegments, copyinOperands);
- addOperands(operands, operandSegments, copyinReadonlyOperands);
- addOperands(operands, operandSegments, copyoutOperands);
- addOperands(operands, operandSegments, copyoutZeroOperands);
- addOperands(operands, operandSegments, createOperands);
- addOperands(operands, operandSegments, createZeroOperands);
- addOperands(operands, operandSegments, noCreateOperands);
- addOperands(operands, operandSegments, presentOperands);
- addOperands(operands, operandSegments, devicePtrOperands);
- addOperands(operands, operandSegments, attachOperands);
+ operandSegments.append({0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0});
if constexpr (!std::is_same_v<Op, mlir::acc::KernelsOp>) {
addOperands(operands, operandSegments, privateOperands);
addOperands(operands, operandSegments, firstprivateOperands);
@@ -968,41 +1003,33 @@ createComputeOp(Fortran::lower::AbstractConverter &converter,
Op computeOp;
if constexpr (std::is_same_v<Op, mlir::acc::KernelsOp>)
computeOp = createRegionOp<Op, mlir::acc::TerminatorOp>(
- firOpBuilder, currentLocation, operands, operandSegments);
+ builder, currentLocation, operands, operandSegments);
else
computeOp = createRegionOp<Op, mlir::acc::YieldOp>(
- firOpBuilder, currentLocation, operands, operandSegments);
+ builder, currentLocation, operands, operandSegments);
if (addAsyncAttr)
- computeOp.setAsyncAttrAttr(firOpBuilder.getUnitAttr());
+ computeOp.setAsyncAttrAttr(builder.getUnitAttr());
if (addWaitAttr)
- computeOp.setWaitAttrAttr(firOpBuilder.getUnitAttr());
+ computeOp.setWaitAttrAttr(builder.getUnitAttr());
if (addSelfAttr)
- computeOp.setSelfAttrAttr(firOpBuilder.getUnitAttr());
+ computeOp.setSelfAttrAttr(builder.getUnitAttr());
- return computeOp;
-}
+ auto insPt = builder.saveInsertionPoint();
+ builder.setInsertionPointAfter(computeOp);
-template <typename Op, typename Clause>
-static void genDataOperandOperationsWithModifier(
- const Clause *x, Fortran::lower::AbstractConverter &converter,
- Fortran::semantics::SemanticsContext &semanticsContext,
- Fortran::lower::StatementContext &stmtCtx,
- Fortran::parser::AccDataModifier::Modifier mod,
- llvm::SmallVectorImpl<mlir::Value> &dataClauseOperands,
- const mlir::acc::DataClause clause,
- const mlir::acc::DataClause clauseWithModifier) {
- const Fortran::parser::AccObjectListWithModifier &listWithModifier = x->v;
- const auto &accObjectList =
- std::get<Fortran::parser::AccObjectList>(listWithModifier.t);
- const auto &modifier =
- std::get<std::optional<Fortran::parser::AccDataModifier>>(
- listWithModifier.t);
- mlir::acc::DataClause dataClause =
- (modifier && (*modifier).v == mod) ? clauseWithModifier : clause;
- genDataOperandOperations<Op>(accObjectList, converter, semanticsContext,
- stmtCtx, dataClauseOperands, dataClause,
- /*structured=*/true);
+ // Create the exit operations after the region.
+ genDataExitOperations<mlir::acc::CopyinOp, mlir::acc::CopyoutOp>(
+ builder, copyEntryOperands, /*structured=*/true, /*implicit=*/false);
+ genDataExitOperations<mlir::acc::CreateOp, mlir::acc::CopyoutOp>(
+ builder, copyoutEntryOperands, /*structured=*/true, /*implicit=*/false);
+ genDataExitOperations<mlir::acc::AttachOp, mlir::acc::DetachOp>(
+ builder, attachEntryOperands, /*structured=*/true, /*implicit=*/false);
+ genDataExitOperations<mlir::acc::CreateOp, mlir::acc::DeleteOp>(
+ builder, createEntryOperands, /*structured=*/true, /*implicit=*/false);
+
+ builder.restoreInsertionPoint(insPt);
+ return computeOp;
}
static void genACCDataOp(Fortran::lower::AbstractConverter &converter,
diff --git a/flang/test/Lower/OpenACC/acc-kernels-loop.f90 b/flang/test/Lower/OpenACC/acc-kernels-loop.f90
index b160fc528070..6aad08b13499 100644
--- a/flang/test/Lower/OpenACC/acc-kernels-loop.f90
+++ b/flang/test/Lower/OpenACC/acc-kernels-loop.f90
@@ -22,25 +22,25 @@ subroutine acc_kernels_loop
integer :: vectorNum = 128
integer, parameter :: tileSize = 2
-!CHECK: [[A:%.*]] = fir.alloca !fir.array<10xf32> {{{.*}}uniq_name = "{{.*}}Ea"}
-!CHECK: [[B:%.*]] = fir.alloca !fir.array<10xf32> {{{.*}}uniq_name = "{{.*}}Eb"}
-!CHECK: [[C:%.*]] = fir.alloca !fir.array<10xf32> {{{.*}}uniq_name = "{{.*}}Ec"}
-!CHECK: [[F:%.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "f", uniq_name = "{{.*}}Ef"}
-!CHECK: [[G:%.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "g", uniq_name = "{{.*}}Eg"}
-!CHECK: [[IFCONDITION:%.*]] = fir.address_of(@{{.*}}ifcondition) : !fir.ref<!fir.logical<4>>
+! CHECK: %[[A:.*]] = fir.alloca !fir.array<10xf32> {{{.*}}uniq_name = "{{.*}}Ea"}
+! CHECK: %[[B:.*]] = fir.alloca !fir.array<10xf32> {{{.*}}uniq_name = "{{.*}}Eb"}
+! CHECK: %[[C:.*]] = fir.alloca !fir.array<10xf32> {{{.*}}uniq_name = "{{.*}}Ec"}
+! CHECK: %[[F:.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "f", uniq_name = "{{.*}}Ef"}
+! CHECK: %[[G:.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "g", uniq_name = "{{.*}}Eg"}
+! CHECK: %[[IFCONDITION:.*]] = fir.address_of(@{{.*}}ifcondition) : !fir.ref<!fir.logical<4>>
!$acc kernels loop
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.kernels {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.kernels {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop async
DO i = 1, n
@@ -48,529 +48,559 @@ subroutine acc_kernels_loop
END DO
!$acc end kernels loop
-!CHECK: acc.kernels {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: } attributes {asyncAttr}
+! CHECK: acc.kernels {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: } attributes {asyncAttr}
!$acc kernels loop async(1)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[ASYNC1:%.*]] = arith.constant 1 : i32
-!CHECK: acc.kernels async([[ASYNC1]] : i32) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[ASYNC1:%.*]] = arith.constant 1 : i32
+! CHECK: acc.kernels async([[ASYNC1]] : i32) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop async(async)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[ASYNC2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK: acc.kernels async([[ASYNC2]] : i32) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[ASYNC2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK: acc.kernels async([[ASYNC2]] : i32) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop wait
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.kernels {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: } attributes {waitAttr}
+! CHECK: acc.kernels {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: } attributes {waitAttr}
!$acc kernels loop wait(1)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[WAIT1:%.*]] = arith.constant 1 : i32
-!CHECK: acc.kernels wait([[WAIT1]] : i32) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[WAIT1:%.*]] = arith.constant 1 : i32
+! CHECK: acc.kernels wait([[WAIT1]] : i32) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop wait(1, 2)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[WAIT2:%.*]] = arith.constant 1 : i32
-!CHECK: [[WAIT3:%.*]] = arith.constant 2 : i32
-!CHECK: acc.kernels wait([[WAIT2]], [[WAIT3]] : i32, i32) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[WAIT2:%.*]] = arith.constant 1 : i32
+! CHECK: [[WAIT3:%.*]] = arith.constant 2 : i32
+! CHECK: acc.kernels wait([[WAIT2]], [[WAIT3]] : i32, i32) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop wait(wait1, wait2)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[WAIT4:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK: [[WAIT5:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK: acc.kernels wait([[WAIT4]], [[WAIT5]] : i32, i32) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[WAIT4:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK: [[WAIT5:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK: acc.kernels wait([[WAIT4]], [[WAIT5]] : i32, i32) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop num_gangs(1)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[NUMGANGS1:%.*]] = arith.constant 1 : i32
-!CHECK: acc.kernels num_gangs([[NUMGANGS1]] : i32) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[NUMGANGS1:%.*]] = arith.constant 1 : i32
+! CHECK: acc.kernels num_gangs([[NUMGANGS1]] : i32) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop num_gangs(numGangs)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[NUMGANGS2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK: acc.kernels num_gangs([[NUMGANGS2]] : i32) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[NUMGANGS2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK: acc.kernels num_gangs([[NUMGANGS2]] : i32) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop num_workers(10)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[NUMWORKERS1:%.*]] = arith.constant 10 : i32
-!CHECK: acc.kernels num_workers([[NUMWORKERS1]] : i32) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[NUMWORKERS1:%.*]] = arith.constant 10 : i32
+! CHECK: acc.kernels num_workers([[NUMWORKERS1]] : i32) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop num_workers(numWorkers)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[NUMWORKERS2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK: acc.kernels num_workers([[NUMWORKERS2]] : i32) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[NUMWORKERS2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK: acc.kernels num_workers([[NUMWORKERS2]] : i32) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop vector_length(128)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[VECTORLENGTH1:%.*]] = arith.constant 128 : i32
-!CHECK: acc.kernels vector_length([[VECTORLENGTH1]] : i32) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[VECTORLENGTH1:%.*]] = arith.constant 128 : i32
+! CHECK: acc.kernels vector_length([[VECTORLENGTH1]] : i32) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop vector_length(vectorLength)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[VECTORLENGTH2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK: acc.kernels vector_length([[VECTORLENGTH2]] : i32) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[VECTORLENGTH2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK: acc.kernels vector_length([[VECTORLENGTH2]] : i32) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop if(.TRUE.)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[IF1:%.*]] = arith.constant true
-!CHECK: acc.kernels if([[IF1]]) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[IF1:%.*]] = arith.constant true
+! CHECK: acc.kernels if([[IF1]]) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop if(ifCondition)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[IFCOND:%.*]] = fir.load %{{.*}} : !fir.ref<!fir.logical<4>>
-!CHECK: [[IF2:%.*]] = fir.convert [[IFCOND]] : (!fir.logical<4>) -> i1
-!CHECK: acc.kernels if([[IF2]]) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[IFCOND:%.*]] = fir.load %{{.*}} : !fir.ref<!fir.logical<4>>
+! CHECK: [[IF2:%.*]] = fir.convert [[IFCOND]] : (!fir.logical<4>) -> i1
+! CHECK: acc.kernels if([[IF2]]) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop self(.TRUE.)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[SELF1:%.*]] = arith.constant true
-!CHECK: acc.kernels self([[SELF1]]) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[SELF1:%.*]] = arith.constant true
+! CHECK: acc.kernels self([[SELF1]]) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop self
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.kernels {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: } attributes {selfAttr}
+! CHECK: acc.kernels {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: } attributes {selfAttr}
!$acc kernels loop self(ifCondition)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[SELF2:%.*]] = fir.convert [[IFCONDITION]] : (!fir.ref<!fir.logical<4>>) -> i1
-!CHECK: acc.kernels self([[SELF2]]) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[SELF2:.*]] = fir.convert %[[IFCONDITION]] : (!fir.ref<!fir.logical<4>>) -> i1
+! CHECK: acc.kernels self(%[[SELF2]]) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop copy(a, b)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.kernels copy([[A]], [[B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = 3 : i64, name = "a"}
+! CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = 3 : i64, name = "b"}
+! CHECK: acc.kernels dataOperands(%[[COPYIN_A]], %[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.copyout accPtr(%[[COPYIN_A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) {dataClause = 3 : i64, name = "a"}
+! CHECK: acc.copyout accPtr(%[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) {dataClause = 3 : i64, name = "b"}
!$acc kernels loop copy(a) copy(b)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.kernels copy([[A]], [[B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = 3 : i64, name = "a"}
+! CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = 3 : i64, name = "b"}
+! CHECK: acc.kernels dataOperands(%[[COPYIN_A]], %[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.copyout accPtr(%[[COPYIN_A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) {dataClause = 3 : i64, name = "a"}
+! CHECK: acc.copyout accPtr(%[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) {dataClause = 3 : i64, name = "b"}
!$acc kernels loop copyin(a) copyin(readonly: b)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.kernels copyin([[A]] : !fir.ref<!fir.array<10xf32>>) copyin_readonly([[B]] : !fir.ref<!fir.array<10xf32>>) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
+! CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = 2 : i64, name = "b"}
+! CHECK: acc.kernels dataOperands(%[[COPYIN_A]], %[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop copyout(a) copyout(zero: b)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.kernels copyout([[A]] : !fir.ref<!fir.array<10xf32>>) copyout_zero([[B]] : !fir.ref<!fir.array<10xf32>>) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = 4 : i64, name = "a"}
+! CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = 4 : i64, name = "b"}
+! CHECK: acc.kernels dataOperands(%[[CREATE_A]], %[[CREATE_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.copyout accPtr(%[[CREATE_A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) {name = "a"}
+! CHECK: acc.copyout accPtr(%[[CREATE_B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) {name = "b"}
!$acc kernels loop create(b) create(zero: a)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.kernels create([[B]] : !fir.ref<!fir.array<10xf32>>) create_zero([[A]] : !fir.ref<!fir.array<10xf32>>) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
+! CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = 8 : i64, name = "a"}
+! CHECK: acc.kernels dataOperands(%[[CREATE_B]], %[[CREATE_A]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.delete accPtr(%[[CREATE_B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) {dataClause = 7 : i64, name = "b"}
+! CHECK: acc.delete accPtr(%[[CREATE_A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) {dataClause = 8 : i64, name = "a"}
!$acc kernels loop no_create(a, b)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.kernels no_create([[A]], [[B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[NOCREATE_A:.*]] = acc.nocreate varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
+! CHECK: %[[NOCREATE_B:.*]] = acc.nocreate varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
+! CHECK: acc.kernels dataOperands(%[[NOCREATE_A]], %[[NOCREATE_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop present(a, b)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.kernels present([[A]], [[B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[PRESENT_A:.*]] = acc.present varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
+! CHECK: %[[PRESENT_B:.*]] = acc.present varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
+! CHECK: acc.kernels dataOperands(%[[PRESENT_A]], %[[PRESENT_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop deviceptr(a) deviceptr(b)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.kernels deviceptr([[A]], [[B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[DEVICEPTR_A:.*]] = acc.deviceptr varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
+! CHECK: %[[DEVICEPTR_B:.*]] = acc.deviceptr varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
+! CHECK: acc.kernels dataOperands(%[[DEVICEPTR_A]], %[[DEVICEPTR_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop attach(f, g)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.kernels attach([[F]], [[G]] : !fir.ref<!fir.box<!fir.ptr<f32>>>, !fir.ref<!fir.box<!fir.ptr<f32>>>) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[BOX_F:.*]] = fir.load %[[F]] : !fir.ref<!fir.box<!fir.ptr<f32>>>
+! CHECK: %[[BOX_ADDR_F:.*]] = fir.box_addr %[[BOX_F]] : (!fir.box<!fir.ptr<f32>>) -> !fir.ptr<f32>
+! CHECK: %[[ATTACH_F:.*]] = acc.attach varPtr(%[[BOX_ADDR_F]] : !fir.ptr<f32>) -> !fir.ptr<f32> {name = "f"}
+! CHECK: %[[BOX_G:.*]] = fir.load %[[G]] : !fir.ref<!fir.box<!fir.ptr<f32>>>
+! CHECK: %[[BOX_ADDR_G:.*]] = fir.box_addr %[[BOX_G]] : (!fir.box<!fir.ptr<f32>>) -> !fir.ptr<f32>
+! CHECK: %[[ATTACH_G:.*]] = acc.attach varPtr(%[[BOX_ADDR_G]] : !fir.ptr<f32>) -> !fir.ptr<f32> {name = "g"}
+! CHECK: acc.kernels dataOperands(%[[ATTACH_F]], %[[ATTACH_G]] : !fir.ptr<f32>, !fir.ptr<f32>) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop seq
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.kernels {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: } attributes {seq}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.kernels {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {seq}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop auto
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.kernels {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: } attributes {auto}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.kernels {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {auto}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop independent
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.kernels {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: } attributes {independent}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.kernels {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {independent}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop gang
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.kernels {
-!CHECK: acc.loop gang {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.kernels {
+! CHECK: acc.loop gang {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop gang(num: 8)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.kernels {
-!CHECK: [[GANGNUM1:%.*]] = arith.constant 8 : i32
-!CHECK-NEXT: acc.loop gang(num=[[GANGNUM1]] : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.kernels {
+! CHECK: [[GANGNUM1:%.*]] = arith.constant 8 : i32
+! CHECK-NEXT: acc.loop gang(num=[[GANGNUM1]] : i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop gang(num: gangNum)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.kernels {
-!CHECK: [[GANGNUM2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK-NEXT: acc.loop gang(num=[[GANGNUM2]] : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.kernels {
+! CHECK: [[GANGNUM2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK-NEXT: acc.loop gang(num=[[GANGNUM2]] : i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop gang(num: gangNum, static: gangStatic)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.kernels {
-!CHECK: acc.loop gang(num=%{{.*}}: i32, static=%{{.*}}: i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.kernels {
+! CHECK: acc.loop gang(num=%{{.*}} : i32, static=%{{.*}} : i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop vector
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.kernels {
-!CHECK: acc.loop vector {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.kernels {
+! CHECK: acc.loop vector {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop vector(128)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.kernels {
-!CHECK: [[CONSTANT128:%.*]] = arith.constant 128 : i32
-!CHECK: acc.loop vector([[CONSTANT128]] : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.kernels {
+! CHECK: [[CONSTANT128:%.*]] = arith.constant 128 : i32
+! CHECK: acc.loop vector([[CONSTANT128]] : i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop vector(vectorLength)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.kernels {
-!CHECK: [[VECTORLENGTH:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK: acc.loop vector([[VECTORLENGTH]] : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.kernels {
+! CHECK: [[VECTORLENGTH:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK: acc.loop vector([[VECTORLENGTH]] : i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop worker
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.kernels {
-!CHECK: acc.loop worker {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.kernels {
+! CHECK: acc.loop worker {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop worker(128)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.kernels {
-!CHECK: [[WORKER128:%.*]] = arith.constant 128 : i32
-!CHECK: acc.loop worker([[WORKER128]] : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.kernels {
+! CHECK: [[WORKER128:%.*]] = arith.constant 128 : i32
+! CHECK: acc.loop worker([[WORKER128]] : i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop collapse(2)
DO i = 1, n
@@ -579,14 +609,14 @@ subroutine acc_kernels_loop
END DO
END DO
-!CHECK: acc.kernels {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: } attributes {collapse = 2 : i64}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.kernels {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {collapse = 2 : i64}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop
DO i = 1, n
@@ -596,45 +626,45 @@ subroutine acc_kernels_loop
END DO
END DO
-!CHECK: acc.kernels {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.kernels {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop tile(2)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.kernels {
-!CHECK: [[TILESIZE:%.*]] = arith.constant 2 : i32
-!CHECK: acc.loop tile([[TILESIZE]] : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.kernels {
+! CHECK: [[TILESIZE:%.*]] = arith.constant 2 : i32
+! CHECK: acc.loop tile([[TILESIZE]] : i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop tile(*)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.kernels {
-!CHECK: [[TILESIZEM1:%.*]] = arith.constant -1 : i32
-!CHECK: acc.loop tile([[TILESIZEM1]] : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.kernels {
+! CHECK: [[TILESIZEM1:%.*]] = arith.constant -1 : i32
+! CHECK: acc.loop tile([[TILESIZEM1]] : i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop tile(2, 2)
DO i = 1, n
@@ -643,28 +673,28 @@ subroutine acc_kernels_loop
END DO
END DO
-!CHECK: acc.kernels {
-!CHECK: [[TILESIZE1:%.*]] = arith.constant 2 : i32
-!CHECK: [[TILESIZE2:%.*]] = arith.constant 2 : i32
-!CHECK: acc.loop tile([[TILESIZE1]], [[TILESIZE2]] : i32, i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.kernels {
+! CHECK: [[TILESIZE1:%.*]] = arith.constant 2 : i32
+! CHECK: [[TILESIZE2:%.*]] = arith.constant 2 : i32
+! CHECK: acc.loop tile([[TILESIZE1]], [[TILESIZE2]] : i32, i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop tile(tileSize)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.kernels {
-!CHECK: acc.loop tile(%{{.*}}: i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.kernels {
+! CHECK: acc.loop tile(%{{.*}} : i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels loop tile(tileSize, tileSize)
DO i = 1, n
@@ -673,12 +703,12 @@ subroutine acc_kernels_loop
END DO
END DO
-!CHECK: acc.kernels {
-!CHECK: acc.loop tile(%{{.*}}, %{{.*}} : i32, i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.kernels {
+! CHECK: acc.loop tile(%{{.*}}, %{{.*}} : i32, i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
end subroutine
diff --git a/flang/test/Lower/OpenACC/acc-kernels.f90 b/flang/test/Lower/OpenACC/acc-kernels.f90
index 65730fba1681..70a4cca6e094 100644
--- a/flang/test/Lower/OpenACC/acc-kernels.f90
+++ b/flang/test/Lower/OpenACC/acc-kernels.f90
@@ -15,225 +15,266 @@ subroutine acc_kernels
real, dimension(10, 10) :: a, b, c
real, pointer :: d, e
-!CHECK: [[A:%.*]] = fir.alloca !fir.array<10x10xf32> {{{.*}}uniq_name = "{{.*}}Ea"}
-!CHECK: [[B:%.*]] = fir.alloca !fir.array<10x10xf32> {{{.*}}uniq_name = "{{.*}}Eb"}
-!CHECK: [[C:%.*]] = fir.alloca !fir.array<10x10xf32> {{{.*}}uniq_name = "{{.*}}Ec"}
-!CHECK: [[D:%.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "d", uniq_name = "{{.*}}Ed"}
-!CHECK: [[E:%.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "e", uniq_name = "{{.*}}Ee"}
-!CHECK: [[IFCONDITION:%.*]] = fir.address_of(@{{.*}}ifcondition) : !fir.ref<!fir.logical<4>>
+! CHECK: %[[A:.*]] = fir.alloca !fir.array<10x10xf32> {{{.*}}uniq_name = "{{.*}}Ea"}
+! CHECK: %[[B:.*]] = fir.alloca !fir.array<10x10xf32> {{{.*}}uniq_name = "{{.*}}Eb"}
+! CHECK: %[[C:.*]] = fir.alloca !fir.array<10x10xf32> {{{.*}}uniq_name = "{{.*}}Ec"}
+! CHECK: %[[D:.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "d", uniq_name = "{{.*}}Ed"}
+! CHECK: %[[E:.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "e", uniq_name = "{{.*}}Ee"}
+! CHECK: %[[IFCONDITION:.*]] = fir.address_of(@{{.*}}ifcondition) : !fir.ref<!fir.logical<4>>
!$acc kernels
!$acc end kernels
-!CHECK: acc.kernels {
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.kernels {
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels async
!$acc end kernels
-!CHECK: acc.kernels {
-!CHECK: acc.terminator
-!CHECK-NEXT: } attributes {asyncAttr}
+! CHECK: acc.kernels {
+! CHECK: acc.terminator
+! CHECK-NEXT: } attributes {asyncAttr}
!$acc kernels async(1)
!$acc end kernels
-!CHECK: [[ASYNC1:%.*]] = arith.constant 1 : i32
-!CHECK: acc.kernels async([[ASYNC1]] : i32) {
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[ASYNC1:%.*]] = arith.constant 1 : i32
+! CHECK: acc.kernels async([[ASYNC1]] : i32) {
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels async(async)
!$acc end kernels
-!CHECK: [[ASYNC2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK: acc.kernels async([[ASYNC2]] : i32) {
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[ASYNC2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK: acc.kernels async([[ASYNC2]] : i32) {
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels wait
!$acc end kernels
-!CHECK: acc.kernels {
-!CHECK: acc.terminator
-!CHECK-NEXT: } attributes {waitAttr}
+! CHECK: acc.kernels {
+! CHECK: acc.terminator
+! CHECK-NEXT: } attributes {waitAttr}
!$acc kernels wait(1)
!$acc end kernels
-!CHECK: [[WAIT1:%.*]] = arith.constant 1 : i32
-!CHECK: acc.kernels wait([[WAIT1]] : i32) {
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[WAIT1:%.*]] = arith.constant 1 : i32
+! CHECK: acc.kernels wait([[WAIT1]] : i32) {
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels wait(1, 2)
!$acc end kernels
-!CHECK: [[WAIT2:%.*]] = arith.constant 1 : i32
-!CHECK: [[WAIT3:%.*]] = arith.constant 2 : i32
-!CHECK: acc.kernels wait([[WAIT2]], [[WAIT3]] : i32, i32) {
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[WAIT2:%.*]] = arith.constant 1 : i32
+! CHECK: [[WAIT3:%.*]] = arith.constant 2 : i32
+! CHECK: acc.kernels wait([[WAIT2]], [[WAIT3]] : i32, i32) {
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels wait(wait1, wait2)
!$acc end kernels
-!CHECK: [[WAIT4:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK: [[WAIT5:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK: acc.kernels wait([[WAIT4]], [[WAIT5]] : i32, i32) {
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[WAIT4:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK: [[WAIT5:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK: acc.kernels wait([[WAIT4]], [[WAIT5]] : i32, i32) {
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels num_gangs(1)
!$acc end kernels
-!CHECK: [[NUMGANGS1:%.*]] = arith.constant 1 : i32
-!CHECK: acc.kernels num_gangs([[NUMGANGS1]] : i32) {
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[NUMGANGS1:%.*]] = arith.constant 1 : i32
+! CHECK: acc.kernels num_gangs([[NUMGANGS1]] : i32) {
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels num_gangs(numGangs)
!$acc end kernels
-!CHECK: [[NUMGANGS2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK: acc.kernels num_gangs([[NUMGANGS2]] : i32) {
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[NUMGANGS2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK: acc.kernels num_gangs([[NUMGANGS2]] : i32) {
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels num_workers(10)
!$acc end kernels
-!CHECK: [[NUMWORKERS1:%.*]] = arith.constant 10 : i32
-!CHECK: acc.kernels num_workers([[NUMWORKERS1]] : i32) {
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[NUMWORKERS1:%.*]] = arith.constant 10 : i32
+! CHECK: acc.kernels num_workers([[NUMWORKERS1]] : i32) {
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels num_workers(numWorkers)
!$acc end kernels
-!CHECK: [[NUMWORKERS2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK: acc.kernels num_workers([[NUMWORKERS2]] : i32) {
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[NUMWORKERS2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK: acc.kernels num_workers([[NUMWORKERS2]] : i32) {
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels vector_length(128)
!$acc end kernels
-!CHECK: [[VECTORLENGTH1:%.*]] = arith.constant 128 : i32
-!CHECK: acc.kernels vector_length([[VECTORLENGTH1]] : i32) {
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[VECTORLENGTH1:%.*]] = arith.constant 128 : i32
+! CHECK: acc.kernels vector_length([[VECTORLENGTH1]] : i32) {
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels vector_length(vectorLength)
!$acc end kernels
-!CHECK: [[VECTORLENGTH2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK: acc.kernels vector_length([[VECTORLENGTH2]] : i32) {
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[VECTORLENGTH2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK: acc.kernels vector_length([[VECTORLENGTH2]] : i32) {
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels if(.TRUE.)
!$acc end kernels
-!CHECK: [[IF1:%.*]] = arith.constant true
-!CHECK: acc.kernels if([[IF1]]) {
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[IF1:%.*]] = arith.constant true
+! CHECK: acc.kernels if([[IF1]]) {
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels if(ifCondition)
!$acc end kernels
-!CHECK: [[IFCOND:%.*]] = fir.load %{{.*}} : !fir.ref<!fir.logical<4>>
-!CHECK: [[IF2:%.*]] = fir.convert [[IFCOND]] : (!fir.logical<4>) -> i1
-!CHECK: acc.kernels if([[IF2]]) {
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[IFCOND:%.*]] = fir.load %{{.*}} : !fir.ref<!fir.logical<4>>
+! CHECK: [[IF2:%.*]] = fir.convert [[IFCOND]] : (!fir.logical<4>) -> i1
+! CHECK: acc.kernels if([[IF2]]) {
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels self(.TRUE.)
!$acc end kernels
-!CHECK: [[SELF1:%.*]] = arith.constant true
-!CHECK: acc.kernels self([[SELF1]]) {
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: [[SELF1:%.*]] = arith.constant true
+! CHECK: acc.kernels self([[SELF1]]) {
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels self
!$acc end kernels
-!CHECK: acc.kernels {
-!CHECK: acc.terminator
-!CHECK-NEXT: } attributes {selfAttr}
+! CHECK: acc.kernels {
+! CHECK: acc.terminator
+! CHECK-NEXT: } attributes {selfAttr}
!$acc kernels self(ifCondition)
!$acc end kernels
-!CHECK: [[SELF2:%.*]] = fir.convert [[IFCONDITION]] : (!fir.ref<!fir.logical<4>>) -> i1
-!CHECK: acc.kernels self([[SELF2]]) {
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[SELF2:.*]] = fir.convert %[[IFCONDITION]] : (!fir.ref<!fir.logical<4>>) -> i1
+! CHECK: acc.kernels self(%[[SELF2]]) {
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels copy(a, b, c)
!$acc end kernels
-!CHECK: acc.kernels copy([[A]], [[B]], [[C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 3 : i64, name = "a"}
+! CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 3 : i64, name = "b"}
+! CHECK: %[[COPYIN_C:.*]] = acc.copyin varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 3 : i64, name = "c"}
+! CHECK: acc.kernels dataOperands(%[[COPYIN_A]], %[[COPYIN_B]], %[[COPYIN_C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.copyout accPtr(%[[COPYIN_A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) {dataClause = 3 : i64, name = "a"}
+! CHECK: acc.copyout accPtr(%[[COPYIN_B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) {dataClause = 3 : i64, name = "b"}
+! CHECK: acc.copyout accPtr(%[[COPYIN_C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) {dataClause = 3 : i64, name = "c"}
!$acc kernels copy(a) copy(b) copy(c)
!$acc end kernels
-!CHECK: acc.kernels copy([[A]], [[B]], [[C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 3 : i64, name = "a"}
+! CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 3 : i64, name = "b"}
+! CHECK: %[[COPYIN_C:.*]] = acc.copyin varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 3 : i64, name = "c"}
+! CHECK: acc.kernels dataOperands(%[[COPYIN_A]], %[[COPYIN_B]], %[[COPYIN_C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.copyout accPtr(%[[COPYIN_A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) {dataClause = 3 : i64, name = "a"}
+! CHECK: acc.copyout accPtr(%[[COPYIN_B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) {dataClause = 3 : i64, name = "b"}
+! CHECK: acc.copyout accPtr(%[[COPYIN_C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) {dataClause = 3 : i64, name = "c"}
!$acc kernels copyin(a) copyin(readonly: b, c)
!$acc end kernels
-!CHECK: acc.kernels copyin([[A]] : !fir.ref<!fir.array<10x10xf32>>) copyin_readonly([[B]], [[C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "a"}
+! CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 2 : i64, name = "b"}
+! CHECK: %[[COPYIN_C:.*]] = acc.copyin varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 2 : i64, name = "c"}
+! CHECK: acc.kernels dataOperands(%[[COPYIN_A]], %[[COPYIN_B]], %[[COPYIN_C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels copyout(a) copyout(zero: b) copyout(c)
!$acc end kernels
-!CHECK: acc.kernels copyout([[A]], [[C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) copyout_zero([[B]] : !fir.ref<!fir.array<10x10xf32>>) {
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 4 : i64, name = "a"}
+! CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 4 : i64, name = "b"}
+! CHECK: %[[CREATE_C:.*]] = acc.create varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 4 : i64, name = "c"}
+! CHECK: acc.kernels dataOperands(%[[CREATE_A]], %[[CREATE_B]], %[[CREATE_C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.copyout accPtr(%[[CREATE_A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) {name = "a"}
+! CHECK: acc.copyout accPtr(%[[CREATE_B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) {name = "b"}
+! CHECK: acc.copyout accPtr(%[[CREATE_C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) {name = "c"}
!$acc kernels create(a, b) create(zero: c)
!$acc end kernels
-!CHECK: acc.kernels create([[A]], [[B]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) create_zero([[C]] : !fir.ref<!fir.array<10x10xf32>>) {
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "a"}
+! CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "b"}
+! CHECK: %[[CREATE_C:.*]] = acc.create varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 8 : i64, name = "c"}
+! CHECK: acc.kernels dataOperands(%[[CREATE_A]], %[[CREATE_B]], %[[CREATE_C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.delete accPtr(%[[CREATE_A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) {dataClause = 7 : i64, name = "a"}
+! CHECK: acc.delete accPtr(%[[CREATE_B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) {dataClause = 7 : i64, name = "b"}
+! CHECK: acc.delete accPtr(%[[CREATE_C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) {dataClause = 8 : i64, name = "c"}
!$acc kernels no_create(a, b) create(zero: c)
!$acc end kernels
-!CHECK: acc.kernels create_zero([[C]] : !fir.ref<!fir.array<10x10xf32>>) no_create([[A]], [[B]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[NO_CREATE_A:.*]] = acc.nocreate varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "a"}
+! CHECK: %[[NO_CREATE_B:.*]] = acc.nocreate varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "b"}
+! CHECK: %[[CREATE_C:.*]] = acc.create varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 8 : i64, name = "c"}
+! CHECK: acc.kernels dataOperands(%[[NO_CREATE_A]], %[[NO_CREATE_B]], %[[CREATE_C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels present(a, b, c)
!$acc end kernels
-!CHECK: acc.kernels present([[A]], [[B]], [[C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[PRESENT_A:.*]] = acc.present varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "a"}
+! CHECK: %[[PRESENT_B:.*]] = acc.present varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "b"}
+! CHECK: %[[PRESENT_C:.*]] = acc.present varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "c"}
+! CHECK: acc.kernels dataOperands(%[[PRESENT_A]], %[[PRESENT_B]], %[[PRESENT_C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels deviceptr(a) deviceptr(c)
!$acc end kernels
-!CHECK: acc.kernels deviceptr([[A]], [[C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[DEVICEPTR_A:.*]] = acc.deviceptr varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "a"}
+! CHECK: %[[DEVICEPTR_C:.*]] = acc.deviceptr varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "c"}
+! CHECK: acc.kernels dataOperands(%[[DEVICEPTR_A]], %[[DEVICEPTR_C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
!$acc kernels attach(d, e)
!$acc end kernels
-!CHECK: acc.kernels attach([[D]], [[E]] : !fir.ref<!fir.box<!fir.ptr<f32>>>, !fir.ref<!fir.box<!fir.ptr<f32>>>) {
-!CHECK: acc.terminator
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[BOX_D:.*]] = fir.load %[[D]] : !fir.ref<!fir.box<!fir.ptr<f32>>>
+! CHECK: %[[BOX_ADDR_D:.*]] = fir.box_addr %[[BOX_D]] : (!fir.box<!fir.ptr<f32>>) -> !fir.ptr<f32>
+! CHECK: %[[ATTACH_D:.*]] = acc.attach varPtr(%[[BOX_ADDR_D]] : !fir.ptr<f32>) -> !fir.ptr<f32> {name = "d"}
+! CHECK: %[[BOX_E:.*]] = fir.load %[[E]] : !fir.ref<!fir.box<!fir.ptr<f32>>>
+! CHECK: %[[BOX_ADDR_E:.*]] = fir.box_addr %[[BOX_E]] : (!fir.box<!fir.ptr<f32>>) -> !fir.ptr<f32>
+! CHECK: %[[ATTACH_E:.*]] = acc.attach varPtr(%[[BOX_ADDR_E]] : !fir.ptr<f32>) -> !fir.ptr<f32> {name = "e"}
+! CHECK: acc.kernels dataOperands(%[[ATTACH_D]], %[[ATTACH_E]] : !fir.ptr<f32>, !fir.ptr<f32>) {
+! CHECK: acc.terminator
+! CHECK-NEXT: }{{$}}
end subroutine acc_kernels
diff --git a/flang/test/Lower/OpenACC/acc-parallel-loop.f90 b/flang/test/Lower/OpenACC/acc-parallel-loop.f90
index ab662ab35a53..fa7323ddf6b0 100644
--- a/flang/test/Lower/OpenACC/acc-parallel-loop.f90
+++ b/flang/test/Lower/OpenACC/acc-parallel-loop.f90
@@ -22,25 +22,25 @@ subroutine acc_parallel_loop
integer :: vectorNum = 128
integer, parameter :: tileSize = 2
-!CHECK: [[A:%.*]] = fir.alloca !fir.array<10xf32> {{{.*}}uniq_name = "{{.*}}Ea"}
-!CHECK: [[B:%.*]] = fir.alloca !fir.array<10xf32> {{{.*}}uniq_name = "{{.*}}Eb"}
-!CHECK: [[C:%.*]] = fir.alloca !fir.array<10xf32> {{{.*}}uniq_name = "{{.*}}Ec"}
-!CHECK: [[F:%.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "f", uniq_name = "{{.*}}Ef"}
-!CHECK: [[G:%.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "g", uniq_name = "{{.*}}Eg"}
-!CHECK: [[IFCONDITION:%.*]] = fir.address_of(@{{.*}}ifcondition) : !fir.ref<!fir.logical<4>>
+! CHECK: %[[A:.*]] = fir.alloca !fir.array<10xf32> {{{.*}}uniq_name = "{{.*}}Ea"}
+! CHECK: %[[B:.*]] = fir.alloca !fir.array<10xf32> {{{.*}}uniq_name = "{{.*}}Eb"}
+! CHECK: %[[C:.*]] = fir.alloca !fir.array<10xf32> {{{.*}}uniq_name = "{{.*}}Ec"}
+! CHECK: %[[F:.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "f", uniq_name = "{{.*}}Ef"}
+! CHECK: %[[G:.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "g", uniq_name = "{{.*}}Eg"}
+! CHECK: %[[IFCONDITION:.*]] = fir.address_of(@{{.*}}ifcondition) : !fir.ref<!fir.logical<4>>
!$acc parallel loop
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.parallel {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop async
DO i = 1, n
@@ -48,542 +48,572 @@ subroutine acc_parallel_loop
END DO
!$acc end parallel loop
-!CHECK: acc.parallel {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: } attributes {asyncAttr}
+! CHECK: acc.parallel {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {asyncAttr}
!$acc parallel loop async(1)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[ASYNC1:%.*]] = arith.constant 1 : i32
-!CHECK: acc.parallel async([[ASYNC1]] : i32) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[ASYNC1:%.*]] = arith.constant 1 : i32
+! CHECK: acc.parallel async([[ASYNC1]] : i32) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop async(async)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[ASYNC2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK: acc.parallel async([[ASYNC2]] : i32) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[ASYNC2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK: acc.parallel async([[ASYNC2]] : i32) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop wait
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: } attributes {waitAttr}
+! CHECK: acc.parallel {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {waitAttr}
!$acc parallel loop wait(1)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[WAIT1:%.*]] = arith.constant 1 : i32
-!CHECK: acc.parallel wait([[WAIT1]] : i32) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[WAIT1:%.*]] = arith.constant 1 : i32
+! CHECK: acc.parallel wait([[WAIT1]] : i32) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop wait(1, 2)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[WAIT2:%.*]] = arith.constant 1 : i32
-!CHECK: [[WAIT3:%.*]] = arith.constant 2 : i32
-!CHECK: acc.parallel wait([[WAIT2]], [[WAIT3]] : i32, i32) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[WAIT2:%.*]] = arith.constant 1 : i32
+! CHECK: [[WAIT3:%.*]] = arith.constant 2 : i32
+! CHECK: acc.parallel wait([[WAIT2]], [[WAIT3]] : i32, i32) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop wait(wait1, wait2)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[WAIT4:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK: [[WAIT5:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK: acc.parallel wait([[WAIT4]], [[WAIT5]] : i32, i32) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[WAIT4:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK: [[WAIT5:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK: acc.parallel wait([[WAIT4]], [[WAIT5]] : i32, i32) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop num_gangs(1)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[NUMGANGS1:%.*]] = arith.constant 1 : i32
-!CHECK: acc.parallel num_gangs([[NUMGANGS1]] : i32) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[NUMGANGS1:%.*]] = arith.constant 1 : i32
+! CHECK: acc.parallel num_gangs([[NUMGANGS1]] : i32) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop num_gangs(numGangs)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[NUMGANGS2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK: acc.parallel num_gangs([[NUMGANGS2]] : i32) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[NUMGANGS2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK: acc.parallel num_gangs([[NUMGANGS2]] : i32) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop num_workers(10)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[NUMWORKERS1:%.*]] = arith.constant 10 : i32
-!CHECK: acc.parallel num_workers([[NUMWORKERS1]] : i32) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[NUMWORKERS1:%.*]] = arith.constant 10 : i32
+! CHECK: acc.parallel num_workers([[NUMWORKERS1]] : i32) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop num_workers(numWorkers)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[NUMWORKERS2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK: acc.parallel num_workers([[NUMWORKERS2]] : i32) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[NUMWORKERS2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK: acc.parallel num_workers([[NUMWORKERS2]] : i32) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop vector_length(128)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[VECTORLENGTH1:%.*]] = arith.constant 128 : i32
-!CHECK: acc.parallel vector_length([[VECTORLENGTH1]] : i32) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[VECTORLENGTH1:%.*]] = arith.constant 128 : i32
+! CHECK: acc.parallel vector_length([[VECTORLENGTH1]] : i32) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop vector_length(vectorLength)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[VECTORLENGTH2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK: acc.parallel vector_length([[VECTORLENGTH2]] : i32) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[VECTORLENGTH2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK: acc.parallel vector_length([[VECTORLENGTH2]] : i32) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop if(.TRUE.)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[IF1:%.*]] = arith.constant true
-!CHECK: acc.parallel if([[IF1]]) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[IF1:%.*]] = arith.constant true
+! CHECK: acc.parallel if([[IF1]]) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop if(ifCondition)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[IFCOND:%.*]] = fir.load %{{.*}} : !fir.ref<!fir.logical<4>>
-!CHECK: [[IF2:%.*]] = fir.convert [[IFCOND]] : (!fir.logical<4>) -> i1
-!CHECK: acc.parallel if([[IF2]]) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[IFCOND:%.*]] = fir.load %{{.*}} : !fir.ref<!fir.logical<4>>
+! CHECK: [[IF2:%.*]] = fir.convert [[IFCOND]] : (!fir.logical<4>) -> i1
+! CHECK: acc.parallel if([[IF2]]) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop self(.TRUE.)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[SELF1:%.*]] = arith.constant true
-!CHECK: acc.parallel self([[SELF1]]) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[SELF1:%.*]] = arith.constant true
+! CHECK: acc.parallel self([[SELF1]]) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop self
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: } attributes {selfAttr}
+! CHECK: acc.parallel {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {selfAttr}
!$acc parallel loop self(ifCondition)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[SELF2:%.*]] = fir.convert [[IFCONDITION]] : (!fir.ref<!fir.logical<4>>) -> i1
-!CHECK: acc.parallel self([[SELF2]]) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[SELF2:.*]] = fir.convert %[[IFCONDITION]] : (!fir.ref<!fir.logical<4>>) -> i1
+! CHECK: acc.parallel self(%[[SELF2]]) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop copy(a, b)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel copy([[A]], [[B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = 3 : i64, name = "a"}
+! CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = 3 : i64, name = "b"}
+! CHECK: acc.parallel dataOperands(%[[COPYIN_A]], %[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.copyout accPtr(%[[COPYIN_A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) {dataClause = 3 : i64, name = "a"}
+! CHECK: acc.copyout accPtr(%[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) {dataClause = 3 : i64, name = "b"}
!$acc parallel loop copy(a) copy(b)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel copy([[A]], [[B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = 3 : i64, name = "a"}
+! CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = 3 : i64, name = "b"}
+! CHECK: acc.parallel dataOperands(%[[COPYIN_A]], %[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.copyout accPtr(%[[COPYIN_A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) {dataClause = 3 : i64, name = "a"}
+! CHECK: acc.copyout accPtr(%[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) {dataClause = 3 : i64, name = "b"}
!$acc parallel loop copyin(a) copyin(readonly: b)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel copyin([[A]] : !fir.ref<!fir.array<10xf32>>) copyin_readonly([[B]] : !fir.ref<!fir.array<10xf32>>) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
+! CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = 2 : i64, name = "b"}
+! CHECK: acc.parallel dataOperands(%[[COPYIN_A]], %[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop copyout(a) copyout(zero: b)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel copyout([[A]] : !fir.ref<!fir.array<10xf32>>) copyout_zero([[B]] : !fir.ref<!fir.array<10xf32>>) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = 4 : i64, name = "a"}
+! CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = 4 : i64, name = "b"}
+! CHECK: acc.parallel dataOperands(%[[CREATE_A]], %[[CREATE_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.copyout accPtr(%[[CREATE_A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) {name = "a"}
+! CHECK: acc.copyout accPtr(%[[CREATE_B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) {name = "b"}
!$acc parallel loop create(b) create(zero: a)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel create([[B]] : !fir.ref<!fir.array<10xf32>>) create_zero([[A]] : !fir.ref<!fir.array<10xf32>>) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
+! CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = 8 : i64, name = "a"}
+! CHECK: acc.parallel dataOperands(%[[CREATE_B]], %[[CREATE_A]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.delete accPtr(%[[CREATE_B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) {dataClause = 7 : i64, name = "b"}
+! CHECK: acc.delete accPtr(%[[CREATE_A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) {dataClause = 8 : i64, name = "a"}
!$acc parallel loop no_create(a, b)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel no_create([[A]], [[B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[NOCREATE_A:.*]] = acc.nocreate varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
+! CHECK: %[[NOCREATE_B:.*]] = acc.nocreate varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
+! CHECK: acc.parallel dataOperands(%[[NOCREATE_A]], %[[NOCREATE_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop present(a, b)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel present([[A]], [[B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[PRESENT_A:.*]] = acc.present varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
+! CHECK: %[[PRESENT_B:.*]] = acc.present varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
+! CHECK: acc.parallel dataOperands(%[[PRESENT_A]], %[[PRESENT_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop deviceptr(a) deviceptr(b)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel deviceptr([[A]], [[B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[DEVICEPTR_A:.*]] = acc.deviceptr varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
+! CHECK: %[[DEVICEPTR_B:.*]] = acc.deviceptr varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
+! CHECK: acc.parallel dataOperands(%[[DEVICEPTR_A]], %[[DEVICEPTR_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop attach(f, g)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel attach([[F]], [[G]] : !fir.ref<!fir.box<!fir.ptr<f32>>>, !fir.ref<!fir.box<!fir.ptr<f32>>>) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[BOX_F:.*]] = fir.load %[[F]] : !fir.ref<!fir.box<!fir.ptr<f32>>>
+! CHECK: %[[BOX_ADDR_F:.*]] = fir.box_addr %[[BOX_F]] : (!fir.box<!fir.ptr<f32>>) -> !fir.ptr<f32>
+! CHECK: %[[ATTACH_F:.*]] = acc.attach varPtr(%[[BOX_ADDR_F]] : !fir.ptr<f32>) -> !fir.ptr<f32> {name = "f"}
+! CHECK: %[[BOX_G:.*]] = fir.load %[[G]] : !fir.ref<!fir.box<!fir.ptr<f32>>>
+! CHECK: %[[BOX_ADDR_G:.*]] = fir.box_addr %[[BOX_G]] : (!fir.box<!fir.ptr<f32>>) -> !fir.ptr<f32>
+! CHECK: %[[ATTACH_G:.*]] = acc.attach varPtr(%[[BOX_ADDR_G]] : !fir.ptr<f32>) -> !fir.ptr<f32> {name = "g"}
+! CHECK: acc.parallel dataOperands(%[[ATTACH_F]], %[[ATTACH_G]] : !fir.ptr<f32>, !fir.ptr<f32>) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop private(a) firstprivate(b)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel firstprivate([[B]] : !fir.ref<!fir.array<10xf32>>) private([[A]] : !fir.ref<!fir.array<10xf32>>) {
-!CHECK: acc.loop private([[A]] : !fir.ref<!fir.array<10xf32>>) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.parallel firstprivate(%[[B]] : !fir.ref<!fir.array<10xf32>>) private(%[[A]] : !fir.ref<!fir.array<10xf32>>) {
+! CHECK: acc.loop private(%[[A]] : !fir.ref<!fir.array<10xf32>>) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop seq
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: } attributes {seq}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.parallel {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {seq}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop auto
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: } attributes {auto}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.parallel {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {auto}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop independent
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: } attributes {independent}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.parallel {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {independent}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop gang
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel {
-!CHECK: acc.loop gang {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.parallel {
+! CHECK: acc.loop gang {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop gang(num: 8)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel {
-!CHECK: [[GANGNUM1:%.*]] = arith.constant 8 : i32
-!CHECK-NEXT: acc.loop gang(num=[[GANGNUM1]] : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.parallel {
+! CHECK: [[GANGNUM1:%.*]] = arith.constant 8 : i32
+! CHECK-NEXT: acc.loop gang(num=[[GANGNUM1]] : i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop gang(num: gangNum)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel {
-!CHECK: [[GANGNUM2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK-NEXT: acc.loop gang(num=[[GANGNUM2]] : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.parallel {
+! CHECK: [[GANGNUM2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK-NEXT: acc.loop gang(num=[[GANGNUM2]] : i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop gang(num: gangNum, static: gangStatic)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel {
-!CHECK: acc.loop gang(num=%{{.*}} : i32, static=%{{.*}} : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.parallel {
+! CHECK: acc.loop gang(num=%{{.*}} : i32, static=%{{.*}} : i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop vector
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel {
-!CHECK: acc.loop vector {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.parallel {
+! CHECK: acc.loop vector {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop vector(128)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel {
-!CHECK: [[CONSTANT128:%.*]] = arith.constant 128 : i32
-!CHECK: acc.loop vector([[CONSTANT128]] : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.parallel {
+! CHECK: [[CONSTANT128:%.*]] = arith.constant 128 : i32
+! CHECK: acc.loop vector([[CONSTANT128]] : i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop vector(vectorLength)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel {
-!CHECK: [[VECTORLENGTH:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK: acc.loop vector([[VECTORLENGTH]] : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.parallel {
+! CHECK: [[VECTORLENGTH:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK: acc.loop vector([[VECTORLENGTH]] : i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop worker
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel {
-!CHECK: acc.loop worker {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.parallel {
+! CHECK: acc.loop worker {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop worker(128)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel {
-!CHECK: [[WORKER128:%.*]] = arith.constant 128 : i32
-!CHECK: acc.loop worker([[WORKER128]] : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.parallel {
+! CHECK: [[WORKER128:%.*]] = arith.constant 128 : i32
+! CHECK: acc.loop worker([[WORKER128]] : i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop collapse(2)
DO i = 1, n
@@ -592,14 +622,14 @@ subroutine acc_parallel_loop
END DO
END DO
-!CHECK: acc.parallel {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: } attributes {collapse = 2 : i64}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.parallel {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {collapse = 2 : i64}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop
DO i = 1, n
@@ -609,45 +639,45 @@ subroutine acc_parallel_loop
END DO
END DO
-!CHECK: acc.parallel {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.parallel {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop tile(2)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel {
-!CHECK: [[TILESIZE:%.*]] = arith.constant 2 : i32
-!CHECK: acc.loop tile([[TILESIZE]] : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.parallel {
+! CHECK: [[TILESIZE:%.*]] = arith.constant 2 : i32
+! CHECK: acc.loop tile([[TILESIZE]] : i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop tile(*)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel {
-!CHECK: [[TILESIZEM1:%.*]] = arith.constant -1 : i32
-!CHECK: acc.loop tile([[TILESIZEM1]] : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.parallel {
+! CHECK: [[TILESIZEM1:%.*]] = arith.constant -1 : i32
+! CHECK: acc.loop tile([[TILESIZEM1]] : i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop tile(2, 2)
DO i = 1, n
@@ -656,28 +686,28 @@ subroutine acc_parallel_loop
END DO
END DO
-!CHECK: acc.parallel {
-!CHECK: [[TILESIZE1:%.*]] = arith.constant 2 : i32
-!CHECK: [[TILESIZE2:%.*]] = arith.constant 2 : i32
-!CHECK: acc.loop tile([[TILESIZE1]], [[TILESIZE2]] : i32, i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.parallel {
+! CHECK: [[TILESIZE1:%.*]] = arith.constant 2 : i32
+! CHECK: [[TILESIZE2:%.*]] = arith.constant 2 : i32
+! CHECK: acc.loop tile([[TILESIZE1]], [[TILESIZE2]] : i32, i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop tile(tileSize)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.parallel {
-!CHECK: acc.loop tile(%{{.*}} : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.parallel {
+! CHECK: acc.loop tile(%{{.*}} : i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc parallel loop tile(tileSize, tileSize)
DO i = 1, n
@@ -686,12 +716,12 @@ subroutine acc_parallel_loop
END DO
END DO
-!CHECK: acc.parallel {
-!CHECK: acc.loop tile(%{{.*}}, %{{.*}} : i32, i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.parallel {
+! CHECK: acc.loop tile(%{{.*}}, %{{.*}} : i32, i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
end subroutine acc_parallel_loop
diff --git a/flang/test/Lower/OpenACC/acc-parallel.f90 b/flang/test/Lower/OpenACC/acc-parallel.f90
index ab793a805049..8229890f9a87 100644
--- a/flang/test/Lower/OpenACC/acc-parallel.f90
+++ b/flang/test/Lower/OpenACC/acc-parallel.f90
@@ -15,12 +15,12 @@ subroutine acc_parallel
real, dimension(10, 10) :: a, b, c
real, pointer :: d, e
-!CHECK: [[A:%.*]] = fir.alloca !fir.array<10x10xf32> {{{.*}}uniq_name = "{{.*}}Ea"}
-!CHECK: [[B:%.*]] = fir.alloca !fir.array<10x10xf32> {{{.*}}uniq_name = "{{.*}}Eb"}
-!CHECK: [[C:%.*]] = fir.alloca !fir.array<10x10xf32> {{{.*}}uniq_name = "{{.*}}Ec"}
-!CHECK: [[D:%.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "d", uniq_name = "{{.*}}Ed"}
-!CHECK: [[E:%.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "e", uniq_name = "{{.*}}Ee"}
-!CHECK: [[IFCONDITION:%.*]] = fir.address_of(@{{.*}}ifcondition) : !fir.ref<!fir.logical<4>>
+!CHECK: %[[A:.*]] = fir.alloca !fir.array<10x10xf32> {{{.*}}uniq_name = "{{.*}}Ea"}
+!CHECK: %[[B:.*]] = fir.alloca !fir.array<10x10xf32> {{{.*}}uniq_name = "{{.*}}Eb"}
+!CHECK: %[[C:.*]] = fir.alloca !fir.array<10x10xf32> {{{.*}}uniq_name = "{{.*}}Ec"}
+!CHECK: %[[D:.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "d", uniq_name = "{{.*}}Ed"}
+!CHECK: %[[E:.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "e", uniq_name = "{{.*}}Ee"}
+!CHECK: %[[IFCONDITION:.*]] = fir.address_of(@{{.*}}ifcondition) : !fir.ref<!fir.logical<4>>
!$acc parallel
!$acc end parallel
@@ -168,78 +168,123 @@ subroutine acc_parallel
!$acc parallel self(ifCondition)
!$acc end parallel
-!CHECK: [[SELF2:%.*]] = fir.convert [[IFCONDITION]] : (!fir.ref<!fir.logical<4>>) -> i1
-!CHECK: acc.parallel self([[SELF2]]) {
+!CHECK: %[[SELF2:.*]] = fir.convert %[[IFCONDITION]] : (!fir.ref<!fir.logical<4>>) -> i1
+!CHECK: acc.parallel self(%[[SELF2]]) {
!CHECK: acc.yield
!CHECK-NEXT: }{{$}}
!$acc parallel copy(a, b, c)
!$acc end parallel
-!CHECK: acc.parallel copy([[A]], [[B]], [[C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
+!CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 3 : i64, name = "a"}
+!CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 3 : i64, name = "b"}
+!CHECK: %[[COPYIN_C:.*]] = acc.copyin varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 3 : i64, name = "c"}
+!CHECK: acc.parallel dataOperands(%[[COPYIN_A]], %[[COPYIN_B]], %[[COPYIN_C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
!CHECK: acc.yield
!CHECK-NEXT: }{{$}}
+!CHECK: acc.copyout accPtr(%[[COPYIN_A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) {dataClause = 3 : i64, name = "a"}
+!CHECK: acc.copyout accPtr(%[[COPYIN_B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) {dataClause = 3 : i64, name = "b"}
+!CHECK: acc.copyout accPtr(%[[COPYIN_C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) {dataClause = 3 : i64, name = "c"}
!$acc parallel copy(a) copy(b) copy(c)
!$acc end parallel
-!CHECK: acc.parallel copy([[A]], [[B]], [[C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
+!CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 3 : i64, name = "a"}
+!CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 3 : i64, name = "b"}
+!CHECK: %[[COPYIN_C:.*]] = acc.copyin varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 3 : i64, name = "c"}
+!CHECK: acc.parallel dataOperands(%[[COPYIN_A]], %[[COPYIN_B]], %[[COPYIN_C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
!CHECK: acc.yield
!CHECK-NEXT: }{{$}}
+!CHECK: acc.copyout accPtr(%[[COPYIN_A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) {dataClause = 3 : i64, name = "a"}
+!CHECK: acc.copyout accPtr(%[[COPYIN_B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) {dataClause = 3 : i64, name = "b"}
+!CHECK: acc.copyout accPtr(%[[COPYIN_C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) {dataClause = 3 : i64, name = "c"}
!$acc parallel copyin(a) copyin(readonly: b, c)
!$acc end parallel
-!CHECK: acc.parallel copyin([[A]] : !fir.ref<!fir.array<10x10xf32>>) copyin_readonly([[B]], [[C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
+!CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "a"}
+!CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 2 : i64, name = "b"}
+!CHECK: %[[COPYIN_C:.*]] = acc.copyin varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 2 : i64, name = "c"}
+!CHECK: acc.parallel dataOperands(%[[COPYIN_A]], %[[COPYIN_B]], %[[COPYIN_C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
!CHECK: acc.yield
!CHECK-NEXT: }{{$}}
!$acc parallel copyout(a) copyout(zero: b) copyout(c)
!$acc end parallel
-!CHECK: acc.parallel copyout([[A]], [[C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) copyout_zero([[B]] : !fir.ref<!fir.array<10x10xf32>>) {
+!CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 4 : i64, name = "a"}
+!CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 4 : i64, name = "b"}
+!CHECK: %[[CREATE_C:.*]] = acc.create varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 4 : i64, name = "c"}
+!CHECK: acc.parallel dataOperands(%[[CREATE_A]], %[[CREATE_B]], %[[CREATE_C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
!CHECK: acc.yield
!CHECK-NEXT: }{{$}}
+!CHECK: acc.copyout accPtr(%[[CREATE_A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) {name = "a"}
+!CHECK: acc.copyout accPtr(%[[CREATE_B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) {name = "b"}
+!CHECK: acc.copyout accPtr(%[[CREATE_C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) {name = "c"}
!$acc parallel create(a, b) create(zero: c)
!$acc end parallel
-!CHECK: acc.parallel create([[A]], [[B]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) create_zero([[C]] : !fir.ref<!fir.array<10x10xf32>>) {
+!CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "a"}
+!CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "b"}
+!CHECK: %[[CREATE_C:.*]] = acc.create varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 8 : i64, name = "c"}
+!CHECK: acc.parallel dataOperands(%[[CREATE_A]], %[[CREATE_B]], %[[CREATE_C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
!CHECK: acc.yield
!CHECK-NEXT: }{{$}}
+!CHECK: acc.delete accPtr(%[[CREATE_A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) {dataClause = 7 : i64, name = "a"}
+!CHECK: acc.delete accPtr(%[[CREATE_B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) {dataClause = 7 : i64, name = "b"}
+!CHECK: acc.delete accPtr(%[[CREATE_C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) {dataClause = 8 : i64, name = "c"}
!$acc parallel no_create(a, b) create(zero: c)
!$acc end parallel
-!CHECK: acc.parallel create_zero([[C]] : !fir.ref<!fir.array<10x10xf32>>) no_create([[A]], [[B]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
+!CHECK: %[[NO_CREATE_A:.*]] = acc.nocreate varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "a"}
+!CHECK: %[[NO_CREATE_B:.*]] = acc.nocreate varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "b"}
+!CHECK: %[[CREATE_C:.*]] = acc.create varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 8 : i64, name = "c"}
+!CHECK: acc.parallel dataOperands(%[[NO_CREATE_A]], %[[NO_CREATE_B]], %[[CREATE_C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
!CHECK: acc.yield
!CHECK-NEXT: }{{$}}
+!CHECK: acc.delete accPtr(%[[CREATE_C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) {dataClause = 8 : i64, name = "c"}
+
!$acc parallel present(a, b, c)
!$acc end parallel
-!CHECK: acc.parallel present([[A]], [[B]], [[C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
+!CHECK: %[[PRESENT_A:.*]] = acc.present varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "a"}
+!CHECK: %[[PRESENT_B:.*]] = acc.present varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "b"}
+!CHECK: %[[PRESENT_C:.*]] = acc.present varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "c"}
+!CHECK: acc.parallel dataOperands(%[[PRESENT_A]], %[[PRESENT_B]], %[[PRESENT_C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
!CHECK: acc.yield
!CHECK-NEXT: }{{$}}
!$acc parallel deviceptr(a) deviceptr(c)
!$acc end parallel
-!CHECK: acc.parallel deviceptr([[A]], [[C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
+!CHECK: %[[DEVICEPTR_A:.*]] = acc.deviceptr varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "a"}
+!CHECK: %[[DEVICEPTR_C:.*]] = acc.deviceptr varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "c"}
+!CHECK: acc.parallel dataOperands(%[[DEVICEPTR_A]], %[[DEVICEPTR_C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
!CHECK: acc.yield
!CHECK-NEXT: }{{$}}
!$acc parallel attach(d, e)
!$acc end parallel
-!CHECK: acc.parallel attach([[D]], [[E]] : !fir.ref<!fir.box<!fir.ptr<f32>>>, !fir.ref<!fir.box<!fir.ptr<f32>>>) {
+!CHECK: %[[BOX_D:.*]] = fir.load %[[D]] : !fir.ref<!fir.box<!fir.ptr<f32>>>
+!CHECK: %[[BOX_ADDR_D:.*]] = fir.box_addr %[[BOX_D]] : (!fir.box<!fir.ptr<f32>>) -> !fir.ptr<f32>
+!CHECK: %[[ATTACH_D:.*]] = acc.attach varPtr(%[[BOX_ADDR_D]] : !fir.ptr<f32>) -> !fir.ptr<f32> {name = "d"}
+!CHECK: %[[BOX_E:.*]] = fir.load %[[E]] : !fir.ref<!fir.box<!fir.ptr<f32>>>
+!CHECK: %[[BOX_ADDR_E:.*]] = fir.box_addr %[[BOX_E]] : (!fir.box<!fir.ptr<f32>>) -> !fir.ptr<f32>
+!CHECK: %[[ATTACH_E:.*]] = acc.attach varPtr(%[[BOX_ADDR_E]] : !fir.ptr<f32>) -> !fir.ptr<f32> {name = "e"}
+!CHECK: acc.parallel dataOperands(%[[ATTACH_D]], %[[ATTACH_E]] : !fir.ptr<f32>, !fir.ptr<f32>) {
!CHECK: acc.yield
!CHECK-NEXT: }{{$}}
+!CHECK: acc.detach accPtr(%[[ATTACH_D]] : !fir.ptr<f32>) {dataClause = 10 : i64, name = "d"}
+!CHECK: acc.detach accPtr(%[[ATTACH_E]] : !fir.ptr<f32>) {dataClause = 10 : i64, name = "e"}
!$acc parallel private(a) firstprivate(b) private(c)
!$acc end parallel
-!CHECK: acc.parallel firstprivate([[B]] : !fir.ref<!fir.array<10x10xf32>>) private([[A]], [[C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
+!CHECK: acc.parallel firstprivate(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) private(%[[A]], %[[C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
!CHECK: acc.yield
!CHECK-NEXT: }{{$}}
diff --git a/flang/test/Lower/OpenACC/acc-serial-loop.f90 b/flang/test/Lower/OpenACC/acc-serial-loop.f90
index c2ee38a7c4f0..673a90f56708 100644
--- a/flang/test/Lower/OpenACC/acc-serial-loop.f90
+++ b/flang/test/Lower/OpenACC/acc-serial-loop.f90
@@ -22,25 +22,25 @@ subroutine acc_serial_loop
integer :: vectorNum = 128
integer, parameter :: tileSize = 2
-!CHECK: [[A:%.*]] = fir.alloca !fir.array<10xf32> {{{.*}}uniq_name = "{{.*}}Ea"}
-!CHECK: [[B:%.*]] = fir.alloca !fir.array<10xf32> {{{.*}}uniq_name = "{{.*}}Eb"}
-!CHECK: [[C:%.*]] = fir.alloca !fir.array<10xf32> {{{.*}}uniq_name = "{{.*}}Ec"}
-!CHECK: [[F:%.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "f", uniq_name = "{{.*}}Ef"}
-!CHECK: [[G:%.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "g", uniq_name = "{{.*}}Eg"}
-!CHECK: [[IFCONDITION:%.*]] = fir.address_of(@{{.*}}ifcondition) : !fir.ref<!fir.logical<4>>
+! CHECK: %[[A:.*]] = fir.alloca !fir.array<10xf32> {{{.*}}uniq_name = "{{.*}}Ea"}
+! CHECK: %[[B:.*]] = fir.alloca !fir.array<10xf32> {{{.*}}uniq_name = "{{.*}}Eb"}
+! CHECK: %[[C:.*]] = fir.alloca !fir.array<10xf32> {{{.*}}uniq_name = "{{.*}}Ec"}
+! CHECK: %[[F:.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "f", uniq_name = "{{.*}}Ef"}
+! CHECK: %[[G:.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "g", uniq_name = "{{.*}}Eg"}
+! CHECK: %[[IFCONDITION:.*]] = fir.address_of(@{{.*}}ifcondition) : !fir.ref<!fir.logical<4>>
!$acc serial loop
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.serial {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop async
DO i = 1, n
@@ -48,458 +48,488 @@ subroutine acc_serial_loop
END DO
!$acc end serial loop
-!CHECK: acc.serial {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: } attributes {asyncAttr}
+! CHECK: acc.serial {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {asyncAttr}
!$acc serial loop async(1)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[ASYNC1:%.*]] = arith.constant 1 : i32
-!CHECK: acc.serial async([[ASYNC1]] : i32) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[ASYNC1:%.*]] = arith.constant 1 : i32
+! CHECK: acc.serial async([[ASYNC1]] : i32) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop async(async)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[ASYNC2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK: acc.serial async([[ASYNC2]] : i32) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[ASYNC2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK: acc.serial async([[ASYNC2]] : i32) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop wait
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: } attributes {waitAttr}
+! CHECK: acc.serial {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {waitAttr}
!$acc serial loop wait(1)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[WAIT1:%.*]] = arith.constant 1 : i32
-!CHECK: acc.serial wait([[WAIT1]] : i32) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[WAIT1:%.*]] = arith.constant 1 : i32
+! CHECK: acc.serial wait([[WAIT1]] : i32) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop wait(1, 2)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[WAIT2:%.*]] = arith.constant 1 : i32
-!CHECK: [[WAIT3:%.*]] = arith.constant 2 : i32
-!CHECK: acc.serial wait([[WAIT2]], [[WAIT3]] : i32, i32) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[WAIT2:%.*]] = arith.constant 1 : i32
+! CHECK: [[WAIT3:%.*]] = arith.constant 2 : i32
+! CHECK: acc.serial wait([[WAIT2]], [[WAIT3]] : i32, i32) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop wait(wait1, wait2)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[WAIT4:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK: [[WAIT5:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK: acc.serial wait([[WAIT4]], [[WAIT5]] : i32, i32) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[WAIT4:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK: [[WAIT5:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK: acc.serial wait([[WAIT4]], [[WAIT5]] : i32, i32) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop if(.TRUE.)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[IF1:%.*]] = arith.constant true
-!CHECK: acc.serial if([[IF1]]) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[IF1:%.*]] = arith.constant true
+! CHECK: acc.serial if([[IF1]]) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop if(ifCondition)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[IFCOND:%.*]] = fir.load %{{.*}} : !fir.ref<!fir.logical<4>>
-!CHECK: [[IF2:%.*]] = fir.convert [[IFCOND]] : (!fir.logical<4>) -> i1
-!CHECK: acc.serial if([[IF2]]) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[IFCOND:%.*]] = fir.load %{{.*}} : !fir.ref<!fir.logical<4>>
+! CHECK: [[IF2:%.*]] = fir.convert [[IFCOND]] : (!fir.logical<4>) -> i1
+! CHECK: acc.serial if([[IF2]]) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop self(.TRUE.)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[SELF1:%.*]] = arith.constant true
-!CHECK: acc.serial self([[SELF1]]) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: [[SELF1:%.*]] = arith.constant true
+! CHECK: acc.serial self([[SELF1]]) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop self
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: } attributes {selfAttr}
+! CHECK: acc.serial {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {selfAttr}
!$acc serial loop self(ifCondition)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: [[SELF2:%.*]] = fir.convert [[IFCONDITION]] : (!fir.ref<!fir.logical<4>>) -> i1
-!CHECK: acc.serial self([[SELF2]]) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[SELF2:.*]] = fir.convert %[[IFCONDITION]] : (!fir.ref<!fir.logical<4>>) -> i1
+! CHECK: acc.serial self(%[[SELF2]]) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop copy(a, b)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial copy([[A]], [[B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = 3 : i64, name = "a"}
+! CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = 3 : i64, name = "b"}
+! CHECK: acc.serial dataOperands(%[[COPYIN_A]], %[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.copyout accPtr(%[[COPYIN_A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) {dataClause = 3 : i64, name = "a"}
+! CHECK: acc.copyout accPtr(%[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) {dataClause = 3 : i64, name = "b"}
!$acc serial loop copy(a) copy(b)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial copy([[A]], [[B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = 3 : i64, name = "a"}
+! CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = 3 : i64, name = "b"}
+! CHECK: acc.serial dataOperands(%[[COPYIN_A]], %[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.copyout accPtr(%[[COPYIN_A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) {dataClause = 3 : i64, name = "a"}
+! CHECK: acc.copyout accPtr(%[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) {dataClause = 3 : i64, name = "b"}
!$acc serial loop copyin(a) copyin(readonly: b)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial copyin([[A]] : !fir.ref<!fir.array<10xf32>>) copyin_readonly([[B]] : !fir.ref<!fir.array<10xf32>>) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
+! CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = 2 : i64, name = "b"}
+! CHECK: acc.serial dataOperands(%[[COPYIN_A]], %[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop copyout(a) copyout(zero: b)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial copyout([[A]] : !fir.ref<!fir.array<10xf32>>) copyout_zero([[B]] : !fir.ref<!fir.array<10xf32>>) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = 4 : i64, name = "a"}
+! CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = 4 : i64, name = "b"}
+! CHECK: acc.serial dataOperands(%[[CREATE_A]], %[[CREATE_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.copyout accPtr(%[[CREATE_A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) {name = "a"}
+! CHECK: acc.copyout accPtr(%[[CREATE_B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) {name = "b"}
!$acc serial loop create(b) create(zero: a)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial create([[B]] : !fir.ref<!fir.array<10xf32>>) create_zero([[A]] : !fir.ref<!fir.array<10xf32>>) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
+! CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = 8 : i64, name = "a"}
+! CHECK: acc.serial dataOperands(%[[CREATE_B]], %[[CREATE_A]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.delete accPtr(%[[CREATE_B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) {dataClause = 7 : i64, name = "b"}
+! CHECK: acc.delete accPtr(%[[CREATE_A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) {dataClause = 8 : i64, name = "a"}
!$acc serial loop no_create(a, b)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial no_create([[A]], [[B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[NOCREATE_A:.*]] = acc.nocreate varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
+! CHECK: %[[NOCREATE_B:.*]] = acc.nocreate varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
+! CHECK: acc.serial dataOperands(%[[NOCREATE_A]], %[[NOCREATE_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop present(a, b)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial present([[A]], [[B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[PRESENT_A:.*]] = acc.present varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
+! CHECK: %[[PRESENT_B:.*]] = acc.present varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
+! CHECK: acc.serial dataOperands(%[[PRESENT_A]], %[[PRESENT_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop deviceptr(a) deviceptr(b)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial deviceptr([[A]], [[B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[DEVICEPTR_A:.*]] = acc.deviceptr varPtr(%[[A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
+! CHECK: %[[DEVICEPTR_B:.*]] = acc.deviceptr varPtr(%[[B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
+! CHECK: acc.serial dataOperands(%[[DEVICEPTR_A]], %[[DEVICEPTR_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop attach(f, g)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial attach([[F]], [[G]] : !fir.ref<!fir.box<!fir.ptr<f32>>>, !fir.ref<!fir.box<!fir.ptr<f32>>>) {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: %[[BOX_F:.*]] = fir.load %[[F]] : !fir.ref<!fir.box<!fir.ptr<f32>>>
+! CHECK: %[[BOX_ADDR_F:.*]] = fir.box_addr %[[BOX_F]] : (!fir.box<!fir.ptr<f32>>) -> !fir.ptr<f32>
+! CHECK: %[[ATTACH_F:.*]] = acc.attach varPtr(%[[BOX_ADDR_F]] : !fir.ptr<f32>) -> !fir.ptr<f32> {name = "f"}
+! CHECK: %[[BOX_G:.*]] = fir.load %[[G]] : !fir.ref<!fir.box<!fir.ptr<f32>>>
+! CHECK: %[[BOX_ADDR_G:.*]] = fir.box_addr %[[BOX_G]] : (!fir.box<!fir.ptr<f32>>) -> !fir.ptr<f32>
+! CHECK: %[[ATTACH_G:.*]] = acc.attach varPtr(%[[BOX_ADDR_G]] : !fir.ptr<f32>) -> !fir.ptr<f32> {name = "g"}
+! CHECK: acc.serial dataOperands(%[[ATTACH_F]], %[[ATTACH_G]] : !fir.ptr<f32>, !fir.ptr<f32>) {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop private(a) firstprivate(b)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial firstprivate([[B]] : !fir.ref<!fir.array<10xf32>>) private([[A]] : !fir.ref<!fir.array<10xf32>>) {
-!CHECK: acc.loop private([[A]] : !fir.ref<!fir.array<10xf32>>) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.serial firstprivate(%[[B]] : !fir.ref<!fir.array<10xf32>>) private(%[[A]] : !fir.ref<!fir.array<10xf32>>) {
+! CHECK: acc.loop private(%[[A]] : !fir.ref<!fir.array<10xf32>>) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop seq
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: } attributes {seq}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.serial {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {seq}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop auto
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: } attributes {auto}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.serial {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {auto}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop independent
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: } attributes {independent}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.serial {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {independent}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop gang
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial {
-!CHECK: acc.loop gang {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.serial {
+! CHECK: acc.loop gang {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop gang(num: 8)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial {
-!CHECK: [[GANGNUM1:%.*]] = arith.constant 8 : i32
-!CHECK-NEXT: acc.loop gang(num=[[GANGNUM1]] : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.serial {
+! CHECK: [[GANGNUM1:%.*]] = arith.constant 8 : i32
+! CHECK-NEXT: acc.loop gang(num=[[GANGNUM1]] : i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop gang(num: gangNum)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial {
-!CHECK: [[GANGNUM2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK-NEXT: acc.loop gang(num=[[GANGNUM2]] : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.serial {
+! CHECK: [[GANGNUM2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK-NEXT: acc.loop gang(num=[[GANGNUM2]] : i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop gang(num: gangNum, static: gangStatic)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial {
-!CHECK: acc.loop gang(num=%{{.*}} : i32, static=%{{.*}} : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.serial {
+! CHECK: acc.loop gang(num=%{{.*}} : i32, static=%{{.*}} : i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop vector
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial {
-!CHECK: acc.loop vector {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.serial {
+! CHECK: acc.loop vector {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop vector(128)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial {
-!CHECK: [[CONSTANT128:%.*]] = arith.constant 128 : i32
-!CHECK: acc.loop vector([[CONSTANT128]] : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.serial {
+! CHECK: [[CONSTANT128:%.*]] = arith.constant 128 : i32
+! CHECK: acc.loop vector([[CONSTANT128]] : i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop vector(vectorLength)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial {
-!CHECK: [[VECTORLENGTH:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK: acc.loop vector([[VECTORLENGTH]] : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.serial {
+! CHECK: [[VECTORLENGTH:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK: acc.loop vector([[VECTORLENGTH]] : i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop worker
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial {
-!CHECK: acc.loop worker {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.serial {
+! CHECK: acc.loop worker {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop worker(128)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial {
-!CHECK: [[WORKER128:%.*]] = arith.constant 128 : i32
-!CHECK: acc.loop worker([[WORKER128]] : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.serial {
+! CHECK: [[WORKER128:%.*]] = arith.constant 128 : i32
+! CHECK: acc.loop worker([[WORKER128]] : i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop collapse(2)
DO i = 1, n
@@ -508,14 +538,14 @@ subroutine acc_serial_loop
END DO
END DO
-!CHECK: acc.serial {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: } attributes {collapse = 2 : i64}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.serial {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: } attributes {collapse = 2 : i64}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop
DO i = 1, n
@@ -525,45 +555,45 @@ subroutine acc_serial_loop
END DO
END DO
-!CHECK: acc.serial {
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.loop {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.serial {
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.loop {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop tile(2)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial {
-!CHECK: [[TILESIZE:%.*]] = arith.constant 2 : i32
-!CHECK: acc.loop tile([[TILESIZE]] : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.serial {
+! CHECK: [[TILESIZE:%.*]] = arith.constant 2 : i32
+! CHECK: acc.loop tile([[TILESIZE]] : i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop tile(*)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial {
-!CHECK: [[TILESIZEM1:%.*]] = arith.constant -1 : i32
-!CHECK: acc.loop tile([[TILESIZEM1]] : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.serial {
+! CHECK: [[TILESIZEM1:%.*]] = arith.constant -1 : i32
+! CHECK: acc.loop tile([[TILESIZEM1]] : i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop tile(2, 2)
DO i = 1, n
@@ -572,28 +602,28 @@ subroutine acc_serial_loop
END DO
END DO
-!CHECK: acc.serial {
-!CHECK: [[TILESIZE1:%.*]] = arith.constant 2 : i32
-!CHECK: [[TILESIZE2:%.*]] = arith.constant 2 : i32
-!CHECK: acc.loop tile([[TILESIZE1]], [[TILESIZE2]] : i32, i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.serial {
+! CHECK: [[TILESIZE1:%.*]] = arith.constant 2 : i32
+! CHECK: [[TILESIZE2:%.*]] = arith.constant 2 : i32
+! CHECK: acc.loop tile([[TILESIZE1]], [[TILESIZE2]] : i32, i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop tile(tileSize)
DO i = 1, n
a(i) = b(i)
END DO
-!CHECK: acc.serial {
-!CHECK: acc.loop tile(%{{.*}} : i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.serial {
+! CHECK: acc.loop tile(%{{.*}} : i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
!$acc serial loop tile(tileSize, tileSize)
DO i = 1, n
@@ -602,12 +632,12 @@ subroutine acc_serial_loop
END DO
END DO
-!CHECK: acc.serial {
-!CHECK: acc.loop tile(%{{.*}}, %{{.*}} : i32, i32) {
-!CHECK: fir.do_loop
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
-!CHECK: acc.yield
-!CHECK-NEXT: }{{$}}
+! CHECK: acc.serial {
+! CHECK: acc.loop tile(%{{.*}}, %{{.*}} : i32, i32) {
+! CHECK: fir.do_loop
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
+! CHECK: acc.yield
+! CHECK-NEXT: }{{$}}
end subroutine acc_serial_loop
diff --git a/flang/test/Lower/OpenACC/acc-serial.f90 b/flang/test/Lower/OpenACC/acc-serial.f90
index 5bc19984fef5..96ecf80f28cd 100644
--- a/flang/test/Lower/OpenACC/acc-serial.f90
+++ b/flang/test/Lower/OpenACC/acc-serial.f90
@@ -15,12 +15,12 @@ subroutine acc_serial
real, dimension(10, 10) :: a, b, c
real, pointer :: d, e
-! CHECK: [[A:%.*]] = fir.alloca !fir.array<10x10xf32> {{{.*}}uniq_name = "{{.*}}Ea"}
-! CHECK: [[B:%.*]] = fir.alloca !fir.array<10x10xf32> {{{.*}}uniq_name = "{{.*}}Eb"}
-! CHECK: [[C:%.*]] = fir.alloca !fir.array<10x10xf32> {{{.*}}uniq_name = "{{.*}}Ec"}
-! CHECK: [[D:%.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "d", uniq_name = "{{.*}}Ed"}
-! CHECK: [[E:%.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "e", uniq_name = "{{.*}}Ee"}
-! CHECK: [[IFCONDITION:%.*]] = fir.address_of(@{{.*}}ifcondition) : !fir.ref<!fir.logical<4>>
+! CHECK: %[[A:.*]] = fir.alloca !fir.array<10x10xf32> {{{.*}}uniq_name = "{{.*}}Ea"}
+! CHECK: %[[B:.*]] = fir.alloca !fir.array<10x10xf32> {{{.*}}uniq_name = "{{.*}}Eb"}
+! CHECK: %[[C:.*]] = fir.alloca !fir.array<10x10xf32> {{{.*}}uniq_name = "{{.*}}Ec"}
+! CHECK: %[[D:.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "d", uniq_name = "{{.*}}Ed"}
+! CHECK: %[[E:.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "e", uniq_name = "{{.*}}Ee"}
+! CHECK: %[[IFCONDITION:.*]] = fir.address_of(@{{.*}}ifcondition) : !fir.ref<!fir.logical<4>>
!$acc serial
!$acc end serial
@@ -120,78 +120,121 @@ subroutine acc_serial
!$acc serial self(ifCondition)
!$acc end serial
-! CHECK: [[SELF2:%.*]] = fir.convert [[IFCONDITION]] : (!fir.ref<!fir.logical<4>>) -> i1
-! CHECK: acc.serial self([[SELF2]]) {
+! CHECK: %[[SELF2:.*]] = fir.convert %[[IFCONDITION]] : (!fir.ref<!fir.logical<4>>) -> i1
+! CHECK: acc.serial self(%[[SELF2]]) {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
!$acc serial copy(a, b, c)
!$acc end serial
-! CHECK: acc.serial copy([[A]], [[B]], [[C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
+! CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 3 : i64, name = "a"}
+! CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 3 : i64, name = "b"}
+! CHECK: %[[COPYIN_C:.*]] = acc.copyin varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 3 : i64, name = "c"}
+! CHECK: acc.serial dataOperands(%[[COPYIN_A]], %[[COPYIN_B]], %[[COPYIN_C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
+! CHECK: acc.copyout accPtr(%[[COPYIN_A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) {dataClause = 3 : i64, name = "a"}
+! CHECK: acc.copyout accPtr(%[[COPYIN_B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) {dataClause = 3 : i64, name = "b"}
+! CHECK: acc.copyout accPtr(%[[COPYIN_C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) {dataClause = 3 : i64, name = "c"}
!$acc serial copy(a) copy(b) copy(c)
!$acc end serial
-! CHECK: acc.serial copy([[A]], [[B]], [[C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
+! CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 3 : i64, name = "a"}
+! CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 3 : i64, name = "b"}
+! CHECK: %[[COPYIN_C:.*]] = acc.copyin varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 3 : i64, name = "c"}
+! CHECK: acc.serial dataOperands(%[[COPYIN_A]], %[[COPYIN_B]], %[[COPYIN_C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
+! CHECK: acc.copyout accPtr(%[[COPYIN_A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) {dataClause = 3 : i64, name = "a"}
+! CHECK: acc.copyout accPtr(%[[COPYIN_B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) {dataClause = 3 : i64, name = "b"}
+! CHECK: acc.copyout accPtr(%[[COPYIN_C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) {dataClause = 3 : i64, name = "c"}
!$acc serial copyin(a) copyin(readonly: b, c)
!$acc end serial
-! CHECK: acc.serial copyin([[A]] : !fir.ref<!fir.array<10x10xf32>>) copyin_readonly([[B]], [[C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
+! CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "a"}
+! CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 2 : i64, name = "b"}
+! CHECK: %[[COPYIN_C:.*]] = acc.copyin varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 2 : i64, name = "c"}
+! CHECK: acc.serial dataOperands(%[[COPYIN_A]], %[[COPYIN_B]], %[[COPYIN_C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
!$acc serial copyout(a) copyout(zero: b) copyout(c)
!$acc end serial
-! CHECK: acc.serial copyout([[A]], [[C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) copyout_zero([[B]] : !fir.ref<!fir.array<10x10xf32>>) {
+! CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 4 : i64, name = "a"}
+! CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 4 : i64, name = "b"}
+! CHECK: %[[CREATE_C:.*]] = acc.create varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 4 : i64, name = "c"}
+! CHECK: acc.serial dataOperands(%[[CREATE_A]], %[[CREATE_B]], %[[CREATE_C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
+! CHECK: acc.copyout accPtr(%[[CREATE_A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) {name = "a"}
+! CHECK: acc.copyout accPtr(%[[CREATE_B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) {name = "b"}
+! CHECK: acc.copyout accPtr(%[[CREATE_C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) {name = "c"}
!$acc serial create(a, b) create(zero: c)
!$acc end serial
-! CHECK: acc.serial create([[A]], [[B]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) create_zero([[C]] : !fir.ref<!fir.array<10x10xf32>>) {
+! CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "a"}
+! CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "b"}
+! CHECK: %[[CREATE_C:.*]] = acc.create varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 8 : i64, name = "c"}
+! CHECK: acc.serial dataOperands(%[[CREATE_A]], %[[CREATE_B]], %[[CREATE_C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
+! CHECK: acc.delete accPtr(%[[CREATE_A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) {dataClause = 7 : i64, name = "a"}
+! CHECK: acc.delete accPtr(%[[CREATE_B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) {dataClause = 7 : i64, name = "b"}
+! CHECK: acc.delete accPtr(%[[CREATE_C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) {dataClause = 8 : i64, name = "c"}
!$acc serial no_create(a, b) create(zero: c)
!$acc end serial
-! CHECK: acc.serial create_zero([[C]] : !fir.ref<!fir.array<10x10xf32>>) no_create([[A]], [[B]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
+! CHECK: %[[NO_CREATE_A:.*]] = acc.nocreate varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "a"}
+! CHECK: %[[NO_CREATE_B:.*]] = acc.nocreate varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "b"}
+! CHECK: %[[CREATE_C:.*]] = acc.create varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 8 : i64, name = "c"}
+! CHECK: acc.serial dataOperands(%[[NO_CREATE_A]], %[[NO_CREATE_B]], %[[CREATE_C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
!$acc serial present(a, b, c)
!$acc end serial
-! CHECK: acc.serial present([[A]], [[B]], [[C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
+! CHECK: %[[PRESENT_A:.*]] = acc.present varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "a"}
+! CHECK: %[[PRESENT_B:.*]] = acc.present varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "b"}
+! CHECK: %[[PRESENT_C:.*]] = acc.present varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "c"}
+! CHECK: acc.serial dataOperands(%[[PRESENT_A]], %[[PRESENT_B]], %[[PRESENT_C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
!$acc serial deviceptr(a) deviceptr(c)
!$acc end serial
-! CHECK: acc.serial deviceptr([[A]], [[C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
+! CHECK: %[[DEVICEPTR_A:.*]] = acc.deviceptr varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "a"}
+! CHECK: %[[DEVICEPTR_C:.*]] = acc.deviceptr varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "c"}
+! CHECK: acc.serial dataOperands(%[[DEVICEPTR_A]], %[[DEVICEPTR_C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
-
+
!$acc serial attach(d, e)
!$acc end serial
-! CHECK: acc.serial attach([[D]], [[E]] : !fir.ref<!fir.box<!fir.ptr<f32>>>, !fir.ref<!fir.box<!fir.ptr<f32>>>) {
+! CHECK: %[[BOX_D:.*]] = fir.load %[[D]] : !fir.ref<!fir.box<!fir.ptr<f32>>>
+! CHECK: %[[BOX_ADDR_D:.*]] = fir.box_addr %[[BOX_D]] : (!fir.box<!fir.ptr<f32>>) -> !fir.ptr<f32>
+! CHECK: %[[ATTACH_D:.*]] = acc.attach varPtr(%[[BOX_ADDR_D]] : !fir.ptr<f32>) -> !fir.ptr<f32> {name = "d"}
+! CHECK: %[[BOX_E:.*]] = fir.load %[[E]] : !fir.ref<!fir.box<!fir.ptr<f32>>>
+! CHECK: %[[BOX_ADDR_E:.*]] = fir.box_addr %[[BOX_E]] : (!fir.box<!fir.ptr<f32>>) -> !fir.ptr<f32>
+! CHECK: %[[ATTACH_E:.*]] = acc.attach varPtr(%[[BOX_ADDR_E]] : !fir.ptr<f32>) -> !fir.ptr<f32> {name = "e"}
+! CHECK: acc.serial dataOperands(%[[ATTACH_D]], %[[ATTACH_E]] : !fir.ptr<f32>, !fir.ptr<f32>) {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
+! CHECK: acc.detach accPtr(%[[ATTACH_D]] : !fir.ptr<f32>) {dataClause = 10 : i64, name = "d"}
+! CHECK: acc.detach accPtr(%[[ATTACH_E]] : !fir.ptr<f32>) {dataClause = 10 : i64, name = "e"}
!$acc serial private(a) firstprivate(b) private(c)
!$acc end serial
-! CHECK: acc.serial firstprivate([[B]] : !fir.ref<!fir.array<10x10xf32>>) private([[A]], [[C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
+! CHECK: acc.serial firstprivate(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) private(%[[A]], %[[C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) {
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
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