[flang-commits] [flang] fb90d5f - [flang][openacc] Support .neqv. reduction operator
Valentin Clement via flang-commits
flang-commits at lists.llvm.org
Wed Jul 12 13:27:07 PDT 2023
Author: Valentin Clement
Date: 2023-07-12T13:27:02-07:00
New Revision: fb90d5f6c3aa86640cb9236ab8515df72e90cc3a
URL: https://github.com/llvm/llvm-project/commit/fb90d5f6c3aa86640cb9236ab8515df72e90cc3a
DIFF: https://github.com/llvm/llvm-project/commit/fb90d5f6c3aa86640cb9236ab8515df72e90cc3a.diff
LOG: [flang][openacc] Support .neqv. reduction operator
Add support for the `.neqv.` reduction operator for
Flang/OpenACC lowering.
Depends on D154900
Reviewed By: razvanlupusoru
Differential Revision: https://reviews.llvm.org/D154901
Added:
Modified:
flang/lib/Lower/OpenACC.cpp
flang/test/Lower/OpenACC/acc-reduction.f90
Removed:
################################################################################
diff --git a/flang/lib/Lower/OpenACC.cpp b/flang/lib/Lower/OpenACC.cpp
index dc7bd872282d57..e30ff193ed2ec8 100644
--- a/flang/lib/Lower/OpenACC.cpp
+++ b/flang/lib/Lower/OpenACC.cpp
@@ -687,12 +687,10 @@ static R getReductionInitValue(mlir::acc::ReductionOperator op, mlir::Type ty) {
static mlir::Value genReductionInitValue(fir::FirOpBuilder &builder,
mlir::Location loc, mlir::Type ty,
mlir::acc::ReductionOperator op) {
- if (op == mlir::acc::ReductionOperator::AccEqv &&
- op == mlir::acc::ReductionOperator::AccNeqv)
- TODO(loc, "reduction operator");
-
if (op == mlir::acc::ReductionOperator::AccLand ||
- op == mlir::acc::ReductionOperator::AccLor) {
+ op == mlir::acc::ReductionOperator::AccLor ||
+ op == mlir::acc::ReductionOperator::AccEqv ||
+ op == mlir::acc::ReductionOperator::AccNeqv) {
assert(mlir::isa<fir::LogicalType>(ty) && "expect fir.logical type");
bool value = true; // .true. for .and. and .eqv.
if (op == mlir::acc::ReductionOperator::AccLor ||
@@ -847,6 +845,10 @@ static mlir::Value genCombiner(fir::FirOpBuilder &builder, mlir::Location loc,
return genComparisonCombiner(builder, loc, mlir::arith::CmpIPredicate::eq,
value1, value2);
+ if (op == mlir::acc::ReductionOperator::AccNeqv)
+ return genComparisonCombiner(builder, loc, mlir::arith::CmpIPredicate::ne,
+ value1, value2);
+
TODO(loc, "reduction operator");
}
diff --git a/flang/test/Lower/OpenACC/acc-reduction.f90 b/flang/test/Lower/OpenACC/acc-reduction.f90
index e01b0b45eaebfe..b88777c79249d3 100644
--- a/flang/test/Lower/OpenACC/acc-reduction.f90
+++ b/flang/test/Lower/OpenACC/acc-reduction.f90
@@ -2,6 +2,19 @@
! RUN: bbc -fopenacc -emit-fir %s -o - | FileCheck %s
+! CHECK-LABEL: acc.reduction.recipe @reduction_neqv_l32 : !fir.logical<4> reduction_operator <neqv> init {
+! CHECK: ^bb0(%{{.*}}: !fir.logical<4>):
+! CHECK: %[[CST:.*]] = arith.constant false
+! CHECK: acc.yield %[[CST]] : i1
+! CHECK: } combiner {
+! CHECK: ^bb0(%[[ARG0:.*]]: !fir.logical<4>, %[[ARG1:.*]]: !fir.logical<4>):
+! CHECK: %[[V1:.*]] = fir.convert %[[ARG0]] : (!fir.logical<4>) -> i1
+! CHECK: %[[V2:.*]] = fir.convert %[[ARG1]] : (!fir.logical<4>) -> i1
+! CHECK: %[[NEQV:.*]] = arith.cmpi ne, %[[V1]], %[[V2]] : i1
+! CHECK: %[[CONV:.*]] = fir.convert %[[NEQV]] : (i1) -> !fir.logical<4>
+! CHECK: acc.yield %[[CONV]] : !fir.logical<4>
+! CHECK: }
+
! CHECK-LABEL: acc.reduction.recipe @reduction_eqv_l32 : !fir.logical<4> reduction_operator <eqv> init {
! CHECK: ^bb0(%{{.*}}: !fir.logical<4>):
! CHECK: %[[CST:.*]] = arith.constant true
@@ -706,3 +719,13 @@ subroutine acc_reduction_eqv()
! CHECK-LABEL: func.func @_QPacc_reduction_eqv()
! CHECK: %[[RED:.*]] = acc.reduction varPtr(%{{.*}} : !fir.ref<!fir.logical<4>>) -> !fir.ref<!fir.logical<4>> {name = "l"}
! CHECK: acc.parallel reduction(@reduction_eqv_l32 -> %[[RED]] : !fir.ref<!fir.logical<4>>)
+
+subroutine acc_reduction_neqv()
+ logical :: l
+ !$acc parallel reduction(.neqv.:l)
+ !$acc end parallel
+end subroutine
+
+! CHECK-LABEL: func.func @_QPacc_reduction_neqv()
+! CHECK: %[[RED:.*]] = acc.reduction varPtr(%{{.*}} : !fir.ref<!fir.logical<4>>) -> !fir.ref<!fir.logical<4>> {name = "l"}
+! CHECK: acc.parallel reduction(@reduction_neqv_l32 -> %[[RED]] : !fir.ref<!fir.logical<4>>)
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