[flang-commits] [flang] 9db3b8d - [flang] fix broken ieee tests

Tom Eccles via flang-commits flang-commits at lists.llvm.org
Wed Dec 6 03:23:18 PST 2023


Author: Tom Eccles
Date: 2023-12-06T11:22:55Z
New Revision: 9db3b8d2537e2e3da8f9a8f8f12cd9263335f4f9

URL: https://github.com/llvm/llvm-project/commit/9db3b8d2537e2e3da8f9a8f8f12cd9263335f4f9
DIFF: https://github.com/llvm/llvm-project/commit/9db3b8d2537e2e3da8f9a8f8f12cd9263335f4f9.diff

LOG: [flang] fix broken ieee tests

These tests were broken after
https://github.com/llvm/llvm-project/pull/74315

Fixing them to ignore the fastmath attribute on fcmp

Added: 
    

Modified: 
    flang/test/Lower/Intrinsics/ieee_compare.f90
    flang/test/Lower/Intrinsics/ieee_logb.f90
    flang/test/Lower/Intrinsics/ieee_max_min.f90
    flang/test/Lower/Intrinsics/ieee_unordered.f90

Removed: 
    


################################################################################
diff  --git a/flang/test/Lower/Intrinsics/ieee_compare.f90 b/flang/test/Lower/Intrinsics/ieee_compare.f90
index a9fa97724e894..4249e4d16416c 100644
--- a/flang/test/Lower/Intrinsics/ieee_compare.f90
+++ b/flang/test/Lower/Intrinsics/ieee_compare.f90
@@ -39,7 +39,7 @@ program p
       ! CHECK-DAG: %[[V_182:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_181]]) <{bit = 1 : i32}> : (f32) -> i1
       ! CHECK-DAG: %[[V_183:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_180]]) <{bit = 1 : i32}> : (f32) -> i1
       ! CHECK:     %[[V_184:[0-9]+]] = arith.ori %[[V_183]], %[[V_182]] : i1
-      ! CHECK:     %[[V_185:[0-9]+]] = arith.cmpf oeq, %[[V_180]], %[[V_181]] : f32
+      ! CHECK:     %[[V_185:[0-9]+]] = arith.cmpf oeq, %[[V_180]], %[[V_181]] {{.*}} : f32
       ! CHECK:     fir.if %[[V_184]] {
       ! CHECK:       %[[V_526:[0-9]+]] = fir.call @_FortranAMapException(%c1{{.*}}) fastmath<contract> : (i32) -> i32
       ! CHECK:       %[[V_527:[0-9]+]] = fir.call @feraiseexcept(%[[V_526]]) fastmath<contract> : (i32) -> i32
@@ -60,7 +60,7 @@ program p
       ! CHECK-DAG: %[[V_214:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_213]]) <{bit = 1 : i32}> : (f32) -> i1
       ! CHECK-DAG: %[[V_215:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_212]]) <{bit = 1 : i32}> : (f32) -> i1
       ! CHECK:     %[[V_216:[0-9]+]] = arith.ori %[[V_215]], %[[V_214]] : i1
-      ! CHECK:     %[[V_217:[0-9]+]] = arith.cmpf oge, %[[V_212]], %[[V_213]] : f32
+      ! CHECK:     %[[V_217:[0-9]+]] = arith.cmpf oge, %[[V_212]], %[[V_213]] {{.*}} : f32
       ! CHECK:     fir.if %[[V_216]] {
       ! CHECK:       %[[V_526:[0-9]+]] = fir.call @_FortranAMapException(%c1{{.*}}) fastmath<contract> : (i32) -> i32
       ! CHECK:       %[[V_527:[0-9]+]] = fir.call @feraiseexcept(%[[V_526]]) fastmath<contract> : (i32) -> i32
@@ -81,7 +81,7 @@ program p
       ! CHECK-DAG: %[[V_246:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_245]]) <{bit = 1 : i32}> : (f32) -> i1
       ! CHECK-DAG: %[[V_247:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_244]]) <{bit = 1 : i32}> : (f32) -> i1
       ! CHECK:     %[[V_248:[0-9]+]] = arith.ori %[[V_247]], %[[V_246]] : i1
-      ! CHECK:     %[[V_249:[0-9]+]] = arith.cmpf ogt, %[[V_244]], %[[V_245]] : f32
+      ! CHECK:     %[[V_249:[0-9]+]] = arith.cmpf ogt, %[[V_244]], %[[V_245]] {{.*}} : f32
       ! CHECK:     fir.if %[[V_248]] {
       ! CHECK:       %[[V_526:[0-9]+]] = fir.call @_FortranAMapException(%c1{{.*}}) fastmath<contract> : (i32) -> i32
       ! CHECK:       %[[V_527:[0-9]+]] = fir.call @feraiseexcept(%[[V_526]]) fastmath<contract> : (i32) -> i32
@@ -102,7 +102,7 @@ program p
       ! CHECK-DAG: %[[V_278:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_277]]) <{bit = 1 : i32}> : (f32) -> i1
       ! CHECK-DAG: %[[V_279:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_276]]) <{bit = 1 : i32}> : (f32) -> i1
       ! CHECK:     %[[V_280:[0-9]+]] = arith.ori %[[V_279]], %[[V_278]] : i1
-      ! CHECK:     %[[V_281:[0-9]+]] = arith.cmpf ole, %[[V_276]], %[[V_277]] : f32
+      ! CHECK:     %[[V_281:[0-9]+]] = arith.cmpf ole, %[[V_276]], %[[V_277]] {{.*}} : f32
       ! CHECK:     fir.if %[[V_280]] {
       ! CHECK:       %[[V_526:[0-9]+]] = fir.call @_FortranAMapException(%c1{{.*}}) fastmath<contract> : (i32) -> i32
       ! CHECK:       %[[V_527:[0-9]+]] = fir.call @feraiseexcept(%[[V_526]]) fastmath<contract> : (i32) -> i32
@@ -123,7 +123,7 @@ program p
       ! CHECK-DAG: %[[V_310:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_309]]) <{bit = 1 : i32}> : (f32) -> i1
       ! CHECK-DAG: %[[V_311:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_308]]) <{bit = 1 : i32}> : (f32) -> i1
       ! CHECK:     %[[V_312:[0-9]+]] = arith.ori %[[V_311]], %[[V_310]] : i1
-      ! CHECK:     %[[V_313:[0-9]+]] = arith.cmpf olt, %[[V_308]], %[[V_309]] : f32
+      ! CHECK:     %[[V_313:[0-9]+]] = arith.cmpf olt, %[[V_308]], %[[V_309]] {{.*}} : f32
       ! CHECK:     fir.if %[[V_312]] {
       ! CHECK:       %[[V_526:[0-9]+]] = fir.call @_FortranAMapException(%c1{{.*}}) fastmath<contract> : (i32) -> i32
       ! CHECK:       %[[V_527:[0-9]+]] = fir.call @feraiseexcept(%[[V_526]]) fastmath<contract> : (i32) -> i32
@@ -144,7 +144,7 @@ program p
       ! CHECK-DAG: %[[V_342:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_341]]) <{bit = 1 : i32}> : (f32) -> i1
       ! CHECK-DAG: %[[V_343:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_340]]) <{bit = 1 : i32}> : (f32) -> i1
       ! CHECK:     %[[V_344:[0-9]+]] = arith.ori %[[V_343]], %[[V_342]] : i1
-      ! CHECK:     %[[V_345:[0-9]+]] = arith.cmpf une, %[[V_340]], %[[V_341]] : f32
+      ! CHECK:     %[[V_345:[0-9]+]] = arith.cmpf une, %[[V_340]], %[[V_341]] {{.*}} : f32
       ! CHECK:     fir.if %[[V_344]] {
       ! CHECK:       %[[V_526:[0-9]+]] = fir.call @_FortranAMapException(%c1{{.*}}) fastmath<contract> : (i32) -> i32
       ! CHECK:       %[[V_527:[0-9]+]] = fir.call @feraiseexcept(%[[V_526]]) fastmath<contract> : (i32) -> i32
@@ -162,8 +162,8 @@ program p
       ! CHECK:     %[[V_371:[0-9]+]] = fir.array_coor %[[V_62]](%[[V_61]]) %[[V_370]] : (!fir.ref<!fir.array<10xf32>>, !fir.shape<1>, i64) -> !fir.ref<f32>
       ! CHECK:     %[[V_372:[0-9]+]] = fir.load %[[V_368]] : !fir.ref<f32>
       ! CHECK:     %[[V_373:[0-9]+]] = fir.load %[[V_371]] : !fir.ref<f32>
-      ! CHECK:     %[[V_374:[0-9]+]] = arith.cmpf uno, %[[V_372]], %[[V_373]] : f32
-      ! CHECK:     %[[V_375:[0-9]+]] = arith.cmpf oeq, %[[V_372]], %[[V_373]] : f32
+      ! CHECK:     %[[V_374:[0-9]+]] = arith.cmpf uno, %[[V_372]], %[[V_373]] {{.*}} : f32
+      ! CHECK:     %[[V_375:[0-9]+]] = arith.cmpf oeq, %[[V_372]], %[[V_373]] {{.*}} : f32
       ! CHECK:     fir.if %[[V_374]] {
       ! CHECK:       %[[V_526:[0-9]+]] = fir.call @_FortranAMapException(%c1{{.*}}) fastmath<contract> : (i32) -> i32
       ! CHECK:       %[[V_527:[0-9]+]] = fir.call @feraiseexcept(%[[V_526]]) fastmath<contract> : (i32) -> i32
@@ -181,8 +181,8 @@ program p
       ! CHECK:     %[[V_400:[0-9]+]] = fir.array_coor %[[V_62]](%[[V_61]]) %[[V_399]] : (!fir.ref<!fir.array<10xf32>>, !fir.shape<1>, i64) -> !fir.ref<f32>
       ! CHECK:     %[[V_401:[0-9]+]] = fir.load %[[V_397]] : !fir.ref<f32>
       ! CHECK:     %[[V_402:[0-9]+]] = fir.load %[[V_400]] : !fir.ref<f32>
-      ! CHECK:     %[[V_403:[0-9]+]] = arith.cmpf uno, %[[V_401]], %[[V_402]] : f32
-      ! CHECK:     %[[V_404:[0-9]+]] = arith.cmpf oge, %[[V_401]], %[[V_402]] : f32
+      ! CHECK:     %[[V_403:[0-9]+]] = arith.cmpf uno, %[[V_401]], %[[V_402]] {{.*}} : f32
+      ! CHECK:     %[[V_404:[0-9]+]] = arith.cmpf oge, %[[V_401]], %[[V_402]] {{.*}} : f32
       ! CHECK:     fir.if %[[V_403]] {
       ! CHECK:       %[[V_526:[0-9]+]] = fir.call @_FortranAMapException(%c1{{.*}}) fastmath<contract> : (i32) -> i32
       ! CHECK:       %[[V_527:[0-9]+]] = fir.call @feraiseexcept(%[[V_526]]) fastmath<contract> : (i32) -> i32
@@ -200,8 +200,8 @@ program p
       ! CHECK:     %[[V_429:[0-9]+]] = fir.array_coor %[[V_62]](%[[V_61]]) %[[V_428]] : (!fir.ref<!fir.array<10xf32>>, !fir.shape<1>, i64) -> !fir.ref<f32>
       ! CHECK:     %[[V_430:[0-9]+]] = fir.load %[[V_426]] : !fir.ref<f32>
       ! CHECK:     %[[V_431:[0-9]+]] = fir.load %[[V_429]] : !fir.ref<f32>
-      ! CHECK:     %[[V_432:[0-9]+]] = arith.cmpf uno, %[[V_430]], %[[V_431]] : f32
-      ! CHECK:     %[[V_433:[0-9]+]] = arith.cmpf ogt, %[[V_430]], %[[V_431]] : f32
+      ! CHECK:     %[[V_432:[0-9]+]] = arith.cmpf uno, %[[V_430]], %[[V_431]] {{.*}} : f32
+      ! CHECK:     %[[V_433:[0-9]+]] = arith.cmpf ogt, %[[V_430]], %[[V_431]] {{.*}} : f32
       ! CHECK:     fir.if %[[V_432]] {
       ! CHECK:       %[[V_526:[0-9]+]] = fir.call @_FortranAMapException(%c1{{.*}}) fastmath<contract> : (i32) -> i32
       ! CHECK:       %[[V_527:[0-9]+]] = fir.call @feraiseexcept(%[[V_526]]) fastmath<contract> : (i32) -> i32
@@ -219,8 +219,8 @@ program p
       ! CHECK:     %[[V_458:[0-9]+]] = fir.array_coor %[[V_62]](%[[V_61]]) %[[V_457]] : (!fir.ref<!fir.array<10xf32>>, !fir.shape<1>, i64) -> !fir.ref<f32>
       ! CHECK:     %[[V_459:[0-9]+]] = fir.load %[[V_455]] : !fir.ref<f32>
       ! CHECK:     %[[V_460:[0-9]+]] = fir.load %[[V_458]] : !fir.ref<f32>
-      ! CHECK:     %[[V_461:[0-9]+]] = arith.cmpf uno, %[[V_459]], %[[V_460]] : f32
-      ! CHECK:     %[[V_462:[0-9]+]] = arith.cmpf ole, %[[V_459]], %[[V_460]] : f32
+      ! CHECK:     %[[V_461:[0-9]+]] = arith.cmpf uno, %[[V_459]], %[[V_460]] {{.*}} : f32
+      ! CHECK:     %[[V_462:[0-9]+]] = arith.cmpf ole, %[[V_459]], %[[V_460]] {{.*}} : f32
       ! CHECK:     fir.if %[[V_461]] {
       ! CHECK:       %[[V_526:[0-9]+]] = fir.call @_FortranAMapException(%c1{{.*}}) fastmath<contract> : (i32) -> i32
       ! CHECK:       %[[V_527:[0-9]+]] = fir.call @feraiseexcept(%[[V_526]]) fastmath<contract> : (i32) -> i32
@@ -238,8 +238,8 @@ program p
       ! CHECK:     %[[V_487:[0-9]+]] = fir.array_coor %[[V_62]](%[[V_61]]) %[[V_486]] : (!fir.ref<!fir.array<10xf32>>, !fir.shape<1>, i64) -> !fir.ref<f32>
       ! CHECK:     %[[V_488:[0-9]+]] = fir.load %[[V_484]] : !fir.ref<f32>
       ! CHECK:     %[[V_489:[0-9]+]] = fir.load %[[V_487]] : !fir.ref<f32>
-      ! CHECK:     %[[V_490:[0-9]+]] = arith.cmpf uno, %[[V_488]], %[[V_489]] : f32
-      ! CHECK:     %[[V_491:[0-9]+]] = arith.cmpf olt, %[[V_488]], %[[V_489]] : f32
+      ! CHECK:     %[[V_490:[0-9]+]] = arith.cmpf uno, %[[V_488]], %[[V_489]] {{.*}} : f32
+      ! CHECK:     %[[V_491:[0-9]+]] = arith.cmpf olt, %[[V_488]], %[[V_489]] {{.*}} : f32
       ! CHECK:     fir.if %[[V_490]] {
       ! CHECK:       %[[V_526:[0-9]+]] = fir.call @_FortranAMapException(%c1{{.*}}) fastmath<contract> : (i32) -> i32
       ! CHECK:       %[[V_527:[0-9]+]] = fir.call @feraiseexcept(%[[V_526]]) fastmath<contract> : (i32) -> i32
@@ -257,8 +257,8 @@ program p
       ! CHECK:     %[[V_516:[0-9]+]] = fir.array_coor %[[V_62]](%[[V_61]]) %[[V_515]] : (!fir.ref<!fir.array<10xf32>>, !fir.shape<1>, i64) -> !fir.ref<f32>
       ! CHECK:     %[[V_517:[0-9]+]] = fir.load %[[V_513]] : !fir.ref<f32>
       ! CHECK:     %[[V_518:[0-9]+]] = fir.load %[[V_516]] : !fir.ref<f32>
-      ! CHECK:     %[[V_519:[0-9]+]] = arith.cmpf uno, %[[V_517]], %[[V_518]] : f32
-      ! CHECK:     %[[V_520:[0-9]+]] = arith.cmpf une, %[[V_517]], %[[V_518]] : f32
+      ! CHECK:     %[[V_519:[0-9]+]] = arith.cmpf uno, %[[V_517]], %[[V_518]] {{.*}} : f32
+      ! CHECK:     %[[V_520:[0-9]+]] = arith.cmpf une, %[[V_517]], %[[V_518]] {{.*}} : f32
       ! CHECK:     fir.if %[[V_519]] {
       ! CHECK:       %[[V_526:[0-9]+]] = fir.call @_FortranAMapException(%c1{{.*}}) fastmath<contract> : (i32) -> i32
       ! CHECK:       %[[V_527:[0-9]+]] = fir.call @feraiseexcept(%[[V_526]]) fastmath<contract> : (i32) -> i32

diff  --git a/flang/test/Lower/Intrinsics/ieee_logb.f90 b/flang/test/Lower/Intrinsics/ieee_logb.f90
index bbbdfbdc3a8e6..df15661d51b2a 100644
--- a/flang/test/Lower/Intrinsics/ieee_logb.f90
+++ b/flang/test/Lower/Intrinsics/ieee_logb.f90
@@ -29,7 +29,7 @@ subroutine out(x)
 
   ! CHECK:     %[[V_72:[0-9]+]] = fir.load %[[V_64]] : !fir.ref<f64>
   ! CHECK:     %[[V_73:[0-9]+]] = arith.bitcast %[[V_72]] : f64 to i64
-  ! CHECK:     %[[V_74:[0-9]+]] = arith.cmpf oeq, %[[V_72]], %cst{{[_0-9]*}} : f64
+  ! CHECK:     %[[V_74:[0-9]+]] = arith.cmpf oeq, %[[V_72]], %cst{{[_0-9]*}} {{.*}} : f64
   ! CHECK:     %[[V_75:[0-9]+]] = fir.if %[[V_74]] -> (f64) {
   ! CHECK:       %[[V_101:[0-9]+]] = fir.call @_FortranAMapException(%c4{{.*}}) fastmath<contract> : (i32) -> i32
   ! CHECK:       %[[V_102:[0-9]+]] = fir.call @feraiseexcept(%[[V_101]]) fastmath<contract> : (i32) -> i32

diff  --git a/flang/test/Lower/Intrinsics/ieee_max_min.f90 b/flang/test/Lower/Intrinsics/ieee_max_min.f90
index c2af50d29a63b..aecfaf0a7245b 100644
--- a/flang/test/Lower/Intrinsics/ieee_max_min.f90
+++ b/flang/test/Lower/Intrinsics/ieee_max_min.f90
@@ -81,15 +81,15 @@ program p
       ! CHECK:     }
       ! CHECK:     %[[V_208:[0-9]+]] = fir.load %[[V_17]] : !fir.ref<f32>
       ! CHECK:     %[[V_209:[0-9]+]] = fir.load %[[V_19]] : !fir.ref<f32>
-      ! CHECK:     %[[V_210:[0-9]+]] = arith.cmpf olt, %[[V_208]], %[[V_209]] : f32
+      ! CHECK:     %[[V_210:[0-9]+]] = arith.cmpf olt, %[[V_208]], %[[V_209]] {{.*}} : f32
       ! CHECK:     %[[V_211:[0-9]+]] = fir.if %[[V_210]] -> (f32) {
       ! CHECK:       fir.result %[[V_209]] : f32
       ! CHECK:     } else {
-      ! CHECK:       %[[V_692:[0-9]+]] = arith.cmpf ogt, %[[V_208]], %[[V_209]] : f32
+      ! CHECK:       %[[V_692:[0-9]+]] = arith.cmpf ogt, %[[V_208]], %[[V_209]] {{.*}} : f32
       ! CHECK:       %[[V_693:[0-9]+]] = fir.if %[[V_692]] -> (f32) {
       ! CHECK:         fir.result %[[V_208]] : f32
       ! CHECK:       } else {
-      ! CHECK:         %[[V_694:[0-9]+]] = arith.cmpf oeq, %[[V_208]], %[[V_209]] : f32
+      ! CHECK:         %[[V_694:[0-9]+]] = arith.cmpf oeq, %[[V_208]], %[[V_209]] {{.*}} : f32
       ! CHECK:         %[[V_695:[0-9]+]] = fir.if %[[V_694]] -> (f32) {
       ! CHECK:           %[[V_696:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_208]]) <{bit = 960 : i32}> : (f32) -> i1
       ! CHECK:           %[[V_697:[0-9]+]] = arith.select %[[V_696]], %[[V_208]], %[[V_209]] : f32
@@ -140,15 +140,15 @@ program p
       ! CHECK:     %[[V_274:[0-9]+]] = fir.load %[[V_19]] : !fir.ref<f32>
       ! CHECK:     %[[V_275:[0-9]+]] = math.copysign %[[V_273]], %cst{{[_0-9]*}} fastmath<contract> : f32
       ! CHECK:     %[[V_276:[0-9]+]] = math.copysign %[[V_274]], %cst{{[_0-9]*}} fastmath<contract> : f32
-      ! CHECK:     %[[V_277:[0-9]+]] = arith.cmpf olt, %[[V_275]], %[[V_276]] : f32
+      ! CHECK:     %[[V_277:[0-9]+]] = arith.cmpf olt, %[[V_275]], %[[V_276]] {{.*}} : f32
       ! CHECK:     %[[V_278:[0-9]+]] = fir.if %[[V_277]] -> (f32) {
       ! CHECK:       fir.result %[[V_274]] : f32
       ! CHECK:     } else {
-      ! CHECK:       %[[V_692:[0-9]+]] = arith.cmpf ogt, %[[V_275]], %[[V_276]] : f32
+      ! CHECK:       %[[V_692:[0-9]+]] = arith.cmpf ogt, %[[V_275]], %[[V_276]] {{.*}} : f32
       ! CHECK:       %[[V_693:[0-9]+]] = fir.if %[[V_692]] -> (f32) {
       ! CHECK:         fir.result %[[V_273]] : f32
       ! CHECK:       } else {
-      ! CHECK:         %[[V_694:[0-9]+]] = arith.cmpf oeq, %[[V_275]], %[[V_276]] : f32
+      ! CHECK:         %[[V_694:[0-9]+]] = arith.cmpf oeq, %[[V_275]], %[[V_276]] {{.*}} : f32
       ! CHECK:         %[[V_695:[0-9]+]] = fir.if %[[V_694]] -> (f32) {
       ! CHECK:           %[[V_696:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_273]]) <{bit = 960 : i32}> : (f32) -> i1
       ! CHECK:           %[[V_697:[0-9]+]] = arith.select %[[V_696]], %[[V_273]], %[[V_274]] : f32
@@ -197,22 +197,22 @@ program p
       ! CHECK:     }
       ! CHECK:     %[[V_334:[0-9]+]] = fir.load %[[V_17]] : !fir.ref<f32>
       ! CHECK:     %[[V_335:[0-9]+]] = fir.load %[[V_19]] : !fir.ref<f32>
-      ! CHECK:     %[[V_336:[0-9]+]] = arith.cmpf olt, %[[V_334]], %[[V_335]] : f32
+      ! CHECK:     %[[V_336:[0-9]+]] = arith.cmpf olt, %[[V_334]], %[[V_335]] {{.*}} : f32
       ! CHECK:     %[[V_337:[0-9]+]] = fir.if %[[V_336]] -> (f32) {
       ! CHECK:       fir.result %[[V_335]] : f32
       ! CHECK:     } else {
-      ! CHECK:       %[[V_692:[0-9]+]] = arith.cmpf ogt, %[[V_334]], %[[V_335]] : f32
+      ! CHECK:       %[[V_692:[0-9]+]] = arith.cmpf ogt, %[[V_334]], %[[V_335]] {{.*}} : f32
       ! CHECK:       %[[V_693:[0-9]+]] = fir.if %[[V_692]] -> (f32) {
       ! CHECK:         fir.result %[[V_334]] : f32
       ! CHECK:       } else {
-      ! CHECK:         %[[V_694:[0-9]+]] = arith.cmpf oeq, %[[V_334]], %[[V_335]] : f32
+      ! CHECK:         %[[V_694:[0-9]+]] = arith.cmpf oeq, %[[V_334]], %[[V_335]] {{.*}} : f32
       ! CHECK:         %[[V_695:[0-9]+]] = fir.if %[[V_694]] -> (f32) {
       ! CHECK:           %[[V_696:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_334]]) <{bit = 960 : i32}> : (f32) -> i1
       ! CHECK:           %[[V_697:[0-9]+]] = arith.select %[[V_696]], %[[V_334]], %[[V_335]] : f32
       ! CHECK:           fir.result %[[V_697]] : f32
       ! CHECK:         } else {
-      ! CHECK:           %[[V_696:[0-9]+]] = arith.cmpf ord, %[[V_334]], %[[V_334]] : f32
-      ! CHECK:           %[[V_697:[0-9]+]] = arith.cmpf ord, %[[V_335]], %[[V_335]] : f32
+      ! CHECK:           %[[V_696:[0-9]+]] = arith.cmpf ord, %[[V_334]], %[[V_334]] {{.*}} : f32
+      ! CHECK:           %[[V_697:[0-9]+]] = arith.cmpf ord, %[[V_335]], %[[V_335]] {{.*}} : f32
       ! CHECK:           %[[V_698:[0-9]+]] = fir.coordinate_of %[[V_92]], %c2{{.*}} : (!fir.ref<!fir.array<12xi32>>, i8) -> !fir.ref<i32>
       ! CHECK:           %[[V_699:[0-9]+]] = fir.load %[[V_698]] : !fir.ref<i32>
       ! CHECK:           %[[V_700:[0-9]+]] = arith.bitcast %[[V_699]] : i32 to f32
@@ -260,22 +260,22 @@ program p
       ! CHECK:     %[[V_394:[0-9]+]] = fir.load %[[V_19]] : !fir.ref<f32>
       ! CHECK:     %[[V_395:[0-9]+]] = math.copysign %[[V_393]], %cst{{[_0-9]*}} fastmath<contract> : f32
       ! CHECK:     %[[V_396:[0-9]+]] = math.copysign %[[V_394]], %cst{{[_0-9]*}} fastmath<contract> : f32
-      ! CHECK:     %[[V_397:[0-9]+]] = arith.cmpf olt, %[[V_395]], %[[V_396]] : f32
+      ! CHECK:     %[[V_397:[0-9]+]] = arith.cmpf olt, %[[V_395]], %[[V_396]] {{.*}} : f32
       ! CHECK:     %[[V_398:[0-9]+]] = fir.if %[[V_397]] -> (f32) {
       ! CHECK:       fir.result %[[V_394]] : f32
       ! CHECK:     } else {
-      ! CHECK:       %[[V_692:[0-9]+]] = arith.cmpf ogt, %[[V_395]], %[[V_396]] : f32
+      ! CHECK:       %[[V_692:[0-9]+]] = arith.cmpf ogt, %[[V_395]], %[[V_396]] {{.*}} : f32
       ! CHECK:       %[[V_693:[0-9]+]] = fir.if %[[V_692]] -> (f32) {
       ! CHECK:         fir.result %[[V_393]] : f32
       ! CHECK:       } else {
-      ! CHECK:         %[[V_694:[0-9]+]] = arith.cmpf oeq, %[[V_395]], %[[V_396]] : f32
+      ! CHECK:         %[[V_694:[0-9]+]] = arith.cmpf oeq, %[[V_395]], %[[V_396]] {{.*}} : f32
       ! CHECK:         %[[V_695:[0-9]+]] = fir.if %[[V_694]] -> (f32) {
       ! CHECK:           %[[V_696:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_393]]) <{bit = 960 : i32}> : (f32) -> i1
       ! CHECK:           %[[V_697:[0-9]+]] = arith.select %[[V_696]], %[[V_393]], %[[V_394]] : f32
       ! CHECK:           fir.result %[[V_697]] : f32
       ! CHECK:         } else {
-      ! CHECK:           %[[V_696:[0-9]+]] = arith.cmpf ord, %[[V_393]], %[[V_393]] : f32
-      ! CHECK:           %[[V_697:[0-9]+]] = arith.cmpf ord, %[[V_394]], %[[V_394]] : f32
+      ! CHECK:           %[[V_696:[0-9]+]] = arith.cmpf ord, %[[V_393]], %[[V_393]] {{.*}} : f32
+      ! CHECK:           %[[V_697:[0-9]+]] = arith.cmpf ord, %[[V_394]], %[[V_394]] {{.*}} : f32
       ! CHECK:           %[[V_698:[0-9]+]] = fir.coordinate_of %[[V_92]], %c2{{.*}} : (!fir.ref<!fir.array<12xi32>>, i8) -> !fir.ref<i32>
       ! CHECK:           %[[V_699:[0-9]+]] = fir.load %[[V_698]] : !fir.ref<i32>
       ! CHECK:           %[[V_700:[0-9]+]] = arith.bitcast %[[V_699]] : i32 to f32
@@ -321,15 +321,15 @@ program p
       ! CHECK:     }
       ! CHECK:     %[[V_454:[0-9]+]] = fir.load %[[V_17]] : !fir.ref<f32>
       ! CHECK:     %[[V_455:[0-9]+]] = fir.load %[[V_19]] : !fir.ref<f32>
-      ! CHECK:     %[[V_456:[0-9]+]] = arith.cmpf olt, %[[V_454]], %[[V_455]] : f32
+      ! CHECK:     %[[V_456:[0-9]+]] = arith.cmpf olt, %[[V_454]], %[[V_455]] {{.*}} : f32
       ! CHECK:     %[[V_457:[0-9]+]] = fir.if %[[V_456]] -> (f32) {
       ! CHECK:       fir.result %[[V_454]] : f32
       ! CHECK:     } else {
-      ! CHECK:       %[[V_692:[0-9]+]] = arith.cmpf ogt, %[[V_454]], %[[V_455]] : f32
+      ! CHECK:       %[[V_692:[0-9]+]] = arith.cmpf ogt, %[[V_454]], %[[V_455]] {{.*}} : f32
       ! CHECK:       %[[V_693:[0-9]+]] = fir.if %[[V_692]] -> (f32) {
       ! CHECK:         fir.result %[[V_455]] : f32
       ! CHECK:       } else {
-      ! CHECK:         %[[V_694:[0-9]+]] = arith.cmpf oeq, %[[V_454]], %[[V_455]] : f32
+      ! CHECK:         %[[V_694:[0-9]+]] = arith.cmpf oeq, %[[V_454]], %[[V_455]] {{.*}} : f32
       ! CHECK:         %[[V_695:[0-9]+]] = fir.if %[[V_694]] -> (f32) {
       ! CHECK:           %[[V_696:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_454]]) <{bit = 60 : i32}> : (f32) -> i1
       ! CHECK:           %[[V_697:[0-9]+]] = arith.select %[[V_696]], %[[V_454]], %[[V_455]] : f32
@@ -380,15 +380,15 @@ program p
       ! CHECK:     %[[V_514:[0-9]+]] = fir.load %[[V_19]] : !fir.ref<f32>
       ! CHECK:     %[[V_515:[0-9]+]] = math.copysign %[[V_513]], %cst{{[_0-9]*}} fastmath<contract> : f32
       ! CHECK:     %[[V_516:[0-9]+]] = math.copysign %[[V_514]], %cst{{[_0-9]*}} fastmath<contract> : f32
-      ! CHECK:     %[[V_517:[0-9]+]] = arith.cmpf olt, %[[V_515]], %[[V_516]] : f32
+      ! CHECK:     %[[V_517:[0-9]+]] = arith.cmpf olt, %[[V_515]], %[[V_516]] {{.*}} : f32
       ! CHECK:     %[[V_518:[0-9]+]] = fir.if %[[V_517]] -> (f32) {
       ! CHECK:       fir.result %[[V_513]] : f32
       ! CHECK:     } else {
-      ! CHECK:       %[[V_692:[0-9]+]] = arith.cmpf ogt, %[[V_515]], %[[V_516]] : f32
+      ! CHECK:       %[[V_692:[0-9]+]] = arith.cmpf ogt, %[[V_515]], %[[V_516]] {{.*}} : f32
       ! CHECK:       %[[V_693:[0-9]+]] = fir.if %[[V_692]] -> (f32) {
       ! CHECK:         fir.result %[[V_514]] : f32
       ! CHECK:       } else {
-      ! CHECK:         %[[V_694:[0-9]+]] = arith.cmpf oeq, %[[V_515]], %[[V_516]] : f32
+      ! CHECK:         %[[V_694:[0-9]+]] = arith.cmpf oeq, %[[V_515]], %[[V_516]] {{.*}} : f32
       ! CHECK:         %[[V_695:[0-9]+]] = fir.if %[[V_694]] -> (f32) {
       ! CHECK:           %[[V_696:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_513]]) <{bit = 60 : i32}> : (f32) -> i1
       ! CHECK:           %[[V_697:[0-9]+]] = arith.select %[[V_696]], %[[V_513]], %[[V_514]] : f32
@@ -437,22 +437,22 @@ program p
       ! CHECK:     }
       ! CHECK:     %[[V_574:[0-9]+]] = fir.load %[[V_17]] : !fir.ref<f32>
       ! CHECK:     %[[V_575:[0-9]+]] = fir.load %[[V_19]] : !fir.ref<f32>
-      ! CHECK:     %[[V_576:[0-9]+]] = arith.cmpf olt, %[[V_574]], %[[V_575]] : f32
+      ! CHECK:     %[[V_576:[0-9]+]] = arith.cmpf olt, %[[V_574]], %[[V_575]] {{.*}} : f32
       ! CHECK:     %[[V_577:[0-9]+]] = fir.if %[[V_576]] -> (f32) {
       ! CHECK:       fir.result %[[V_574]] : f32
       ! CHECK:     } else {
-      ! CHECK:       %[[V_692:[0-9]+]] = arith.cmpf ogt, %[[V_574]], %[[V_575]] : f32
+      ! CHECK:       %[[V_692:[0-9]+]] = arith.cmpf ogt, %[[V_574]], %[[V_575]] {{.*}} : f32
       ! CHECK:       %[[V_693:[0-9]+]] = fir.if %[[V_692]] -> (f32) {
       ! CHECK:         fir.result %[[V_575]] : f32
       ! CHECK:       } else {
-      ! CHECK:         %[[V_694:[0-9]+]] = arith.cmpf oeq, %[[V_574]], %[[V_575]] : f32
+      ! CHECK:         %[[V_694:[0-9]+]] = arith.cmpf oeq, %[[V_574]], %[[V_575]] {{.*}} : f32
       ! CHECK:         %[[V_695:[0-9]+]] = fir.if %[[V_694]] -> (f32) {
       ! CHECK:           %[[V_696:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_574]]) <{bit = 60 : i32}> : (f32) -> i1
       ! CHECK:           %[[V_697:[0-9]+]] = arith.select %[[V_696]], %[[V_574]], %[[V_575]] : f32
       ! CHECK:           fir.result %[[V_697]] : f32
       ! CHECK:         } else {
-      ! CHECK:           %[[V_696:[0-9]+]] = arith.cmpf ord, %[[V_574]], %[[V_574]] : f32
-      ! CHECK:           %[[V_697:[0-9]+]] = arith.cmpf ord, %[[V_575]], %[[V_575]] : f32
+      ! CHECK:           %[[V_696:[0-9]+]] = arith.cmpf ord, %[[V_574]], %[[V_574]] {{.*}} : f32
+      ! CHECK:           %[[V_697:[0-9]+]] = arith.cmpf ord, %[[V_575]], %[[V_575]] {{.*}} : f32
       ! CHECK:           %[[V_698:[0-9]+]] = fir.coordinate_of %[[V_92]], %c2{{.*}} : (!fir.ref<!fir.array<12xi32>>, i8) -> !fir.ref<i32>
       ! CHECK:           %[[V_699:[0-9]+]] = fir.load %[[V_698]] : !fir.ref<i32>
       ! CHECK:           %[[V_700:[0-9]+]] = arith.bitcast %[[V_699]] : i32 to f32
@@ -500,22 +500,22 @@ program p
       ! CHECK:     %[[V_634:[0-9]+]] = fir.load %[[V_19]] : !fir.ref<f32>
       ! CHECK:     %[[V_635:[0-9]+]] = math.copysign %[[V_633]], %cst{{[_0-9]*}} fastmath<contract> : f32
       ! CHECK:     %[[V_636:[0-9]+]] = math.copysign %[[V_634]], %cst{{[_0-9]*}} fastmath<contract> : f32
-      ! CHECK:     %[[V_637:[0-9]+]] = arith.cmpf olt, %[[V_635]], %[[V_636]] : f32
+      ! CHECK:     %[[V_637:[0-9]+]] = arith.cmpf olt, %[[V_635]], %[[V_636]] {{.*}} : f32
       ! CHECK:     %[[V_638:[0-9]+]] = fir.if %[[V_637]] -> (f32) {
       ! CHECK:       fir.result %[[V_633]] : f32
       ! CHECK:     } else {
-      ! CHECK:       %[[V_692:[0-9]+]] = arith.cmpf ogt, %[[V_635]], %[[V_636]] : f32
+      ! CHECK:       %[[V_692:[0-9]+]] = arith.cmpf ogt, %[[V_635]], %[[V_636]] {{.*}} : f32
       ! CHECK:       %[[V_693:[0-9]+]] = fir.if %[[V_692]] -> (f32) {
       ! CHECK:         fir.result %[[V_634]] : f32
       ! CHECK:       } else {
-      ! CHECK:         %[[V_694:[0-9]+]] = arith.cmpf oeq, %[[V_635]], %[[V_636]] : f32
+      ! CHECK:         %[[V_694:[0-9]+]] = arith.cmpf oeq, %[[V_635]], %[[V_636]] {{.*}} : f32
       ! CHECK:         %[[V_695:[0-9]+]] = fir.if %[[V_694]] -> (f32) {
       ! CHECK:           %[[V_696:[0-9]+]] = "llvm.intr.is.fpclass"(%[[V_633]]) <{bit = 60 : i32}> : (f32) -> i1
       ! CHECK:           %[[V_697:[0-9]+]] = arith.select %[[V_696]], %[[V_633]], %[[V_634]] : f32
       ! CHECK:           fir.result %[[V_697]] : f32
       ! CHECK:         } else {
-      ! CHECK:           %[[V_696:[0-9]+]] = arith.cmpf ord, %[[V_633]], %[[V_633]] : f32
-      ! CHECK:           %[[V_697:[0-9]+]] = arith.cmpf ord, %[[V_634]], %[[V_634]] : f32
+      ! CHECK:           %[[V_696:[0-9]+]] = arith.cmpf ord, %[[V_633]], %[[V_633]] {{.*}} : f32
+      ! CHECK:           %[[V_697:[0-9]+]] = arith.cmpf ord, %[[V_634]], %[[V_634]] {{.*}} : f32
       ! CHECK:           %[[V_698:[0-9]+]] = fir.coordinate_of %[[V_92]], %c2{{.*}} : (!fir.ref<!fir.array<12xi32>>, i8) -> !fir.ref<i32>
       ! CHECK:           %[[V_699:[0-9]+]] = fir.load %[[V_698]] : !fir.ref<i32>
       ! CHECK:           %[[V_700:[0-9]+]] = arith.bitcast %[[V_699]] : i32 to f32

diff  --git a/flang/test/Lower/Intrinsics/ieee_unordered.f90 b/flang/test/Lower/Intrinsics/ieee_unordered.f90
index e6cbab7ef8c6a..a6146eff7f06e 100644
--- a/flang/test/Lower/Intrinsics/ieee_unordered.f90
+++ b/flang/test/Lower/Intrinsics/ieee_unordered.f90
@@ -44,21 +44,21 @@
 
 ! CHECK:     %[[V_40:[0-9]+]] = fir.load %[[V_2]] : !fir.ref<f128>
 ! CHECK:     %[[V_41:[0-9]+]] = fir.load %[[V_3]] : !fir.ref<f128>
-! CHECK:     %[[V_44:[0-9]+]] = arith.cmpf uno, %[[V_40]], %[[V_41]] : f128
+! CHECK:     %[[V_44:[0-9]+]] = arith.cmpf uno, %[[V_40]], %[[V_41]] {{.*}} : f128
 ! CHECK:     %[[V_45:[0-9]+]] = fir.convert %[[V_44]] : (i1) -> !fir.logical<4>
 ! CHECK:     %[[V_46:[0-9]+]] = fir.convert %[[V_45]] : (!fir.logical<4>) -> i1
 ! CHECK:     %[[V_47:[0-9]+]] = fir.call @_FortranAioOutputLogical(%{{.*}}, %[[V_46]]) {{.*}} : (!fir.ref<i8>, i1) -> i1
 
 ! CHECK:     %[[V_48:[0-9]+]] = fir.load %[[V_2]] : !fir.ref<f128>
 ! CHECK:     %[[V_49:[0-9]+]] = fir.load %[[V_4]] : !fir.ref<f128>
-! CHECK:     %[[V_52:[0-9]+]] = arith.cmpf uno, %[[V_48]], %[[V_49]] : f128
+! CHECK:     %[[V_52:[0-9]+]] = arith.cmpf uno, %[[V_48]], %[[V_49]] {{.*}} : f128
 ! CHECK:     %[[V_53:[0-9]+]] = fir.convert %[[V_52]] : (i1) -> !fir.logical<4>
 ! CHECK:     %[[V_54:[0-9]+]] = fir.convert %[[V_53]] : (!fir.logical<4>) -> i1
 ! CHECK:     %[[V_55:[0-9]+]] = fir.call @_FortranAioOutputLogical(%{{.*}}, %[[V_54]]) {{.*}} : (!fir.ref<i8>, i1) -> i1
 
 ! CHECK:     %[[V_56:[0-9]+]] = fir.load %[[V_3]] : !fir.ref<f128>
 ! CHECK:     %[[V_57:[0-9]+]] = fir.load %[[V_4]] : !fir.ref<f128>
-! CHECK:     %[[V_60:[0-9]+]] = arith.cmpf uno, %[[V_56]], %[[V_57]] : f128
+! CHECK:     %[[V_60:[0-9]+]] = arith.cmpf uno, %[[V_56]], %[[V_57]] {{.*}} : f128
 ! CHECK:     %[[V_61:[0-9]+]] = fir.convert %[[V_60]] : (i1) -> !fir.logical<4>
 ! CHECK:     %[[V_62:[0-9]+]] = fir.convert %[[V_61]] : (!fir.logical<4>) -> i1
 ! CHECK:     %[[V_63:[0-9]+]] = fir.call @_FortranAioOutputLogical(%{{.*}}, %[[V_62]]) {{.*}} : (!fir.ref<i8>, i1) -> i1


        


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